Merge "fix runtime issues for scripts"

Remove code duplication and fall back to trying directly if the proxy
isn't available. With this, tests still work if netd is dead (perhaps
because you've run "adb shell stop", or because you're running on the host).

Bug: 18547878
Change-Id: Ia4a9aa18b1fc79e09735107246989fa7fc6c8455

README.md

@@ -4,40 +4,52 @@ Working on bionic
 What are the big pieces of bionic?
 ----------------------------------
 
-libc/ --- libc.so, libc.a
-  The C library. Stuff like fopen(3) and kill(2).
-libm/ --- libm.so, libm.a
-  The math library. Traditionally Unix systems kept stuff like sin(3) and
-  cos(3) in a separate library to save space in the days before shared
-  libraries.
-libdl/ --- libdl.so
-  The dynamic linker interface library. This is actually just a bunch of
-  stubs that the dynamic linker replaces with pointers to its own
-  implementation at runtime. This is where stuff like dlopen(3) lives.
-libstdc++/ --- libstdc++.so
-  The C++ ABI support functions. The C++ compiler doesn't know how to
-  implement thread-safe static initialization and the like, so it just calls
-  functions that are supplied by the system. Stuff like __cxa_guard_acquire
-  and __cxa_pure_virtual live here.
+#### libc/ --- libc.so, libc.a
 
-linker/ --- /system/bin/linker and /system/bin/linker64
-  The dynamic linker. When you run a dynamically-linked executable, its ELF
-  file has a DT_INTERP entry that says "use the following program to start me".
-  On Android, that's either linker or linker64 (depending on whether it's a
-  32-bit or 64-bit executable). It's responsible for loading the ELF executable
-  into memory and resolving references to symbols (so that when your code tries
-  to jump to fopen(3), say, it lands in the right place).
+The C library. Stuff like `fopen(3)` and `kill(2)`.
 
-tests/ --- unit tests
-  The tests/ directory contains unit tests. Roughly arranged as one file per
-  publicly-exported header file.
-benchmarks/ --- benchmarks
-  The benchmarks/ directory contains benchmarks.
+#### libm/ --- libm.so, libm.a
+
+The math library. Traditionally Unix systems kept stuff like `sin(3)` and
+`cos(3)` in a separate library to save space in the days before shared
+libraries.
+
+#### libdl/ --- libdl.so
+
+The dynamic linker interface library. This is actually just a bunch of stubs
+that the dynamic linker replaces with pointers to its own implementation at
+runtime. This is where stuff like `dlopen(3)` lives.
+
+#### libstdc++/ --- libstdc++.so
+
+The C++ ABI support functions. The C++ compiler doesn't know how to implement
+thread-safe static initialization and the like, so it just calls functions that
+are supplied by the system. Stuff like `__cxa_guard_acquire` and
+`__cxa_pure_virtual` live here.
+
+#### linker/ --- /system/bin/linker and /system/bin/linker64
+
+The dynamic linker. When you run a dynamically-linked executable, its ELF file
+has a `DT_INTERP` entry that says "use the following program to start me".  On
+Android, that's either `linker` or `linker64` (depending on whether it's a
+32-bit or 64-bit executable). It's responsible for loading the ELF executable
+into memory and resolving references to symbols (so that when your code tries to
+jump to `fopen(3)`, say, it lands in the right place).
+
+#### tests/ --- unit tests
+
+The `tests/` directory contains unit tests. Roughly arranged as one file per
+publicly-exported header file.
+
+#### benchmarks/ --- benchmarks
+
+The `benchmarks/` directory contains benchmarks.
 
 
 What's in libc/?
 ----------------
 
+<pre>
 libc/
   arch-arm/
   arch-arm64/
@@ -121,6 +133,7 @@ libc/
   zoneinfo/
     # Android-format time zone data.
     # See 'Updating tzdata' later.
+</pre>
 
 
 Adding system calls
@@ -160,3 +173,86 @@ This is fully automated:
 
   1. Run update-tzdata.py.
 
+
+Verifying changes
+-----------------
+
+If you make a change that is likely to have a wide effect on the tree (such as a
+libc header change), you should run `make checkbuild`. A regular `make` will
+_not_ build the entire tree; just the minimum number of projects that are
+required for the device. Tests, additional developer tools, and various other
+modules will not be built. Note that `make checkbuild` will not be complete
+either, as `make tests` covers a few additional modules, but generally speaking
+`make checkbuild` is enough.
+
+
+Running the tests
+-----------------
+
+The tests are all built from the tests/ directory.
+
+### Device tests
+
+    $ mma
+    $ adb sync
+    $ adb shell /data/nativetest/bionic-unit-tests/bionic-unit-tests32
+    $ adb shell \
+        /data/nativetest/bionic-unit-tests-static/bionic-unit-tests-static32
+    # Only for 64-bit targets
+    $ adb shell /data/nativetest/bionic-unit-tests/bionic-unit-tests64
+    $ adb shell \
+        /data/nativetest/bionic-unit-tests-static/bionic-unit-tests-static64
+
+### Host tests
+
+The host tests require that you have `lunch`ed either an x86 or x86_64 target.
+
+    $ mma
+    # 64-bit tests for 64-bit targets, 32-bit otherwise.
+    $ mm bionic-unit-tests-run-on-host
+    # Only exists for 64-bit targets.
+    $ mm bionic-unit-tests-run-on-host32
+
+### Against glibc
+
+As a way to check that our tests do in fact test the correct behavior (and not
+just the behavior we think is correct), it is possible to run the tests against
+the host's glibc.
+
+    $ mma
+    $ bionic-unit-tests-glibc32 # already in your path
+    $ bionic-unit-tests-glibc64
+
+
+Gathering test coverage
+-----------------------
+
+For either host or target coverage, you must first:
+
+ * `$ export NATIVE_COVERAGE=true`
+     * Note that the build system is ignorant to this flag being toggled, i.e. if
+       you change this flag, you will have to manually rebuild bionic.
+ * Set `bionic_coverage=true` in `libc/Android.mk` and `libm/Android.mk`.
+
+### Coverage from device tests
+
+    $ mma
+    $ adb sync
+    $ adb shell \
+        GCOV_PREFIX=/data/local/tmp/gcov \
+        GCOV_PREFIX_STRIP=`echo $ANDROID_BUILD_TOP | grep -o / | wc -l` \
+        /data/nativetest/bionic-unit-tests/bionic-unit-tests32
+    $ acov
+
+`acov` will pull all coverage information from the device, push it to the right
+directories, run `lcov`, and open the coverage report in your browser.
+
+### Coverage from host tests
+
+First, build and run the host tests as usual (see above).
+
+    $ croot
+    $ lcov -c -d $ANDROID_PRODUCT_OUT -o coverage.info
+    $ genhtml -o covreport coverage.info # or lcov --list coverage.info
+
+The coverage report is now available at `covreport/index.html`.

benchmarks/Android.mk

@@ -32,7 +32,6 @@ benchmark_c_flags = \
 benchmark_src_files = \
     benchmark_main.cpp \
     math_benchmark.cpp \
-    property_benchmark.cpp \
     pthread_benchmark.cpp \
     semaphore_benchmark.cpp \
     stdio_benchmark.cpp \
@@ -41,7 +40,8 @@ benchmark_src_files = \
     unistd_benchmark.cpp \
 
 # Build benchmarks for the device (with bionic's .so). Run with:
-#   adb shell bionic-benchmarks
+#   adb shell bionic-benchmarks32
+#   adb shell bionic-benchmarks64
 include $(CLEAR_VARS)
 LOCAL_MODULE := bionic-benchmarks
 LOCAL_MODULE_STEM_32 := bionic-benchmarks32
@@ -49,32 +49,46 @@ LOCAL_MODULE_STEM_64 := bionic-benchmarks64
 LOCAL_MULTILIB := both
 LOCAL_ADDITIONAL_DEPENDENCIES := $(LOCAL_PATH)/Android.mk
 LOCAL_CFLAGS += $(benchmark_c_flags)
-LOCAL_C_INCLUDES += external/stlport/stlport bionic/ bionic/libstdc++/include
-LOCAL_SHARED_LIBRARIES += libstlport
-LOCAL_SRC_FILES := $(benchmark_src_files)
+LOCAL_SRC_FILES := $(benchmark_src_files) property_benchmark.cpp
+LOCAL_CXX_STL := libc++
 include $(BUILD_EXECUTABLE)
 
-ifeq ($(HOST_OS)-$(HOST_ARCH),$(filter $(HOST_OS)-$(HOST_ARCH),linux-x86 linux-x86_64))
-ifeq ($(TARGET_ARCH),x86)
-LINKER = linker
-NATIVE_SUFFIX=32
-else
-LINKER = linker64
-NATIVE_SUFFIX=64
-endif
+# We don't build a static benchmark executable because it's not usually
+# useful. If you're trying to run the current benchmarks on an older
+# release, it's (so far at least) always because you want to measure the
+# performance of the old release's libc, and a static benchmark isn't
+# going to let you do that.
 
-bionic-benchmarks-run-on-host: bionic-benchmarks $(TARGET_OUT_EXECUTABLES)/$(LINKER) $(TARGET_OUT_EXECUTABLES)/sh
-	if [ ! -d /system -o ! -d /system/bin ]; then \
-	  echo "Attempting to create /system/bin"; \
-	  sudo mkdir -p -m 0777 /system/bin; \
-	fi
-	mkdir -p $(TARGET_OUT_DATA)/local/tmp
-	cp $(TARGET_OUT_EXECUTABLES)/$(LINKER) /system/bin
-	cp $(TARGET_OUT_EXECUTABLES)/sh /system/bin
+# Build benchmarks for the host (against glibc!). Run with:
+include $(CLEAR_VARS)
+LOCAL_MODULE := bionic-benchmarks-glibc
+LOCAL_MODULE_STEM_32 := bionic-benchmarks-glibc32
+LOCAL_MODULE_STEM_64 := bionic-benchmarks-glibc64
+LOCAL_MULTILIB := both
+LOCAL_ADDITIONAL_DEPENDENCIES := $(LOCAL_PATH)/Android.mk
+LOCAL_CFLAGS += $(benchmark_c_flags)
+LOCAL_LDFLAGS += -lrt
+LOCAL_SRC_FILES := $(benchmark_src_files)
+LOCAL_CXX_STL := libc++
+include $(BUILD_HOST_EXECUTABLE)
+
+ifeq ($(HOST_OS)-$(HOST_ARCH),$(filter $(HOST_OS)-$(HOST_ARCH),linux-x86 linux-x86_64))
+include $(LOCAL_PATH)/../build/run-on-host.mk
+
+ifeq ($(TARGET_ARCH),$(filter $(TARGET_ARCH),x86 x86_64))
+bionic-benchmarks-run-on-host32: bionic-benchmarks bionic-prepare-run-on-host
 	ANDROID_DATA=$(TARGET_OUT_DATA) \
 	ANDROID_ROOT=$(TARGET_OUT) \
-	LD_LIBRARY_PATH=$(TARGET_OUT_SHARED_LIBRARIES) \
-		$(TARGET_OUT_EXECUTABLES)/bionic-benchmarks$(NATIVE_SUFFIX) $(BIONIC_BENCHMARKS_FLAGS)
-endif # linux-x86
+		$(TARGET_OUT_EXECUTABLES)/bionic-benchmarks32 $(BIONIC_BENCHMARKS_FLAGS)
+endif
+
+ifeq ($(TARGET_IS_64_BIT),true)
+bionic-benchmarks-run-on-host64: bionic-benchmarks bionic-prepare-run-on-host
+	ANDROID_DATA=$(TARGET_OUT_DATA) \
+	ANDROID_ROOT=$(TARGET_OUT) \
+		$(TARGET_OUT_EXECUTABLES)/bionic-benchmarks64 $(BIONIC_BENCHMARKS_FLAGS)
+endif
+
+endif
 
 endif # !BUILD_TINY_ANDROID

benchmarks/benchmark_main.cpp

@@ -19,6 +19,7 @@
 #include <regex.h>
 #include <stdio.h>
 #include <stdlib.h>
+#include <time.h>
 
 #include <string>
 #include <map>

benchmarks/math_benchmark.cpp

@@ -20,8 +20,8 @@
 #include <math.h>
 
 // Avoid optimization.
-double d;
-double v;
+volatile double d;
+volatile double v;
 
 static void BM_math_sqrt(int iters) {
   StartBenchmarkTiming();

benchmarks/pthread_benchmark.cpp

@@ -80,7 +80,7 @@ BENCHMARK(BM_pthread_mutex_lock);
 
 static void BM_pthread_mutex_lock_ERRORCHECK(int iters) {
   StopBenchmarkTiming();
-  pthread_mutex_t mutex = PTHREAD_ERRORCHECK_MUTEX_INITIALIZER;
+  pthread_mutex_t mutex = PTHREAD_ERRORCHECK_MUTEX_INITIALIZER_NP;
   StartBenchmarkTiming();
 
   for (int i = 0; i < iters; ++i) {
@@ -94,7 +94,7 @@ BENCHMARK(BM_pthread_mutex_lock_ERRORCHECK);
 
 static void BM_pthread_mutex_lock_RECURSIVE(int iters) {
   StopBenchmarkTiming();
-  pthread_mutex_t mutex = PTHREAD_RECURSIVE_MUTEX_INITIALIZER;
+  pthread_mutex_t mutex = PTHREAD_RECURSIVE_MUTEX_INITIALIZER_NP;
   StartBenchmarkTiming();
 
   for (int i = 0; i < iters; ++i) {
@@ -105,3 +105,35 @@ static void BM_pthread_mutex_lock_RECURSIVE(int iters) {
   StopBenchmarkTiming();
 }
 BENCHMARK(BM_pthread_mutex_lock_RECURSIVE);
+
+static void BM_pthread_rw_lock_read(int iters) {
+  StopBenchmarkTiming();
+  pthread_rwlock_t lock;
+  pthread_rwlock_init(&lock, NULL);
+  StartBenchmarkTiming();
+
+  for (int i = 0; i < iters; ++i) {
+    pthread_rwlock_rdlock(&lock);
+    pthread_rwlock_unlock(&lock);
+  }
+
+  StopBenchmarkTiming();
+  pthread_rwlock_destroy(&lock);
+}
+BENCHMARK(BM_pthread_rw_lock_read);
+
+static void BM_pthread_rw_lock_write(int iters) {
+  StopBenchmarkTiming();
+  pthread_rwlock_t lock;
+  pthread_rwlock_init(&lock, NULL);
+  StartBenchmarkTiming();
+
+  for (int i = 0; i < iters; ++i) {
+    pthread_rwlock_wrlock(&lock);
+    pthread_rwlock_unlock(&lock);
+  }
+
+  StopBenchmarkTiming();
+  pthread_rwlock_destroy(&lock);
+}
+BENCHMARK(BM_pthread_rw_lock_write);

benchmarks/stdio_benchmark.cpp

@@ -25,14 +25,19 @@
     Arg(1)->Arg(2)->Arg(3)->Arg(4)->Arg(8)->Arg(16)->Arg(32)->Arg(64)->Arg(512)-> \
     Arg(1*KB)->Arg(4*KB)->Arg(8*KB)->Arg(16*KB)->Arg(64*KB)
 
-static void BM_stdio_fread(int iters, int chunk_size) {
+template <typename Fn>
+static void ReadWriteTest(int iters, int chunk_size, Fn f, bool buffered) {
   StopBenchmarkTiming();
   FILE* fp = fopen("/dev/zero", "rw");
   char* buf = new char[chunk_size];
   StartBenchmarkTiming();
 
+  if (!buffered) {
+    setvbuf(fp, 0, _IONBF, 0);
+  }
+
   for (int i = 0; i < iters; ++i) {
-    fread(buf, chunk_size, 1, fp);
+    f(buf, chunk_size, 1, fp);
   }
 
   StopBenchmarkTiming();
@@ -40,22 +45,23 @@ static void BM_stdio_fread(int iters, int chunk_size) {
   delete[] buf;
   fclose(fp);
 }
+
+static void BM_stdio_fread(int iters, int chunk_size) {
+  ReadWriteTest(iters, chunk_size, fread, true);
+}
 BENCHMARK(BM_stdio_fread)->AT_COMMON_SIZES;
 
-
 static void BM_stdio_fwrite(int iters, int chunk_size) {
-  StopBenchmarkTiming();
-  FILE* fp = fopen("/dev/zero", "rw");
-  char* buf = new char[chunk_size];
-  StartBenchmarkTiming();
-
-  for (int i = 0; i < iters; ++i) {
-      fwrite(buf, chunk_size, 1, fp);
-  }
-
-  StopBenchmarkTiming();
-  SetBenchmarkBytesProcessed(int64_t(iters) * int64_t(chunk_size));
-  delete[] buf;
-  fclose(fp);
+  ReadWriteTest(iters, chunk_size, fwrite, true);
 }
 BENCHMARK(BM_stdio_fwrite)->AT_COMMON_SIZES;
+
+static void BM_stdio_fread_unbuffered(int iters, int chunk_size) {
+  ReadWriteTest(iters, chunk_size, fread, false);
+}
+BENCHMARK(BM_stdio_fread_unbuffered)->AT_COMMON_SIZES;
+
+static void BM_stdio_fwrite_unbuffered(int iters, int chunk_size) {
+  ReadWriteTest(iters, chunk_size, fwrite, false);
+}
+BENCHMARK(BM_stdio_fwrite_unbuffered)->AT_COMMON_SIZES;

benchmarks/time_benchmark.cpp

@@ -16,7 +16,9 @@
 
 #include "benchmark.h"
 
+#include <unistd.h>
 #include <sys/syscall.h>
+#include <sys/time.h>
 #include <time.h>
 
 static void BM_time_clock_gettime(int iters) {

benchmarks/unistd_benchmark.cpp

@@ -41,6 +41,8 @@ static void BM_unistd_getpid_syscall(int iters) {
 }
 BENCHMARK(BM_unistd_getpid_syscall);
 
+#if defined(__BIONIC__)
+
 // Stop GCC optimizing out our pure function.
 /* Must not be static! */ pid_t (*gettid_fp)() = gettid;
 
@@ -55,6 +57,8 @@ static void BM_unistd_gettid(int iters) {
 }
 BENCHMARK(BM_unistd_gettid);
 
+#endif
+
 static void BM_unistd_gettid_syscall(int iters) {
   StartBenchmarkTiming();
 

build/run-on-host.mk

@@ -0,0 +1,44 @@
+#
+# Copyright (C) 2014 The Android Open Source Project
+#
+# Licensed under the Apache License, Version 2.0 (the "License");
+# you may not use this file except in compliance with the License.
+# You may obtain a copy of the License at
+#
+#      http://www.apache.org/licenses/LICENSE-2.0
+#
+# Unless required by applicable law or agreed to in writing, software
+# distributed under the License is distributed on an "AS IS" BASIS,
+# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+# See the License for the specific language governing permissions and
+# limitations under the License.
+#
+
+# Include once
+ifneq ($(bionic_run_on_host_mk_included),true)
+bionic_run_on_host_mk_included:=true
+
+ifneq ($(TARGET_ARCH),$(filter $(TARGET_ARCH),arm mips x86))
+LINKER = linker64
+else
+LINKER = linker
+endif
+
+ifeq ($(TARGET_ARCH),$(filter $(TARGET_ARCH),x86 x86_64))
+# gtest needs ANDROID_DATA/local/tmp for death test output.
+# Make sure to create ANDROID_DATA/local/tmp if doesn't exist.
+# bionic itself should always work relative to ANDROID_DATA or ANDROID_ROOT.
+bionic-prepare-run-on-host: $(TARGET_OUT_EXECUTABLES)/$(LINKER) $(TARGET_OUT)/etc/hosts $(TARGET_OUT_EXECUTABLES)/sh
+	if [ ! -d /system ]; then \
+	  echo "Attempting to create /system"; \
+	  sudo mkdir -p -m 0777 /system; \
+	fi
+	mkdir -p $(TARGET_OUT_DATA)/local/tmp
+	ln -fs `realpath $(TARGET_OUT)/bin` /system/
+	ln -fs `realpath $(TARGET_OUT)/etc` /system/
+	ln -fs `realpath $(TARGET_OUT)/lib` /system/
+	if [ -d "$(TARGET_OUT)/lib64" ]; then \
+	  ln -fs `realpath $(TARGET_OUT)/lib64` /system/; \
+	fi
+endif
+endif

libc/Android.mk

@@ -1,5 +1,7 @@
 LOCAL_PATH := $(call my-dir)
 
+bionic_coverage := false
+
 # Make everything depend on any changes to included makefiles.
 libc_common_additional_dependencies := $(LOCAL_PATH)/Android.mk
 
@@ -38,12 +40,9 @@ endif
 # =========================================================
 libc_common_src_files := \
     bionic/bindresvport.c \
-    bionic/daemon.c \
-    bionic/err.c \
     bionic/ether_aton.c \
     bionic/ether_ntoa.c \
     bionic/fts.c \
-    bionic/gethostname.c \
     bionic/getpriority.c \
     bionic/if_indextoname.c \
     bionic/if_nametoindex.c \
@@ -51,11 +50,9 @@ libc_common_src_files := \
     bionic/ioctl.c \
     bionic/isatty.c \
     bionic/memmem.c \
-    bionic/pathconf.c \
     bionic/pututline.c \
     bionic/sched_cpualloc.c \
     bionic/sched_cpucount.c \
-    bionic/semaphore.c \
     bionic/sigblock.c \
     bionic/siginterrupt.c \
     bionic/sigsetmask.c \
@@ -64,6 +61,7 @@ libc_common_src_files := \
     stdio/fread.c \
     stdio/snprintf.c\
     stdio/sprintf.c \
+    stdio/stdio_ext.cpp \
 
 # Fortify implementations of libc functions.
 libc_common_src_files += \
@@ -92,6 +90,7 @@ libc_bionic_src_files := \
     bionic/access.cpp \
     bionic/assert.cpp \
     bionic/atof.cpp \
+    bionic/bionic_systrace.cpp \
     bionic/bionic_time_conversions.cpp \
     bionic/brk.cpp \
     bionic/c16rtomb.cpp \
@@ -100,6 +99,8 @@ libc_bionic_src_files := \
     bionic/chown.cpp \
     bionic/clearenv.cpp \
     bionic/clock.cpp \
+    bionic/clock_getcpuclockid.cpp \
+    bionic/clock_nanosleep.cpp \
     bionic/clone.cpp \
     bionic/__cmsg_nxthdr.cpp \
     bionic/connect.cpp \
@@ -120,9 +121,11 @@ libc_bionic_src_files := \
     bionic/getauxval.cpp \
     bionic/getcwd.cpp \
     bionic/getentropy_linux.c \
+    bionic/gethostname.cpp \
     bionic/getpgrp.cpp \
     bionic/getpid.cpp \
     bionic/gettid.cpp \
+    bionic/__gnu_basename.cpp \
     bionic/inotify_init.cpp \
     bionic/lchown.cpp \
     bionic/lfs64_support.cpp \
@@ -134,6 +137,7 @@ libc_bionic_src_files := \
     bionic/link.cpp \
     bionic/locale.cpp \
     bionic/lstat.cpp \
+    bionic/malloc_info.cpp \
     bionic/mbrtoc16.cpp \
     bionic/mbrtoc32.cpp \
     bionic/mbstate.cpp \
@@ -143,11 +147,13 @@ libc_bionic_src_files := \
     bionic/mntent.cpp \
     bionic/NetdClientDispatch.cpp \
     bionic/open.cpp \
+    bionic/pathconf.cpp \
     bionic/pause.cpp \
     bionic/pipe.cpp \
     bionic/poll.cpp \
     bionic/posix_fadvise.cpp \
     bionic/posix_fallocate.cpp \
+    bionic/posix_madvise.cpp \
     bionic/posix_timers.cpp \
     bionic/pthread_atfork.cpp \
     bionic/pthread_attr.cpp \
@@ -182,6 +188,7 @@ libc_bionic_src_files := \
     bionic/scandir.cpp \
     bionic/sched_getaffinity.cpp \
     bionic/sched_getcpu.cpp \
+    bionic/semaphore.cpp \
     bionic/send.cpp \
     bionic/setegid.cpp \
     bionic/__set_errno.cpp \
@@ -197,24 +204,22 @@ libc_bionic_src_files := \
     bionic/signalfd.cpp \
     bionic/sigpending.cpp \
     bionic/sigprocmask.cpp \
+    bionic/sigqueue.cpp \
     bionic/sigsuspend.cpp \
+    bionic/sigtimedwait.cpp \
     bionic/sigwait.cpp \
+    bionic/sigwaitinfo.cpp \
     bionic/socket.cpp \
     bionic/stat.cpp \
     bionic/statvfs.cpp \
-    bionic/strcoll_l.cpp \
     bionic/strerror.cpp \
     bionic/strerror_r.cpp \
-    bionic/strftime_l.cpp \
     bionic/strsignal.cpp \
     bionic/strtold.cpp \
-    bionic/strtold_l.cpp \
-    bionic/strtoll_l.cpp \
-    bionic/strtoull_l.cpp \
-    bionic/strxfrm_l.cpp \
     bionic/stubs.cpp \
     bionic/symlink.cpp \
     bionic/sysconf.cpp \
+    bionic/sysinfo.cpp \
     bionic/syslog.cpp \
     bionic/sys_siglist.c \
     bionic/sys_signame.c \
@@ -240,9 +245,6 @@ libc_upstream_freebsd_src_files := \
     upstream-freebsd/lib/libc/gen/ldexp.c \
     upstream-freebsd/lib/libc/gen/sleep.c \
     upstream-freebsd/lib/libc/gen/usleep.c \
-    upstream-freebsd/lib/libc/stdio/fclose.c \
-    upstream-freebsd/lib/libc/stdio/flags.c \
-    upstream-freebsd/lib/libc/stdio/fopen.c \
     upstream-freebsd/lib/libc/stdlib/abs.c \
     upstream-freebsd/lib/libc/stdlib/getopt_long.c \
     upstream-freebsd/lib/libc/stdlib/imaxabs.c \
@@ -288,8 +290,8 @@ libc_upstream_netbsd_src_files := \
     upstream-netbsd/lib/libc/stdlib/div.c \
     upstream-netbsd/lib/libc/stdlib/drand48.c \
     upstream-netbsd/lib/libc/stdlib/erand48.c \
-    upstream-netbsd/lib/libc/stdlib/insque.c \
     upstream-netbsd/lib/libc/stdlib/jrand48.c \
+    upstream-netbsd/lib/libc/stdlib/lcong48.c \
     upstream-netbsd/lib/libc/stdlib/ldiv.c \
     upstream-netbsd/lib/libc/stdlib/lldiv.c \
     upstream-netbsd/lib/libc/stdlib/lrand48.c \
@@ -297,14 +299,12 @@ libc_upstream_netbsd_src_files := \
     upstream-netbsd/lib/libc/stdlib/nrand48.c \
     upstream-netbsd/lib/libc/stdlib/_rand48.c \
     upstream-netbsd/lib/libc/stdlib/rand_r.c \
-    upstream-netbsd/lib/libc/stdlib/remque.c \
     upstream-netbsd/lib/libc/stdlib/seed48.c \
     upstream-netbsd/lib/libc/stdlib/srand48.c \
     upstream-netbsd/lib/libc/string/memccpy.c \
     upstream-netbsd/lib/libc/string/strcasestr.c \
     upstream-netbsd/lib/libc/string/strcoll.c \
     upstream-netbsd/lib/libc/string/strxfrm.c \
-    upstream-netbsd/lib/libc/unistd/killpg.c \
 
 libc_upstream_openbsd_gdtoa_src_files := \
     upstream-openbsd/android/gdtoa_support.cpp \
@@ -334,10 +334,14 @@ libc_upstream_openbsd_gdtoa_src_files_64 := \
     upstream-openbsd/lib/libc/gdtoa/strtorQ.c \
 
 libc_upstream_openbsd_src_files := \
+    upstream-openbsd/lib/libc/compat-43/killpg.c \
     upstream-openbsd/lib/libc/crypt/arc4random.c \
     upstream-openbsd/lib/libc/crypt/arc4random_uniform.c \
     upstream-openbsd/lib/libc/gen/alarm.c \
     upstream-openbsd/lib/libc/gen/ctype_.c \
+    upstream-openbsd/lib/libc/gen/daemon.c \
+    upstream-openbsd/lib/libc/gen/err.c \
+    upstream-openbsd/lib/libc/gen/errx.c \
     upstream-openbsd/lib/libc/gen/exec.c \
     upstream-openbsd/lib/libc/gen/fnmatch.c \
     upstream-openbsd/lib/libc/gen/ftok.c \
@@ -347,6 +351,12 @@ libc_upstream_openbsd_src_files := \
     upstream-openbsd/lib/libc/gen/time.c \
     upstream-openbsd/lib/libc/gen/tolower_.c \
     upstream-openbsd/lib/libc/gen/toupper_.c \
+    upstream-openbsd/lib/libc/gen/verr.c \
+    upstream-openbsd/lib/libc/gen/verrx.c \
+    upstream-openbsd/lib/libc/gen/vwarn.c \
+    upstream-openbsd/lib/libc/gen/vwarnx.c \
+    upstream-openbsd/lib/libc/gen/warn.c \
+    upstream-openbsd/lib/libc/gen/warnx.c \
     upstream-openbsd/lib/libc/locale/btowc.c \
     upstream-openbsd/lib/libc/locale/mbrlen.c \
     upstream-openbsd/lib/libc/locale/mbstowcs.c \
@@ -380,6 +390,7 @@ libc_upstream_openbsd_src_files := \
     upstream-openbsd/lib/libc/stdio/asprintf.c \
     upstream-openbsd/lib/libc/stdio/clrerr.c \
     upstream-openbsd/lib/libc/stdio/dprintf.c \
+    upstream-openbsd/lib/libc/stdio/fclose.c \
     upstream-openbsd/lib/libc/stdio/fdopen.c \
     upstream-openbsd/lib/libc/stdio/feof.c \
     upstream-openbsd/lib/libc/stdio/ferror.c \
@@ -391,6 +402,9 @@ libc_upstream_openbsd_src_files := \
     upstream-openbsd/lib/libc/stdio/fgetwc.c \
     upstream-openbsd/lib/libc/stdio/fgetws.c \
     upstream-openbsd/lib/libc/stdio/fileno.c \
+    upstream-openbsd/lib/libc/stdio/flags.c \
+    upstream-openbsd/lib/libc/stdio/fmemopen.c \
+    upstream-openbsd/lib/libc/stdio/fopen.c \
     upstream-openbsd/lib/libc/stdio/fprintf.c \
     upstream-openbsd/lib/libc/stdio/fpurge.c \
     upstream-openbsd/lib/libc/stdio/fputc.c \
@@ -418,6 +432,8 @@ libc_upstream_openbsd_src_files := \
     upstream-openbsd/lib/libc/stdio/getwchar.c \
     upstream-openbsd/lib/libc/stdio/makebuf.c \
     upstream-openbsd/lib/libc/stdio/mktemp.c \
+    upstream-openbsd/lib/libc/stdio/open_memstream.c \
+    upstream-openbsd/lib/libc/stdio/open_wmemstream.c \
     upstream-openbsd/lib/libc/stdio/perror.c \
     upstream-openbsd/lib/libc/stdio/printf.c \
     upstream-openbsd/lib/libc/stdio/putc.c \
@@ -466,7 +482,10 @@ libc_upstream_openbsd_src_files := \
     upstream-openbsd/lib/libc/stdlib/atoll.c \
     upstream-openbsd/lib/libc/stdlib/exit.c \
     upstream-openbsd/lib/libc/stdlib/getenv.c \
+    upstream-openbsd/lib/libc/stdlib/insque.c \
     upstream-openbsd/lib/libc/stdlib/lsearch.c \
+    upstream-openbsd/lib/libc/stdlib/reallocarray.c \
+    upstream-openbsd/lib/libc/stdlib/remque.c \
     upstream-openbsd/lib/libc/stdlib/setenv.c \
     upstream-openbsd/lib/libc/stdlib/strtoimax.c \
     upstream-openbsd/lib/libc/stdlib/strtol.c \
@@ -535,13 +554,6 @@ ifneq ($(BOARD_MALLOC_ALIGNMENT),)
   libc_common_cflags += -DMALLOC_ALIGNMENT=$(BOARD_MALLOC_ALIGNMENT)
 endif
 
-# Define ANDROID_SMP appropriately.
-ifeq ($(TARGET_CPU_SMP),true)
-    libc_common_cflags += -DANDROID_SMP=1
-else
-    libc_common_cflags += -DANDROID_SMP=0
-endif
-
 # Define some common conlyflags
 libc_common_conlyflags := \
     -std=gnu99
@@ -586,7 +598,10 @@ LOCAL_C_INCLUDES := $(libc_common_c_includes)
 LOCAL_MODULE := libc_stack_protector
 LOCAL_CLANG := $(use_clang)
 LOCAL_ADDITIONAL_DEPENDENCIES := $(libc_common_additional_dependencies)
+LOCAL_CXX_STL := none
 LOCAL_SYSTEM_SHARED_LIBRARIES :=
+LOCAL_ADDRESS_SANITIZER := false
+LOCAL_NATIVE_COVERAGE := $(bionic_coverage)
 
 $(eval $(call patch-up-arch-specific-flags,LOCAL_CFLAGS,libc_common_cflags))
 include $(BUILD_STATIC_LIBRARY)
@@ -624,7 +639,10 @@ LOCAL_C_INCLUDES := $(libc_common_c_includes) $(LOCAL_PATH)/tzcode/
 LOCAL_MODULE := libc_tzcode
 LOCAL_CLANG := $(use_clang)
 LOCAL_ADDITIONAL_DEPENDENCIES := $(libc_common_additional_dependencies)
+LOCAL_CXX_STL := none
 LOCAL_SYSTEM_SHARED_LIBRARIES :=
+LOCAL_ADDRESS_SANITIZER := false
+LOCAL_NATIVE_COVERAGE := $(bionic_coverage)
 
 $(eval $(call patch-up-arch-specific-flags,LOCAL_CFLAGS,libc_common_cflags))
 include $(BUILD_STATIC_LIBRARY)
@@ -642,7 +660,13 @@ LOCAL_SRC_FILES := \
     upstream-netbsd/lib/libc/isc/ev_timers.c \
     upstream-netbsd/lib/libc/resolv/mtctxres.c \
 
-LOCAL_CFLAGS := \
+# We use the OpenBSD res_random.
+LOCAL_CFLAGS += \
+    -Dres_randomid=__res_randomid
+LOCAL_SRC_FILES += \
+    upstream-openbsd/lib/libc/net/res_random.c \
+
+LOCAL_CFLAGS += \
     $(libc_common_cflags) \
     -DANDROID_CHANGES \
     -DINET6 \
@@ -660,7 +684,10 @@ LOCAL_C_INCLUDES := $(libc_common_c_includes)
 LOCAL_MODULE := libc_dns
 LOCAL_CLANG := $(use_clang)
 LOCAL_ADDITIONAL_DEPENDENCIES := $(libc_common_additional_dependencies)
+LOCAL_CXX_STL := none
 LOCAL_SYSTEM_SHARED_LIBRARIES :=
+LOCAL_ADDRESS_SANITIZER := false
+LOCAL_NATIVE_COVERAGE := $(bionic_coverage)
 
 $(eval $(call patch-up-arch-specific-flags,LOCAL_CFLAGS,libc_common_cflags))
 include $(BUILD_STATIC_LIBRARY)
@@ -689,7 +716,10 @@ LOCAL_C_INCLUDES := $(libc_common_c_includes)
 LOCAL_MODULE := libc_freebsd
 LOCAL_CLANG := $(use_clang)
 LOCAL_ADDITIONAL_DEPENDENCIES := $(libc_common_additional_dependencies)
+LOCAL_CXX_STL := none
 LOCAL_SYSTEM_SHARED_LIBRARIES :=
+LOCAL_ADDRESS_SANITIZER := false
+LOCAL_NATIVE_COVERAGE := $(bionic_coverage)
 
 $(eval $(call patch-up-arch-specific-flags,LOCAL_CFLAGS,libc_common_cflags))
 $(eval $(call patch-up-arch-specific-flags,LOCAL_SRC_FILES,libc_freebsd_src_files))
@@ -720,7 +750,10 @@ LOCAL_C_INCLUDES := $(libc_common_c_includes)
 LOCAL_MODULE := libc_netbsd
 LOCAL_CLANG := $(use_clang)
 LOCAL_ADDITIONAL_DEPENDENCIES := $(libc_common_additional_dependencies)
+LOCAL_CXX_STL := none
 LOCAL_SYSTEM_SHARED_LIBRARIES :=
+LOCAL_ADDRESS_SANITIZER := false
+LOCAL_NATIVE_COVERAGE := $(bionic_coverage)
 
 $(eval $(call patch-up-arch-specific-flags,LOCAL_CFLAGS,libc_common_cflags))
 $(eval $(call patch-up-arch-specific-flags,LOCAL_SRC_FILES,libc_netbsd_src_files))
@@ -746,7 +779,9 @@ endif
 
 LOCAL_CFLAGS := \
     $(libc_common_cflags) \
-    -Wno-sign-compare -Wno-uninitialized -Wno-unused-parameter \
+    -Wno-sign-compare \
+    -Wno-uninitialized \
+    -Wno-unused-parameter \
     -I$(LOCAL_PATH)/private \
     -I$(LOCAL_PATH)/upstream-openbsd/android/include \
     -I$(LOCAL_PATH)/upstream-openbsd/lib/libc/include \
@@ -758,7 +793,10 @@ LOCAL_CPPFLAGS := $(libc_common_cppflags)
 LOCAL_C_INCLUDES := $(libc_common_c_includes)
 LOCAL_MODULE := libc_openbsd
 LOCAL_ADDITIONAL_DEPENDENCIES := $(libc_common_additional_dependencies)
+LOCAL_CXX_STL := none
 LOCAL_SYSTEM_SHARED_LIBRARIES :=
+LOCAL_ADDRESS_SANITIZER := false
+LOCAL_NATIVE_COVERAGE := $(bionic_coverage)
 
 $(eval $(call patch-up-arch-specific-flags,LOCAL_CFLAGS,libc_common_cflags))
 $(eval $(call patch-up-arch-specific-flags,LOCAL_SRC_FILES,libc_openbsd_src_files))
@@ -797,7 +835,10 @@ LOCAL_CPPFLAGS := $(libc_common_cppflags)
 LOCAL_C_INCLUDES := $(libc_common_c_includes)
 LOCAL_MODULE := libc_gdtoa
 LOCAL_ADDITIONAL_DEPENDENCIES := $(libc_common_additional_dependencies)
+LOCAL_CXX_STL := none
 LOCAL_SYSTEM_SHARED_LIBRARIES :=
+LOCAL_ADDRESS_SANITIZER := false
+LOCAL_NATIVE_COVERAGE := $(bionic_coverage)
 
 $(eval $(call patch-up-arch-specific-flags,LOCAL_CFLAGS,libc_common_cflags))
 include $(BUILD_STATIC_LIBRARY)
@@ -813,18 +854,23 @@ LOCAL_SRC_FILES := $(libc_bionic_src_files)
 LOCAL_CFLAGS := $(libc_common_cflags) \
     -Wframe-larger-than=2048 \
 
-ifeq ($(TARGET_ARCH),x86_64)
-  # Clang assembler has problem with ssse3-strcmp-slm.S, http://b/17302991
-  LOCAL_CLANG_ASFLAGS += -no-integrated-as
-endif
+# ssse3-strcmp-slm.S does not compile with Clang.
+LOCAL_CLANG_ASFLAGS_x86_64 += -no-integrated-as
+
+# memcpy.S, memchr.S, etc. do not compile with Clang.
+LOCAL_CLANG_ASFLAGS_arm += -no-integrated-as
+LOCAL_CLANG_ASFLAGS_arm64 += -no-integrated-as
 
 LOCAL_CONLYFLAGS := $(libc_common_conlyflags)
 LOCAL_CPPFLAGS := $(libc_common_cppflags)
-LOCAL_C_INCLUDES := $(libc_common_c_includes)
+LOCAL_C_INCLUDES := $(libc_common_c_includes) bionic/libstdc++/include
 LOCAL_MODULE := libc_bionic
 LOCAL_CLANG := $(use_clang)
 LOCAL_ADDITIONAL_DEPENDENCIES := $(libc_common_additional_dependencies)
+LOCAL_CXX_STL := none
 LOCAL_SYSTEM_SHARED_LIBRARIES :=
+LOCAL_ADDRESS_SANITIZER := false
+LOCAL_NATIVE_COVERAGE := $(bionic_coverage)
 
 $(eval $(call patch-up-arch-specific-flags,LOCAL_CFLAGS,libc_common_cflags))
 $(eval $(call patch-up-arch-specific-flags,LOCAL_SRC_FILES,libc_bionic_src_files))
@@ -843,12 +889,14 @@ LOCAL_CFLAGS := $(libc_common_cflags) \
 
 LOCAL_CONLYFLAGS := $(libc_common_conlyflags)
 LOCAL_CPPFLAGS := $(libc_common_cppflags)
-LOCAL_C_INCLUDES := $(libc_common_c_includes)
+LOCAL_C_INCLUDES := $(libc_common_c_includes) bionic/libstdc++/include
 LOCAL_MODULE := libc_cxa
-# GCC refuses to hide new/delete
-LOCAL_CLANG := true
+LOCAL_CLANG := true # GCC refuses to hide new/delete
 LOCAL_ADDITIONAL_DEPENDENCIES := $(libc_common_additional_dependencies)
+LOCAL_CXX_STL := none
 LOCAL_SYSTEM_SHARED_LIBRARIES :=
+LOCAL_ADDRESS_SANITIZER := false
+LOCAL_NATIVE_COVERAGE := $(bionic_coverage)
 
 include $(BUILD_STATIC_LIBRARY)
 
@@ -866,7 +914,10 @@ endif
 LOCAL_MODULE := libc_syscalls
 LOCAL_CLANG := $(use_clang)
 LOCAL_ADDITIONAL_DEPENDENCIES := $(libc_common_additional_dependencies)
+LOCAL_CXX_STL := none
 LOCAL_SYSTEM_SHARED_LIBRARIES :=
+LOCAL_ADDRESS_SANITIZER := false
+LOCAL_NATIVE_COVERAGE := $(bionic_coverage)
 
 include $(BUILD_STATIC_LIBRARY)
 
@@ -885,7 +936,10 @@ LOCAL_MODULE := libc_aeabi
 LOCAL_CLANG := $(use_clang)
 LOCAL_CFLAGS := $(libc_common_cflags) -fno-builtin
 LOCAL_ADDITIONAL_DEPENDENCIES := $(libc_common_additional_dependencies)
+LOCAL_CXX_STL := none
 LOCAL_SYSTEM_SHARED_LIBRARIES :=
+LOCAL_ADDRESS_SANITIZER := false
+LOCAL_NATIVE_COVERAGE := $(bionic_coverage)
 
 include $(BUILD_STATIC_LIBRARY)
 
@@ -922,10 +976,13 @@ ifneq ($(MALLOC_IMPL),dlmalloc)
 LOCAL_WHOLE_STATIC_LIBRARIES += libjemalloc
 endif
 
+LOCAL_CXX_STL := none
 LOCAL_SYSTEM_SHARED_LIBRARIES :=
 
 # TODO: split out the asflags.
 LOCAL_ASFLAGS := $(LOCAL_CFLAGS)
+LOCAL_ADDRESS_SANITIZER := false
+LOCAL_NATIVE_COVERAGE := $(bionic_coverage)
 
 $(eval $(call patch-up-arch-specific-flags,LOCAL_CFLAGS,libc_common_cflags))
 $(eval $(call patch-up-arch-specific-flags,LOCAL_SRC_FILES,libc_common_src_files))
@@ -961,7 +1018,10 @@ LOCAL_MODULE := libc_nomalloc
 LOCAL_CLANG := $(use_clang)
 LOCAL_ADDITIONAL_DEPENDENCIES := $(libc_common_additional_dependencies)
 LOCAL_WHOLE_STATIC_LIBRARIES := libc_common
+LOCAL_CXX_STL := none
 LOCAL_SYSTEM_SHARED_LIBRARIES :=
+LOCAL_ADDRESS_SANITIZER := false
+LOCAL_NATIVE_COVERAGE := $(bionic_coverage)
 
 $(eval $(call patch-up-arch-specific-flags,LOCAL_CFLAGS,libc_common_cflags))
 $(eval $(call patch-up-arch-specific-flags,LOCAL_SRC_FILES,libc_arch_static_src_files))
@@ -982,6 +1042,9 @@ LOCAL_CPPFLAGS := $(libc_common_cppflags)
 LOCAL_C_INCLUDES := $(libc_common_c_includes)
 LOCAL_MODULE := libc_malloc
 LOCAL_CLANG := $(use_clang)
+LOCAL_CXX_STL := none
+LOCAL_ADDRESS_SANITIZER := false
+LOCAL_NATIVE_COVERAGE := $(bionic_coverage)
 LOCAL_ADDITIONAL_DEPENDENCIES := $(libc_common_additional_dependencies)
 include $(BUILD_STATIC_LIBRARY)
 
@@ -1007,7 +1070,10 @@ LOCAL_MODULE := libc
 LOCAL_CLANG := $(use_clang)
 LOCAL_ADDITIONAL_DEPENDENCIES := $(libc_common_additional_dependencies)
 LOCAL_WHOLE_STATIC_LIBRARIES := libc_common
+LOCAL_CXX_STL := none
 LOCAL_SYSTEM_SHARED_LIBRARIES :=
+LOCAL_ADDRESS_SANITIZER := false
+LOCAL_NATIVE_COVERAGE := $(bionic_coverage)
 
 $(eval $(call patch-up-arch-specific-flags,LOCAL_CFLAGS,libc_common_cflags))
 $(eval $(call patch-up-arch-specific-flags,LOCAL_SRC_FILES,libc_arch_static_src_files))
@@ -1049,6 +1115,7 @@ LOCAL_STRIP_MODULE := keep_symbols
 
 LOCAL_SHARED_LIBRARIES := libdl
 LOCAL_WHOLE_STATIC_LIBRARIES := libc_common
+LOCAL_CXX_STL := none
 LOCAL_SYSTEM_SHARED_LIBRARIES :=
 
 # We'd really like to do this for all architectures, but since this wasn't done
@@ -1068,6 +1135,8 @@ LOCAL_SRC_FILES_arm += \
     arch-common/bionic/crtbegin_so.c \
     arch-arm/bionic/atexit_legacy.c \
     arch-common/bionic/crtend_so.S
+LOCAL_ADDRESS_SANITIZER := false
+LOCAL_NATIVE_COVERAGE := $(bionic_coverage)
 
 include $(BUILD_SHARED_LIBRARY)
 
@@ -1085,10 +1154,7 @@ ifneq ($(TARGET_BUILD_VARIANT),user)
 # ========================================================
 include $(CLEAR_VARS)
 
-LOCAL_CFLAGS := \
-    $(libc_common_cflags) \
-    -DMALLOC_LEAK_CHECK \
-
+LOCAL_CFLAGS := $(libc_common_cflags)
 LOCAL_CONLYFLAGS := $(libc_common_conlyflags)
 LOCAL_CPPFLAGS := $(libc_common_cppflags)
 
@@ -1108,14 +1174,17 @@ LOCAL_CLANG := $(use_clang)
 LOCAL_ADDITIONAL_DEPENDENCIES := $(libc_common_additional_dependencies)
 
 LOCAL_SHARED_LIBRARIES := libc libdl
+LOCAL_CXX_STL := none
 LOCAL_SYSTEM_SHARED_LIBRARIES :=
 # Only need this for arm since libc++ uses its own unwind code that
 # doesn't mix with the other default unwind code.
-LOCAL_STATIC_LIBRARIES_arm := libc++
+LOCAL_STATIC_LIBRARIES_arm := libunwind_llvm libc++abi
 LOCAL_ALLOW_UNDEFINED_SYMBOLS := true
 
 # Don't install on release build
 LOCAL_MODULE_TAGS := eng debug
+LOCAL_ADDRESS_SANITIZER := false
+LOCAL_NATIVE_COVERAGE := $(bionic_coverage)
 
 $(eval $(call patch-up-arch-specific-flags,LOCAL_CFLAGS,libc_common_cflags))
 include $(BUILD_SHARED_LIBRARY)
@@ -1144,10 +1213,13 @@ LOCAL_CLANG := $(use_clang)
 LOCAL_ADDITIONAL_DEPENDENCIES := $(libc_common_additional_dependencies)
 
 LOCAL_SHARED_LIBRARIES := libc libdl
+LOCAL_CXX_STL := none
 LOCAL_SYSTEM_SHARED_LIBRARIES :=
 
 # Don't install on release build
 LOCAL_MODULE_TAGS := eng debug
+LOCAL_ADDRESS_SANITIZER := false
+LOCAL_NATIVE_COVERAGE := $(bionic_coverage)
 
 $(eval $(call patch-up-arch-specific-flags,LOCAL_CFLAGS,libc_common_cflags))
 include $(BUILD_SHARED_LIBRARY)
@@ -1164,26 +1236,32 @@ libstdcxx_common_src_files := \
     bionic/libc_logging.cpp \
 
 include $(CLEAR_VARS)
-LOCAL_C_INCLUDES := $(libc_common_c_includes)
+LOCAL_C_INCLUDES := $(libc_common_c_includes) bionic/libstdc++/include
 LOCAL_CFLAGS := $(libc_common_cflags)
 LOCAL_CPPFLAGS := $(libc_common_cppflags)
 LOCAL_SRC_FILES := $(libstdcxx_common_src_files)
 LOCAL_MODULE:= libstdc++
 LOCAL_ADDITIONAL_DEPENDENCIES := $(LOCAL_PATH)/Android.mk
+LOCAL_CXX_STL := none
 LOCAL_SYSTEM_SHARED_LIBRARIES := libc
+LOCAL_ADDRESS_SANITIZER := false
+LOCAL_NATIVE_COVERAGE := $(bionic_coverage)
 include $(BUILD_SHARED_LIBRARY)
 
 # ========================================================
 # libstdc++.a
 # ========================================================
 include $(CLEAR_VARS)
-LOCAL_C_INCLUDES := $(libc_common_c_includes)
+LOCAL_C_INCLUDES := $(libc_common_c_includes) bionic/libstdc++/include
 LOCAL_CFLAGS := $(libc_common_cflags)
 LOCAL_CPPFLAGS := $(libc_common_cppflags)
 LOCAL_SRC_FILES := $(libstdcxx_common_src_files)
 LOCAL_MODULE:= libstdc++
 LOCAL_ADDITIONAL_DEPENDENCIES := $(LOCAL_PATH)/Android.mk
+LOCAL_CXX_STL := none
 LOCAL_SYSTEM_SHARED_LIBRARIES := libc
+LOCAL_ADDRESS_SANITIZER := false
+LOCAL_NATIVE_COVERAGE := $(bionic_coverage)
 include $(BUILD_STATIC_LIBRARY)
 
 

libc/NOTICE

@@ -2510,35 +2510,6 @@ SUCH DAMAGE.
 
 -------------------------------------------------------------------
 
-Copyright (c) 1993
-     The Regents of the University of California.  All rights reserved.
-
-Redistribution and use in source and binary forms, with or without
-modification, are permitted provided that the following conditions
-are met:
-1. Redistributions of source code must retain the above copyright
-   notice, this list of conditions and the following disclaimer.
-2. Redistributions in binary form must reproduce the above copyright
-   notice, this list of conditions and the following disclaimer in the
-   documentation and/or other materials provided with the distribution.
-3. Neither the name of the University nor the names of its contributors
-   may be used to endorse or promote products derived from this software
-   without specific prior written permission.
-
-THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
-ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
-IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
-ARE DISCLAIMED.  IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
-FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
-DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
-OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
-HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
-LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
-OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
-SUCH DAMAGE.
-
--------------------------------------------------------------------
-
 Copyright (c) 1993
    The Regents of the University of California.  All rights reserved.
 
@@ -3131,38 +3102,6 @@ SUCH DAMAGE.
 
 -------------------------------------------------------------------
 
-Copyright (c) 1999 Kungliga Tekniska Högskolan
-(Royal Institute of Technology, Stockholm, Sweden).
-All rights reserved.
-
-Redistribution and use in source and binary forms, with or without
-modification, are permitted provided that the following conditions
-are met:
-
-1. Redistributions of source code must retain the above copyright
-   notice, this list of conditions and the following disclaimer.
-
-2. Redistributions in binary form must reproduce the above copyright
-   notice, this list of conditions and the following disclaimer in the
-   documentation and/or other materials provided with the distribution.
-
-3. Neither the name of KTH nor the names of its contributors may be
-   used to endorse or promote products derived from this software without
-   specific prior written permission.
-
-THIS SOFTWARE IS PROVIDED BY KTH AND ITS CONTRIBUTORS ``AS IS'' AND ANY
-EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
-IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
-PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL KTH OR ITS CONTRIBUTORS BE
-LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
-CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
-SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR
-BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
-WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
-OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF
-
--------------------------------------------------------------------
-
 Copyright (c) 2000 Ben Harris.
 Copyright (C) 1995, 1996, 1997, and 1998 WIDE Project.
 All rights reserved.
@@ -4422,6 +4361,39 @@ SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
 
 -------------------------------------------------------------------
 
+Copyright (c) 2011 Martin Pieuchot <mpi@openbsd.org>
+
+Permission to use, copy, modify, and distribute this software for any
+purpose with or without fee is hereby granted, provided that the above
+copyright notice and this permission notice appear in all copies.
+
+THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
+WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
+MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
+ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
+WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
+ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
+OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
+
+-------------------------------------------------------------------
+
+Copyright (c) 2011 Martin Pieuchot <mpi@openbsd.org>
+Copyright (c) 2009 Ted Unangst
+
+Permission to use, copy, modify, and distribute this software for any
+purpose with or without fee is hereby granted, provided that the above
+copyright notice and this permission notice appear in all copies.
+
+THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
+WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
+MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
+ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
+WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
+ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
+OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
+
+-------------------------------------------------------------------
+
 Copyright (c) 2011 The Android Open Source Project
 Copyright (c) 2008 ARM Ltd
 All rights reserved.
@@ -4853,6 +4825,42 @@ SUCH DAMAGE.
 
 -------------------------------------------------------------------
 
+Copyright 1997 Niels Provos <provos@physnet.uni-hamburg.de>
+Copyright 2008 Damien Miller <djm@openbsd.org>
+All rights reserved.
+
+Theo de Raadt <deraadt@openbsd.org> came up with the idea of using
+such a mathematical system to generate more random (yet non-repeating)
+ids to solve the resolver/named problem.  But Niels designed the
+actual system based on the constraints.
+
+Later modified by Damien Miller to wrap the LCG output in a 15-bit
+permutation generator based on a Luby-Rackoff block cipher. This
+ensures the output is non-repeating and preserves the MSB twiddle
+trick, but makes it more resistant to LCG prediction.
+
+Redistribution and use in source and binary forms, with or without
+modification, are permitted provided that the following conditions
+are met:
+1. Redistributions of source code must retain the above copyright
+   notice, this list of conditions and the following disclaimer.
+2. Redistributions in binary form must reproduce the above copyright
+   notice, this list of conditions and the following disclaimer in the
+   documentation and/or other materials provided with the distribution.
+
+THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+
+-------------------------------------------------------------------
+
 Copyright 2000 David E. O'Brien, John D. Polstra.
 All rights reserved.
 

libc/SYSCALLS.TXT

@@ -101,7 +101,7 @@ int         munmap(void*, size_t)  all
 void*       mremap(void*, size_t, size_t, unsigned long)  all
 int         msync(const void*, size_t, int)    all
 int         mprotect(const void*, size_t, int)  all
-int         madvise(const void*, size_t, int)  all
+int         madvise(void*, size_t, int)  all
 int         mlock(const void* addr, size_t len)    all
 int         munlock(const void* addr, size_t len)   all
 int         mlockall(int flags)   all
@@ -202,9 +202,9 @@ int     swapoff(const char*) all
 int           settimeofday(const struct timeval*, const struct timezone*)   all
 clock_t       times(struct tms*)       all
 int           nanosleep(const struct timespec*, struct timespec*)   all
-int           clock_settime(clockid_t clk_id, const struct timespec* tp)  all
-int           clock_getres(clockid_t clk_id, struct timespec* res)   all
-int           clock_nanosleep(clockid_t clock_id, int flags, const struct timespec* req, struct timespec* rem)  all
+int           clock_settime(clockid_t, const struct timespec*)  all
+int           clock_getres(clockid_t, struct timespec*)   all
+int           __clock_nanosleep:clock_nanosleep(clockid_t, int, const struct timespec*, struct timespec*)  all
 int           getitimer(int, const struct itimerval*)   all
 int           setitimer(int, const struct itimerval*, struct itimerval*)  all
 int           __timer_create:timer_create(clockid_t clockid, struct sigevent* evp, __kernel_timer_t* timerid)    all
@@ -223,6 +223,7 @@ int     __rt_sigpending:rt_sigpending(sigset_t*, size_t)  all
 int     __rt_sigprocmask:rt_sigprocmask(int, const sigset_t*, sigset_t*, size_t)  all
 int     __rt_sigsuspend:rt_sigsuspend(const sigset_t*, size_t)  all
 int     __rt_sigtimedwait:rt_sigtimedwait(const sigset_t*, struct siginfo_t*, struct timespec_t*, size_t)  all
+int     __rt_sigqueueinfo:rt_sigqueueinfo(pid_t, int, siginfo_t*)  all
 int     __signalfd4:signalfd4(int, const sigset_t*, size_t, int)  all
 
 # sockets
@@ -313,6 +314,8 @@ int __set_tid_address:set_tid_address(int*)  all
 int setfsgid(gid_t)  all
 int setfsuid(uid_t)  all
 
+int sethostname(const char*, size_t)  all
+
 pid_t wait4(pid_t, int*, int, struct rusage*)  all
 int __waitid:waitid(int, pid_t, struct siginfo_t*, int, void*)  all
 
@@ -321,7 +324,7 @@ int     __set_tls:__ARM_NR_set_tls(void*)                                 arm
 int     cacheflush:__ARM_NR_cacheflush(long start, long end, long flags)  arm
 
 # MIPS-specific
-int     _flush_cache:cacheflush(char* addr, const int nbytes, const int op) mips,mips64
+int     _flush_cache:cacheflush(char* addr, const int nbytes, const int op) mips
 int     __set_tls:set_thread_area(void*) mips,mips64
 
 # x86-specific

libc/arch-arm/arm.mk

@@ -60,9 +60,7 @@ libc_bionic_src_files_arm += \
     arch-arm/bionic/libgcc_compat.c \
     arch-arm/bionic/memcmp.S \
     arch-arm/bionic/__restore.S \
-    arch-arm/bionic/_setjmp.S \
     arch-arm/bionic/setjmp.S \
-    arch-arm/bionic/sigsetjmp.S \
     arch-arm/bionic/syscall.S \
 
 libc_arch_static_src_files_arm := arch-arm/bionic/exidx_static.c

libc/arch-arm/bionic/__aeabi.c

@@ -39,6 +39,9 @@
 
 extern int __cxa_atexit(void (*)(void*), void*, void*);
 
+// All of these are weak symbols to avoid multiple definition errors when
+// linking with libstdc++-v3 or compiler-rt.
+
 /* The "C++ ABI for ARM" document states that static C++ constructors,
  * which are called from the .init_array, should manually call
  * __aeabi_atexit() to register static destructors explicitly.
@@ -47,35 +50,35 @@ extern int __cxa_atexit(void (*)(void*), void*, void*);
  * variable from the shared object that contains the constructor/destructor
  */
 
-// Make this a weak symbol to avoid a multiple definition error when linking with libstdc++-v3.
 int __attribute__((weak))
 __aeabi_atexit(void *object, void (*destructor) (void *), void *dso_handle) {
     return __cxa_atexit(destructor, object, dso_handle);
 }
 
 
-void __aeabi_memcpy8(void *dest, const void *src, size_t n) {
+void __attribute__((weak))
+__aeabi_memcpy8(void *dest, const void *src, size_t n) {
     memcpy(dest, src, n);
 }
 
-void __aeabi_memcpy4(void *dest, const void *src, size_t n) {
+void __attribute__((weak)) __aeabi_memcpy4(void *dest, const void *src, size_t n) {
     memcpy(dest, src, n);
 }
 
-void __aeabi_memcpy(void *dest, const void *src, size_t n) {
+void __attribute__((weak)) __aeabi_memcpy(void *dest, const void *src, size_t n) {
     memcpy(dest, src, n);
 }
 
 
-void __aeabi_memmove8(void *dest, const void *src, size_t n) {
+void __attribute__((weak)) __aeabi_memmove8(void *dest, const void *src, size_t n) {
     memmove(dest, src, n);
 }
 
-void __aeabi_memmove4(void *dest, const void *src, size_t n) {
+void __attribute__((weak)) __aeabi_memmove4(void *dest, const void *src, size_t n) {
     memmove(dest, src, n);
 }
 
-void __aeabi_memmove(void *dest, const void *src, size_t n) {
+void __attribute__((weak)) __aeabi_memmove(void *dest, const void *src, size_t n) {
     memmove(dest, src, n);
 }
 
@@ -84,27 +87,27 @@ void __aeabi_memmove(void *dest, const void *src, size_t n) {
  *  This allows __aeabi_memclr to tail-call __aeabi_memset
  */
 
-void __aeabi_memset8(void *dest, size_t n, int c) {
+void __attribute__((weak)) __aeabi_memset8(void *dest, size_t n, int c) {
     memset(dest, c, n);
 }
 
-void __aeabi_memset4(void *dest, size_t n, int c) {
+void __attribute__((weak)) __aeabi_memset4(void *dest, size_t n, int c) {
     memset(dest, c, n);
 }
 
-void __aeabi_memset(void *dest, size_t n, int c) {
+void __attribute__((weak)) __aeabi_memset(void *dest, size_t n, int c) {
     memset(dest, c, n);
 }
 
 
-void __aeabi_memclr8(void *dest, size_t n) {
+void __attribute__((weak)) __aeabi_memclr8(void *dest, size_t n) {
     __aeabi_memset8(dest, n, 0);
 }
 
-void __aeabi_memclr4(void *dest, size_t n) {
+void __attribute__((weak)) __aeabi_memclr4(void *dest, size_t n) {
     __aeabi_memset4(dest, n, 0);
 }
 
-void __aeabi_memclr(void *dest, size_t n) {
+void __attribute__((weak)) __aeabi_memclr(void *dest, size_t n) {
     __aeabi_memset(dest, n, 0);
 }

libc/arch-arm/bionic/__bionic_clone.S

@@ -42,13 +42,14 @@ ENTRY(__bionic_clone)
     # load extra parameters
     ldmfd   ip, {r4, r5, r6}
 
-    # store 'fn' and 'arg' to the child stack
-    str     r5, [r1, #-4]
-    str     r6, [r1, #-8]
+    # Push 'fn' and 'arg' onto the child stack.
+    stmdb   r1!, {r5, r6}
 
-    # System call
+    # Make the system call.
     ldr     r7, =__NR_clone
     swi     #0
+
+    # Are we the child?
     movs    r0, r0
     beq     1f
 
@@ -62,8 +63,8 @@ ENTRY(__bionic_clone)
 1:  # The child.
     # Setting lr to 0 will make the unwinder stop at __start_thread
     mov    lr, #0
-    ldr    r0, [sp, #-4]
-    ldr    r1, [sp, #-8]
+    # Call __start_thread with the 'fn' and 'arg' we stored on the child stack.
+    pop    {r0, r1}
     b      __start_thread
 END(__bionic_clone)
 .hidden __bionic_clone

libc/arch-arm/bionic/_setjmp.S

@@ -1,113 +0,0 @@
-/*	$OpenBSD: _setjmp.S,v 1.2 2004/02/01 05:40:52 drahn Exp $	*/
-/*	$NetBSD: _setjmp.S,v 1.5 2003/04/05 23:08:51 bjh21 Exp $	*/
-
-/*
- * Copyright (c) 1997 Mark Brinicombe
- * Copyright (c) 2010 Android Open Source Project.
- * All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- *    notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- *    notice, this list of conditions and the following disclaimer in the
- *    documentation and/or other materials provided with the distribution.
- * 3. All advertising materials mentioning features or use of this software
- *    must display the following acknowledgement:
- *	This product includes software developed by Mark Brinicombe
- * 4. Neither the name of the University nor the names of its contributors
- *    may be used to endorse or promote products derived from this software
- *    without specific prior written permission.
- *
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- */
-
-#include <private/bionic_asm.h>
-#include <machine/setjmp.h>
-#include <machine/cpu-features.h>
-
-/*
- * C library -- _setjmp, _longjmp
- *
- *	_longjmp(a,v)
- * will generate a "return(v)" from the last call to
- *	_setjmp(a)
- * by restoring registers from the stack.
- * The previous signal state is NOT restored.
- *
- * Note: r0 is the return value
- *       r1-r3 are scratch registers in functions
- */
-
-ENTRY(_setjmp)
-	ldr	r1, .L_setjmp_magic
-	str	r1, [r0, #(_JB_MAGIC * 4)]
-
-	/* Store core registers */
-	add     r1, r0, #(_JB_CORE_BASE * 4)
-	stmia   r1, {r4-r14}
-
-#ifdef __ARM_HAVE_VFP
-	/* Store floating-point registers */
-	add     r1, r0, #(_JB_FLOAT_BASE * 4)
-	vstmia  r1, {d8-d15}
-	/* Store floating-point state */
-	fmrx    r1, fpscr
-	str     r1, [r0, #(_JB_FLOAT_STATE * 4)]
-#endif  /* __ARM_HAVE_VFP */
-
-        mov	r0, #0x00000000
-        bx      lr
-END(_setjmp)
-
-.L_setjmp_magic:
-	.word	_JB_MAGIC__SETJMP
-
-ENTRY(_longjmp)
-	ldr	r2, .L_setjmp_magic
-	ldr	r3, [r0, #(_JB_MAGIC * 4)]
-	teq	r2, r3
-	bne	botch
-
-#ifdef __ARM_HAVE_VFP
-	/* Restore floating-point registers */
-	add     r2, r0, #(_JB_FLOAT_BASE * 4)
-	vldmia  r2, {d8-d15}
-	/* Restore floating-point state */
-	ldr     r2, [r0, #(_JB_FLOAT_STATE * 4)]
-	fmxr    fpscr, r2
-#endif /* __ARM_HAVE_VFP */
-
-	/* Restore core registers */
-	add     r2, r0, #(_JB_CORE_BASE * 4)
-	ldmia   r2, {r4-r14}
-
-	/* Validate sp and r14 */
-	teq	sp, #0
-	teqne	r14, #0
-	beq	botch
-
-	/* Set return value */
-	mov	r0, r1
-	teq	r0, #0x00000000
-	moveq	r0, #0x00000001
-	bx      lr
-
-	/* validation failed, die die die. */
-botch:
-	bl	PIC_SYM(longjmperror, PLT)
-	bl	PIC_SYM(abort, PLT)
-	b	. - 8		/* Cannot get here */
-END(_longjmp)

libc/arch-arm/bionic/abort_arm.S

@@ -40,5 +40,5 @@ ENTRY(abort)
     .cfi_def_cfa_offset 8
     .cfi_rel_offset r3, 0
     .cfi_rel_offset r14, 4
-    bl      PIC_SYM(__libc_android_abort, PLT)
+    bl      __libc_android_abort
 END(abort)

libc/arch-arm/bionic/setjmp.S

@@ -1,6 +1,3 @@
-/*	$OpenBSD: setjmp.S,v 1.2 2004/02/01 05:40:52 drahn Exp $	*/
-/*	$NetBSD: setjmp.S,v 1.5 2003/04/05 23:08:51 bjh21 Exp $	*/
-
 /*
  * Copyright (c) 1997 Mark Brinicombe
  * Copyright (c) 2010 Android Open Source Project.
@@ -35,119 +32,144 @@
  */
 
 #include <private/bionic_asm.h>
-#include <machine/setjmp.h>
-#include <machine/cpu-features.h>
 
-/*
- * C library -- setjmp, longjmp
- *
- *	longjmp(a,v)
- * will generate a "return(v)" from the last call to
- *	setjmp(a)
- * by restoring registers from the stack.
- * The previous signal state is restored.
- */
+// According to the ARM AAPCS document, we only need to save
+// the following registers:
+//
+//  Core   r4-r14
+//
+//  VFP    d8-d15  (see section 5.1.2.1)
+//
+//      Registers s16-s31 (d8-d15, q4-q7) must be preserved across subroutine
+//      calls; registers s0-s15 (d0-d7, q0-q3) do not need to be preserved
+//      (and can be used for passing arguments or returning results in standard
+//      procedure-call variants). Registers d16-d31 (q8-q15), if present, do
+//      not need to be preserved.
+//
+//  FPSCR  saved because glibc does.
+
+// The internal structure of a jmp_buf is totally private.
+// Current layout (may change in the future):
+//
+// word   name         description
+// 0      magic        magic number
+// 1      sigmask      signal mask (not used with _setjmp / _longjmp)
+// 2      float_base   base of float registers (d8 to d15)
+// 18     float_state  floating-point status and control register
+// 19     core_base    base of core registers (r4 to r14)
+// 30     reserved     reserved entries (room to grow)
+// 64
+//
+// NOTE: float_base must be at an even word index, since the
+//       FP registers will be loaded/stored with instructions
+//       that expect 8-byte alignment.
+
+#define _JB_SIGFLAG     0
+#define _JB_SIGMASK     (_JB_SIGFLAG+1)
+#define _JB_FLOAT_BASE  (_JB_SIGMASK+1)
+#define _JB_FLOAT_STATE (_JB_FLOAT_BASE + (15-8+1)*2)
+#define _JB_CORE_BASE   (_JB_FLOAT_STATE+1)
 
 ENTRY(setjmp)
-	/* Block all signals and retrieve the old signal mask */
-	stmfd	sp!, {r0, r14}
-	.cfi_def_cfa_offset 8
-	.cfi_rel_offset r0, 0
-	.cfi_rel_offset r14, 4
-	mov	r0, #0x00000000
-
-	bl	PIC_SYM(sigblock, PLT)
-	mov	r1, r0
-
-	ldmfd	sp!, {r0, r14}
-	.cfi_def_cfa_offset 0
-
-	/* Store signal mask */
-	str	r1, [r0, #(_JB_SIGMASK * 4)]
-
-	ldr	r1, .Lsetjmp_magic
-	str	r1, [r0, #(_JB_MAGIC * 4)]
-
-	/* Store core registers */
-	add     r1, r0, #(_JB_CORE_BASE * 4)
-	stmia   r1, {r4-r14}
-
-#ifdef __ARM_HAVE_VFP
-	/* Store floating-point registers */
-	add     r1, r0, #(_JB_FLOAT_BASE * 4)
-	vstmia  r1, {d8-d15}
-	/* Store floating-point state */
-	fmrx    r1, fpscr
-	str     r1, [r0, #(_JB_FLOAT_STATE * 4)]
-#endif  /* __ARM_HAVE_VFP */
-
-	mov	r0, #0x00000000
-	bx      lr
+  mov r1, #1
+  b sigsetjmp
 END(setjmp)
 
-.Lsetjmp_magic:
-	.word	_JB_MAGIC_SETJMP
+ENTRY(_setjmp)
+  mov r1, #0
+  b sigsetjmp
+END(_setjmp)
 
+// int sigsetjmp(sigjmp_buf env, int save_signal_mask);
+ENTRY(sigsetjmp)
+  // Record whether or not we're saving the signal mask.
+  str r1, [r0, #(_JB_SIGFLAG * 4)]
 
-ENTRY(longjmp)
-	ldr	r2, .Lsetjmp_magic
-	ldr	r3, [r0, #(_JB_MAGIC * 4)]
-	teq	r2, r3
-	bne	botch
+  // Do we need to save the signal mask?
+  teq r1, #0
+  beq 1f
 
-	/* Fetch signal mask */
-	ldr	r2, [r0, #(_JB_SIGMASK * 4)]
+  // Get current signal mask.
+  stmfd sp!, {r0, r14}
+  .cfi_def_cfa_offset 8
+  .cfi_rel_offset r0, 0
+  .cfi_rel_offset r14, 4
+  mov r0, #0
+  bl sigblock
+  mov r1, r0
+  ldmfd sp!, {r0, r14}
+  .cfi_def_cfa_offset 0
 
-	/* Set signal mask */
-	stmfd	sp!, {r0, r1, r14}
-	.cfi_def_cfa_offset 12
-	.cfi_rel_offset r0, 0
-	.cfi_rel_offset r1, 4
-	.cfi_rel_offset r14, 8
-	sub	sp, sp, #4	/* align the stack */
-	.cfi_adjust_cfa_offset 4
+  // Save the signal mask.
+  str r1, [r0, #(_JB_SIGMASK * 4)]
 
-	mov	r0, r2
-	bl	PIC_SYM(sigsetmask, PLT)
+1:
+  // Save core registers.
+  add r1, r0, #(_JB_CORE_BASE * 4)
+  stmia r1, {r4-r14}
 
-	add	sp, sp, #4	/* unalign the stack */
-	.cfi_adjust_cfa_offset -4
-	ldmfd	sp!, {r0, r1, r14}
-	.cfi_def_cfa_offset 0
+  // Save floating-point registers.
+  add r1, r0, #(_JB_FLOAT_BASE * 4)
+  vstmia  r1, {d8-d15}
 
-#ifdef __ARM_HAVE_VFP
-	/* Restore floating-point registers */
-	add     r2, r0, #(_JB_FLOAT_BASE * 4)
-	vldmia  r2, {d8-d15}
-	/* Restore floating-point state */
-	ldr     r2, [r0, #(_JB_FLOAT_STATE * 4)]
-	fmxr    fpscr, r2
-#endif /* __ARM_HAVE_VFP */
+  // Save floating-point state.
+  fmrx r1, fpscr
+  str r1, [r0, #(_JB_FLOAT_STATE * 4)]
 
-	/* Restore core registers */
-	add     r2, r0, #(_JB_CORE_BASE * 4)
-	ldmia   r2, {r4-r14}
+  mov r0, #0
+  bx lr
+END(sigsetjmp)
 
-	/* Validate sp and r14 */
-	teq	sp, #0
-	teqne	r14, #0
-	beq	botch
+// void siglongjmp(sigjmp_buf env, int value);
+ENTRY(siglongjmp)
+  // Do we need to restore the signal mask?
+  ldr r2, [r0, #(_JB_SIGFLAG * 4)]
+  teq r2, #0
+  beq 1f
 
-	/* Set return value */
+  // Restore the signal mask.
+  stmfd sp!, {r0, r1, r14}
+  .cfi_def_cfa_offset 12
+  .cfi_rel_offset r0, 0
+  .cfi_rel_offset r1, 4
+  .cfi_rel_offset r14, 8
+  sub sp, sp, #4 // Align the stack.
+  .cfi_adjust_cfa_offset 4
 
-	mov	r0, r1
-	teq	r0, #0x00000000
-	moveq	r0, #0x00000001
-        bx      lr
-#ifdef __ARM_26__
-	mov	r15, r14
-#else
-	mov	r15, r14
-#endif
+  ldr r0, [r0, #(_JB_SIGMASK * 4)]
+  bl sigsetmask
 
-	/* validation failed, die die die. */
-botch:
-	bl	PIC_SYM(longjmperror, PLT)
-	bl	PIC_SYM(abort, PLT)
-	b	. - 8		/* Cannot get here */
-END(longjmp)
+  add sp, sp, #4 // Unalign the stack.
+  .cfi_adjust_cfa_offset -4
+  ldmfd sp!, {r0, r1, r14}
+  .cfi_def_cfa_offset 0
+
+1:
+  // Restore floating-point registers.
+  add r2, r0, #(_JB_FLOAT_BASE * 4)
+  vldmia r2, {d8-d15}
+
+  // Restore floating-point state.
+  ldr r2, [r0, #(_JB_FLOAT_STATE * 4)]
+  fmxr fpscr, r2
+
+  // Restore core registers.
+  add r2, r0, #(_JB_CORE_BASE * 4)
+  ldmia r2, {r4-r14}
+
+  // Validate sp and r14.
+  teq sp, #0
+  teqne r14, #0
+  bleq longjmperror
+
+  // Set return value.
+  mov r0, r1
+  teq r0, #0
+  moveq r0, #1
+  bx lr
+END(siglongjmp)
+
+  .globl longjmp
+  .equ longjmp, siglongjmp
+  .globl _longjmp
+  .equ _longjmp, siglongjmp

libc/arch-arm/bionic/sigsetjmp.S

@@ -1,66 +0,0 @@
-/*	$OpenBSD: sigsetjmp.S,v 1.2 2004/02/01 05:40:52 drahn Exp $	*/
-/*	$NetBSD: sigsetjmp.S,v 1.3 2002/08/17 19:54:30 thorpej Exp $	*/
-
-/*
- * Copyright (c) 1997 Mark Brinicombe
- * All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- *    notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- *    notice, this list of conditions and the following disclaimer in the
- *    documentation and/or other materials provided with the distribution.
- * 3. All advertising materials mentioning features or use of this software
- *    must display the following acknowledgement:
- *	This product includes software developed by Mark Brinicombe
- * 4. Neither the name of the University nor the names of its contributors
- *    may be used to endorse or promote products derived from this software
- *    without specific prior written permission.
- *
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- */
-
-#define _ALIGN_TEXT .align 0
-
-#include <private/bionic_asm.h>
-#include <machine/setjmp.h>
-
-/*
- * C library -- sigsetjmp, siglongjmp
- *
- *	longjmp(a,v)
- * will generate a "return(v)" from the last call to
- *	setjmp(a, m)
- * by restoring registers from the stack.
- * The previous signal state is restored.
- */
-
-ENTRY(sigsetjmp)
-	teq	r1, #0
-	beq	PIC_SYM(_setjmp, PLT)
-	b	PIC_SYM(setjmp, PLT)
-END(sigsetjmp)
-
-.L_setjmp_magic:
-	.word	_JB_MAGIC__SETJMP
-
-ENTRY(siglongjmp)
-	ldr	r2, .L_setjmp_magic
-	ldr	r3, [r0]
-	teq	r2, r3
-	beq	PIC_SYM(_longjmp, PLT)
-	b	PIC_SYM(longjmp, PLT)
-END(siglongjmp)

libc/arch-arm/denver/bionic/memset.S

@@ -37,6 +37,7 @@
          * memset() returns its first argument.
          */
 
+        .cpu        cortex-a15
         .fpu        neon
         .syntax     unified
 

libc/arch-arm/include/machine/asm.h

@@ -38,9 +38,7 @@
 #ifndef _ARM32_ASM_H_
 #define _ARM32_ASM_H_
 
-#ifndef _ALIGN_TEXT
-# define _ALIGN_TEXT .align 0
-#endif
+#define __bionic_asm_align 0
 
 #undef __bionic_asm_custom_entry
 #undef __bionic_asm_custom_end
@@ -50,10 +48,4 @@
 #undef __bionic_asm_function_type
 #define __bionic_asm_function_type #function
 
-#if defined(__ELF__) && defined(PIC)
-#define PIC_SYM(x,y) x ## ( ## y ## )
-#else
-#define PIC_SYM(x,y) x
-#endif
-
 #endif /* !_ARM_ASM_H_ */

libc/arch-arm/include/machine/cpu-features.h

@@ -28,14 +28,6 @@
 #ifndef _ARM_MACHINE_CPU_FEATURES_H
 #define _ARM_MACHINE_CPU_FEATURES_H
 
-/* The purpose of this file is to define several macros corresponding
- * to CPU features that may or may not be available at build time on
- * on the target CPU.
- *
- * This is done to abstract us from the various ARM Architecture
- * quirks and alphabet soup.
- */
-
 /* __ARM_ARCH__ is a number corresponding to the ARM revision
  * we're going to support. Our toolchain doesn't define __ARM_ARCH__
  * so try to guess it.
@@ -53,31 +45,4 @@
 #  endif
 #endif
 
-/* define __ARM_HAVE_HALFWORD_MULTIPLY when half-word multiply instructions
- * this means variants of: smul, smulw, smla, smlaw, smlal
- */
-#define  __ARM_HAVE_HALFWORD_MULTIPLY  1
-
-/* define __ARM_HAVE_LDREXD for ARMv7 architecture
- * (also present in ARMv6K, but not implemented in ARMv7-M, neither of which
- * we care about)
- */
-#if __ARM_ARCH__ >= 7
-#  define __ARM_HAVE_LDREXD
-#endif
-
-/* define _ARM_HAVE_VFP if we have VFPv3
- */
-#if __ARM_ARCH__ >= 7 && defined __VFP_FP__
-#  define __ARM_HAVE_VFP
-#endif
-
-/* define _ARM_HAVE_NEON for ARMv7 architecture if we support the
- * Neon SIMD instruction set extensions. This also implies
- * that VFPv3-D32 is supported.
- */
-#if __ARM_ARCH__ >= 7 && defined __ARM_NEON__
-#  define __ARM_HAVE_NEON
-#endif
-
 #endif /* _ARM_MACHINE_CPU_FEATURES_H */

libc/arch-arm/include/machine/endian.h

@@ -1,79 +0,0 @@
-/*	$OpenBSD: endian.h,v 1.3 2005/12/13 00:35:23 millert Exp $	*/
-
-/*
- * Copyright (C) 2010 The Android Open Source Project
- * All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- *  * Redistributions of source code must retain the above copyright
- *    notice, this list of conditions and the following disclaimer.
- *  * Redistributions in binary form must reproduce the above copyright
- *    notice, this list of conditions and the following disclaimer in
- *    the documentation and/or other materials provided with the
- *    distribution.
- *
- * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
- * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
- * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
- * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
- * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
- * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
- * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
- * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
- * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
- * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT
- * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- */
-
-#ifndef _ARM_ENDIAN_H_
-#define _ARM_ENDIAN_H_
-
-#ifdef __GNUC__
-
-/* According to RealView Assembler User's Guide, REV and REV16 are available
- * in Thumb code and 16-bit instructions when used in Thumb-2 code.
- *
- * REV Rd, Rm
- *   Rd and Rm must both be Lo registers.
- *
- * REV16 Rd, Rm
- *   Rd and Rm must both be Lo registers.
- *
- * The +l constraint takes care of this without constraining us in ARM mode.
- */
-#define __swap16md(x) ({                                        \
-    register u_int16_t _x = (x);                                \
-    __asm__ __volatile__("rev16 %0, %0" : "+l" (_x));           \
-    _x;                                                         \
-})
-
-#define __swap32md(x) ({                                        \
-    register u_int32_t _x = (x);                                \
-    __asm__ __volatile__("rev %0, %0" : "+l" (_x));             \
-    _x;                                                         \
-})
-
-#define __swap64md(x) ({                                        \
-    u_int64_t _swap64md_x = (x);                                \
-    (u_int64_t) __swap32md(_swap64md_x >> 32) |                 \
-        (u_int64_t) __swap32md(_swap64md_x & 0xffffffff) << 32; \
-})
-
-/* Tell sys/endian.h we have MD variants of the swap macros.  */
-#define MD_SWAP
-
-#endif  /* __GNUC__ */
-
-#if defined(__ARMEB__)
-#define _BYTE_ORDER _BIG_ENDIAN
-#else
-#define _BYTE_ORDER _LITTLE_ENDIAN
-#endif
-#define __STRICT_ALIGNMENT
-#include <sys/types.h>
-#include <sys/endian.h>
-
-#endif  /* !_ARM_ENDIAN_H_ */

libc/arch-arm/include/machine/exec.h

@@ -1,50 +0,0 @@
-/*	$OpenBSD: exec.h,v 1.9 2003/04/17 03:42:14 drahn Exp $	*/
-/*	$NetBSD: exec.h,v 1.6 1994/10/27 04:16:05 cgd Exp $	*/
-
-/*
- * Copyright (c) 1993 Christopher G. Demetriou
- * All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- *    notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- *    notice, this list of conditions and the following disclaimer in the
- *    documentation and/or other materials provided with the distribution.
- * 3. The name of the author may not be used to endorse or promote products
- *    derived from this software without specific prior written permission
- *
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
- * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
- * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
- * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
- * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
- * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
- * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
- * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
- * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
- * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
- */
-
-#ifndef _ARM_EXEC_H_
-#define _ARM_EXEC_H_
-
-#define __LDPGSZ	4096
-
-#define NATIVE_EXEC_ELF
-
-#define ARCH_ELFSIZE		32
-
-#define ELF_TARG_CLASS		ELFCLASS32
-#define ELF_TARG_DATA		ELFDATA2LSB
-#define ELF_TARG_MACH		EM_ARM
-
-#define _NLIST_DO_AOUT
-#define _NLIST_DO_ELF
-
-#define _KERN_DO_AOUT
-#define _KERN_DO_ELF
-
-#endif  /* _ARM_EXEC_H_ */

libc/arch-arm/include/machine/setjmp.h

@@ -26,10 +26,6 @@
  * SUCH DAMAGE.
  */
 
-/*
- * machine/setjmp.h: machine dependent setjmp-related information.
- */
-
 /* _JBLEN is the size of a jmp_buf in longs.
  * Do not modify this value or you will break the ABI !
  *
@@ -37,46 +33,3 @@
  * that was replaced by this one.
  */
 #define _JBLEN  64
-
-/* According to the ARM AAPCS document, we only need to save
- * the following registers:
- *
- *  Core   r4-r14
- *
- *  VFP    d8-d15  (see section 5.1.2.1)
- *
- *      Registers s16-s31 (d8-d15, q4-q7) must be preserved across subroutine
- *      calls; registers s0-s15 (d0-d7, q0-q3) do not need to be preserved
- *      (and can be used for passing arguments or returning results in standard
- *      procedure-call variants). Registers d16-d31 (q8-q15), if present, do
- *      not need to be preserved.
- *
- *  FPSCR  saved because GLibc does saves it too.
- *
- */
-
-/* The internal structure of a jmp_buf is totally private.
- * Current layout (may change in the future):
- *
- * word   name         description
- * 0      magic        magic number
- * 1      sigmask      signal mask (not used with _setjmp / _longjmp)
- * 2      float_base   base of float registers (d8 to d15)
- * 18     float_state  floating-point status and control register
- * 19     core_base    base of core registers (r4 to r14)
- * 30     reserved     reserved entries (room to grow)
- * 64
- *
- * NOTE: float_base must be at an even word index, since the
- *       FP registers will be loaded/stored with instructions
- *       that expect 8-byte alignment.
- */
-
-#define _JB_MAGIC       0
-#define _JB_SIGMASK     (_JB_MAGIC+1)
-#define _JB_FLOAT_BASE  (_JB_SIGMASK+1)
-#define _JB_FLOAT_STATE (_JB_FLOAT_BASE + (15-8+1)*2)
-#define _JB_CORE_BASE   (_JB_FLOAT_STATE+1)
-
-#define _JB_MAGIC__SETJMP	0x4278f500
-#define _JB_MAGIC_SETJMP	0x4278f501

libc/arch-arm/syscalls/__clock_nanosleep.S

@@ -2,7 +2,7 @@
 
 #include <private/bionic_asm.h>
 
-ENTRY(clock_nanosleep)
+ENTRY(__clock_nanosleep)
     mov     ip, r7
     ldr     r7, =__NR_clock_nanosleep
     swi     #0
@@ -11,4 +11,4 @@ ENTRY(clock_nanosleep)
     bxls    lr
     neg     r0, r0
     b       __set_errno_internal
-END(clock_nanosleep)
+END(__clock_nanosleep)

libc/arch-arm/syscalls/__rt_sigqueueinfo.S

@@ -0,0 +1,14 @@
+/* Generated by gensyscalls.py. Do not edit. */
+
+#include <private/bionic_asm.h>
+
+ENTRY(__rt_sigqueueinfo)
+    mov     ip, r7
+    ldr     r7, =__NR_rt_sigqueueinfo
+    swi     #0
+    mov     r7, ip
+    cmn     r0, #(MAX_ERRNO + 1)
+    bxls    lr
+    neg     r0, r0
+    b       __set_errno_internal
+END(__rt_sigqueueinfo)

libc/arch-arm/syscalls/sethostname.S

@@ -0,0 +1,14 @@
+/* Generated by gensyscalls.py. Do not edit. */
+
+#include <private/bionic_asm.h>
+
+ENTRY(sethostname)
+    mov     ip, r7
+    ldr     r7, =__NR_sethostname
+    swi     #0
+    mov     r7, ip
+    cmn     r0, #(MAX_ERRNO + 1)
+    bxls    lr
+    neg     r0, r0
+    b       __set_errno_internal
+END(sethostname)

libc/arch-arm64/arm64.mk

@@ -35,10 +35,8 @@ libc_openbsd_src_files_arm64 += \
 libc_bionic_src_files_arm64 += \
     arch-arm64/bionic/__bionic_clone.S \
     arch-arm64/bionic/_exit_with_stack_teardown.S \
-    arch-arm64/bionic/_setjmp.S \
     arch-arm64/bionic/setjmp.S \
     arch-arm64/bionic/__set_tls.c \
-    arch-arm64/bionic/sigsetjmp.S \
     arch-arm64/bionic/syscall.S \
     arch-arm64/bionic/vfork.S \
 

libc/arch-arm64/bionic/__bionic_clone.S

@@ -31,8 +31,8 @@
 // pid_t __bionic_clone(int flags, void* child_stack, pid_t* parent_tid, void* tls, pid_t* child_tid, int (*fn)(void*), void* arg);
 
 ENTRY(__bionic_clone)
-    # Copy 'fn' and 'arg' onto the child stack.
-    stp     x5, x6, [x1, #-16]
+    # Push 'fn' and 'arg' onto the child stack.
+    stp     x5, x6, [x1, #-16]!
 
     # Make the system call.
     mov     x8, __NR_clone
@@ -49,12 +49,12 @@ ENTRY(__bionic_clone)
     ret
 
 .L_bc_child:
-    # We're in the child now. Set the end of the frame record chain...
-    mov     x29, xzr
-    # Setting x30 to 0 will make the unwinder stop at __start_thread
-    mov     x30, xzr
-    # ...and call __start_thread with the 'fn' and 'arg' we stored on the child stack.
-    ldp     x0, x1, [sp, #-16]
+    # We're in the child now. Set the end of the frame record chain.
+    mov     x29, #0
+    # Setting x30 to 0 will make the unwinder stop at __start_thread.
+    mov     x30, #0
+    # Call __start_thread with the 'fn' and 'arg' we stored on the child stack.
+    ldp     x0, x1, [sp], #16
     b       __start_thread
 END(__bionic_clone)
 .hidden __bionic_clone

libc/arch-arm64/bionic/_setjmp.S

@@ -1,111 +0,0 @@
-/*
- * Copyright (C) 2013 The Android Open Source Project
- * All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- *  * Redistributions of source code must retain the above copyright
- *    notice, this list of conditions and the following disclaimer.
- *  * Redistributions in binary form must reproduce the above copyright
- *    notice, this list of conditions and the following disclaimer in
- *    the documentation and/or other materials provided with the
- *    distribution.
- *
- * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
- * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
- * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
- * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
- * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
- * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
- * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
- * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
- * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
- * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT
- * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- */
-
-#include <private/bionic_asm.h>
-#include <machine/setjmp.h>
-
-/*
- * C library - _setjmp, _longjmp
- *
- * _longjmp(jmp_buf state, int value)
- * will generate a "return(v)" from the last call to _setjmp(state) by restoring
- * registers from the stack. The previous signal state is NOT restored.
- *
- * NOTE: x0 return value
- *       x9-x15 temporary registers
- */
-
-ENTRY(_setjmp)
-    /* store magic number */
-    ldr     w9, .L_setjmp_magic
-    str     w9, [x0, #(_JB_MAGIC * 4)]
-
-    /* store core registers */
-    mov     x10, sp
-    stp     x30, x10, [x0, #(_JB_CORE_BASE * 4 + 16 * 0)]
-    stp     x28, x29, [x0, #(_JB_CORE_BASE * 4 + 16 * 1)]
-    stp     x26, x27, [x0, #(_JB_CORE_BASE * 4 + 16 * 2)]
-    stp     x24, x25, [x0, #(_JB_CORE_BASE * 4 + 16 * 3)]
-    stp     x22, x23, [x0, #(_JB_CORE_BASE * 4 + 16 * 4)]
-    stp     x20, x21, [x0, #(_JB_CORE_BASE * 4 + 16 * 5)]
-    str     x19,      [x0, #(_JB_CORE_BASE * 4 + 16 * 6)]
-
-    /* store floating point registers */
-    stp     d14, d15, [x0, #(_JB_FLOAT_BASE * 4 + 16 * 0)]
-    stp     d12, d13, [x0, #(_JB_FLOAT_BASE * 4 + 16 * 1)]
-    stp     d10, d11, [x0, #(_JB_FLOAT_BASE * 4 + 16 * 2)]
-    stp     d8,  d9,  [x0, #(_JB_FLOAT_BASE * 4 + 16 * 3)]
-
-    mov     w0, wzr
-    ret
-END(_setjmp)
-
-.L_setjmp_magic:
-    .word   _JB_MAGIC__SETJMP
-
-ENTRY(_longjmp)
-    /* check magic */
-    ldr     w9, .L_setjmp_magic
-    ldr     w10, [x0, #(_JB_MAGIC * 4)]
-    cmp     w9, w10
-    b.ne    .L_fail
-
-    /* restore core registers */
-    ldp     x30, x10, [x0, #(_JB_CORE_BASE * 4 + 16 * 0)]
-    mov     sp, x10
-    ldp     x28, x29, [x0, #(_JB_CORE_BASE * 4 + 16 * 1)]
-    ldp     x26, x27, [x0, #(_JB_CORE_BASE * 4 + 16 * 2)]
-    ldp     x24, x25, [x0, #(_JB_CORE_BASE * 4 + 16 * 3)]
-    ldp     x22, x23, [x0, #(_JB_CORE_BASE * 4 + 16 * 4)]
-    ldp     x20, x21, [x0, #(_JB_CORE_BASE * 4 + 16 * 5)]
-    ldr     x19,      [x0, #(_JB_CORE_BASE * 4 + 16 * 6)]
-
-    /* restore floating point registers */
-    ldp     d14, d15, [x0, #(_JB_FLOAT_BASE * 4 + 16 * 0)]
-    ldp     d12, d13, [x0, #(_JB_FLOAT_BASE * 4 + 16 * 1)]
-    ldp     d10, d11, [x0, #(_JB_FLOAT_BASE * 4 + 16 * 2)]
-    ldp     d8,  d9,  [x0, #(_JB_FLOAT_BASE * 4 + 16 * 3)]
-
-    /* validate sp (sp mod 16 = 0) and lr (lr mod 4 = 0) */
-    tst     x30, #3
-    b.ne    .L_fail
-    mov     x10, sp
-    tst     x10, #15
-    b.ne    .L_fail
-
-    /* set return value */
-    cmp     w1, wzr
-    csinc   w0, w1, wzr, ne
-    ret
-
-    /* validation failed, die die die */
-.L_fail:
-    bl      PIC_SYM(longjmperror, PLT)
-    bl      PIC_SYM(abort, PLT)
-    b        . - 8       /* Cannot get here */
-END(_longjmp)

libc/arch-arm64/bionic/setjmp.S

@@ -27,97 +27,126 @@
  */
 
 #include <private/bionic_asm.h>
-#include <machine/setjmp.h>
 
-/*
- * C library - _setjmp, _longjmp
- *
- * _longjmp(jmp_buf state, int value)
- * will generate a "return(v)" from the last call to _setjmp(state) by restoring
- * registers from the stack. The previous signal state is NOT restored.
- *
- * NOTE: x0 return value
- *       x9-x15 temporary registers
- */
+// According to AARCH64 PCS document we need to save the following
+// registers:
+//
+// Core     x19 - x30, sp (see section 5.1.1)
+// VFP      d8 - d15 (see section 5.1.2)
+//
+// NOTE: All the registers saved here will have 64 bit vales.
+//       AAPCS mandates that the higher part of q registers do not need to
+//       be saved by the callee.
+
+#define _JB_SIGFLAG     0
+#define _JB_SIGMASK     (_JB_SIGFLAG + 1)
+#define _JB_X30_SP      (_JB_SIGMASK + 1)
+#define _JB_X28_X29     (_JB_X30_SP  + 2)
+#define _JB_X26_X27     (_JB_X28_X29 + 2)
+#define _JB_X24_X25     (_JB_X26_X27 + 2)
+#define _JB_X22_X23     (_JB_X24_X25 + 2)
+#define _JB_X20_X21     (_JB_X22_X23 + 2)
+#define _JB_X19         (_JB_X20_X21 + 2)
+#define _JB_D14_D15     (_JB_X19 + 1)
+#define _JB_D12_D13     (_JB_D14_D15 + 2)
+#define _JB_D10_D11     (_JB_D12_D13 + 1)
+#define _JB_D8_D9       (_JB_D10_D11 + 1)
 
 ENTRY(setjmp)
-    /* block all signals an retrieve signal mask */
-    stp     x0, x30, [sp, #-16]!
-
-    mov     x0, xzr
-    bl      PIC_SYM(sigblock, PLT)
-    mov     w1, w0
-
-    ldp     x0, x30, [sp], #16
-
-    /* store signal mask */
-    str     w1, [x0, #(_JB_SIGMASK *4)]
-
-    /* store magic number */
-    ldr     w9, .L_setjmp_magic
-    str     w9, [x0, #(_JB_MAGIC * 4)]
-
-    /* store core registers */
-    mov     x10, sp
-    stp     x30, x10, [x0, #(_JB_CORE_BASE * 4 + 16 * 0)]
-    stp     x28, x29, [x0, #(_JB_CORE_BASE * 4 + 16 * 1)]
-    stp     x26, x27, [x0, #(_JB_CORE_BASE * 4 + 16 * 2)]
-    stp     x24, x25, [x0, #(_JB_CORE_BASE * 4 + 16 * 3)]
-    stp     x22, x23, [x0, #(_JB_CORE_BASE * 4 + 16 * 4)]
-    stp     x20, x21, [x0, #(_JB_CORE_BASE * 4 + 16 * 5)]
-    str     x19,      [x0, #(_JB_CORE_BASE * 4 + 16 * 6)]
-
-    /* store floating point registers */
-    stp     d14, d15, [x0, #(_JB_FLOAT_BASE * 4 + 16 * 0)]
-    stp     d12, d13, [x0, #(_JB_FLOAT_BASE * 4 + 16 * 1)]
-    stp     d10, d11, [x0, #(_JB_FLOAT_BASE * 4 + 16 * 2)]
-    stp     d8,  d9,  [x0, #(_JB_FLOAT_BASE * 4 + 16 * 3)]
-
-    mov     w0, wzr
-    ret
+  mov w1, #1
+  b sigsetjmp
 END(setjmp)
 
-.L_setjmp_magic:
-    .word   _JB_MAGIC__SETJMP
+ENTRY(_setjmp)
+  mov w1, #0
+  b sigsetjmp
+END(_setjmp)
 
-ENTRY(longjmp)
-    /* check magic */
-    ldr     w9, .L_setjmp_magic
-    ldr     w10, [x0, #(_JB_MAGIC * 4)]
-    cmp     w9, w10
-    b.ne    .L_fail
+// int sigsetjmp(sigjmp_buf env, int save_signal_mask);
+ENTRY(sigsetjmp)
+  // Record whether or not we're saving the signal mask.
+  str w1, [x0, #(_JB_SIGFLAG * 8)]
 
-    /* restore core registers */
-    ldp     x30, x10, [x0, #(_JB_CORE_BASE * 4 + 16 * 0)]
-    mov     sp, x10
-    ldp     x28, x29, [x0, #(_JB_CORE_BASE * 4 + 16 * 1)]
-    ldp     x26, x27, [x0, #(_JB_CORE_BASE * 4 + 16 * 2)]
-    ldp     x24, x25, [x0, #(_JB_CORE_BASE * 4 + 16 * 3)]
-    ldp     x22, x23, [x0, #(_JB_CORE_BASE * 4 + 16 * 4)]
-    ldp     x20, x21, [x0, #(_JB_CORE_BASE * 4 + 16 * 5)]
-    ldr     x19,      [x0, #(_JB_CORE_BASE * 4 + 16 * 6)]
+  // Do we need to save the signal mask?
+  cbz w1, 1f
 
-    /* restore floating point registers */
-    ldp     d14, d15, [x0, #(_JB_FLOAT_BASE * 4 + 16 * 0)]
-    ldp     d12, d13, [x0, #(_JB_FLOAT_BASE * 4 + 16 * 1)]
-    ldp     d10, d11, [x0, #(_JB_FLOAT_BASE * 4 + 16 * 2)]
-    ldp     d8,  d9,  [x0, #(_JB_FLOAT_BASE * 4 + 16 * 3)]
+  // Save current signal mask.
+  stp x0, x30, [sp, #-16]!
+  // The 'how' argument is ignored if new_mask is NULL.
+  mov x1, #0 // NULL.
+  add x2, x0, #(_JB_SIGMASK * 8) // old_mask.
+  bl sigprocmask
+  ldp x0, x30, [sp], #16
 
-    /* validate sp (sp mod 16 = 0) and lr (lr mod 4 = 0) */
-    tst     x30, #3
-    b.ne    .L_fail
-    mov     x10, sp
-    tst     x10, #15
-    b.ne    .L_fail
+1:
+  // Save core registers.
+  mov x10, sp
+  stp x30, x10, [x0, #(_JB_X30_SP  * 8)]
+  stp x28, x29, [x0, #(_JB_X28_X29 * 8)]
+  stp x26, x27, [x0, #(_JB_X26_X27 * 8)]
+  stp x24, x25, [x0, #(_JB_X24_X25 * 8)]
+  stp x22, x23, [x0, #(_JB_X22_X23 * 8)]
+  stp x20, x21, [x0, #(_JB_X20_X21 * 8)]
+  str x19,      [x0, #(_JB_X19     * 8)]
 
-    /* set return value */
-    cmp     w1, wzr
-    csinc   w0, w1, wzr, ne
-    ret
+  // Save floating point registers.
+  stp d14, d15, [x0, #(_JB_D14_D15 * 8)]
+  stp d12, d13, [x0, #(_JB_D12_D13 * 8)]
+  stp d10, d11, [x0, #(_JB_D10_D11 * 8)]
+  stp d8,  d9,  [x0, #(_JB_D8_D9   * 8)]
 
-    /* validation failed, die die die */
-.L_fail:
-    bl      PIC_SYM(longjmperror, PLT)
-    bl      PIC_SYM(abort, PLT)
-    b       . - 8       /* Cannot get here */
-END(longjmp)
+  mov w0, #0
+  ret
+END(sigsetjmp)
+
+// void siglongjmp(sigjmp_buf env, int value);
+ENTRY(siglongjmp)
+  // Do we need to restore the signal mask?
+  ldr w9, [x0, #(_JB_SIGFLAG * 8)]
+  cbz w9, 1f
+
+  // Restore signal mask.
+  stp x0, x30, [sp, #-16]!
+  mov x19, x1 // Save 'value'.
+  mov x2, x0
+  mov x0, #2 // SIG_SETMASK
+  add x1, x2, #(_JB_SIGMASK * 8) // new_mask.
+  mov x2, #0 // NULL.
+  bl sigprocmask
+  mov x1, x19 // Restore 'value'.
+  ldp x0, x30, [sp], #16
+
+1:
+  // Restore core registers.
+  ldp x30, x10, [x0, #(_JB_X30_SP  * 8)]
+  mov sp, x10
+  ldp x28, x29, [x0, #(_JB_X28_X29 * 8)]
+  ldp x26, x27, [x0, #(_JB_X26_X27 * 8)]
+  ldp x24, x25, [x0, #(_JB_X24_X25 * 8)]
+  ldp x22, x23, [x0, #(_JB_X22_X23 * 8)]
+  ldp x20, x21, [x0, #(_JB_X20_X21 * 8)]
+  ldr x19,      [x0, #(_JB_X19     * 8)]
+
+  // Restore floating point registers.
+  ldp d14, d15, [x0, #(_JB_D14_D15 * 8)]
+  ldp d12, d13, [x0, #(_JB_D12_D13 * 8)]
+  ldp d10, d11, [x0, #(_JB_D10_D11 * 8)]
+  ldp d8,  d9,  [x0, #(_JB_D8_D9   * 8)]
+
+  // Validate sp (sp mod 16 = 0) and lr (lr mod 4 = 0).
+  tst x30, #3
+  b.ne longjmperror
+  mov x10, sp
+  tst x10, #15
+  b.ne longjmperror
+
+  // Set return value.
+  cmp w1, wzr
+  csinc w0, w1, wzr, ne
+  ret
+END(siglongjmp)
+
+  .globl longjmp
+  .equ longjmp, siglongjmp
+  .globl _longjmp
+  .equ _longjmp, siglongjmp

libc/arch-arm64/bionic/sigsetjmp.S

@@ -1,51 +0,0 @@
-/*
- * Copyright (C) 2013 The Android Open Source Project
- * All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- *  * Redistributions of source code must retain the above copyright
- *    notice, this list of conditions and the following disclaimer.
- *  * Redistributions in binary form must reproduce the above copyright
- *    notice, this list of conditions and the following disclaimer in
- *    the documentation and/or other materials provided with the
- *    distribution.
- *
- * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
- * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
- * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
- * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
- * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
- * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
- * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
- * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
- * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
- * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT
- * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- */
-
-#include <private/bionic_asm.h>
-#include <machine/setjmp.h>
-
-/*
- * int sigsetjmp(sigjmp_buf env, int savesigs);
- * void siglongjmp(sigjmp_buf env, int val);
- */
-
-ENTRY(sigsetjmp)
-    cbz     w1, PIC_SYM(_setjmp, PLT)
-    b       PIC_SYM(setjmp, PLT)
-END(sigsetjmp)
-
-.L_setjmp_magic:
-    .word   _JB_MAGIC__SETJMP
-
-ENTRY(siglongjmp)
-    ldr     w2, .L_setjmp_magic
-    ldr     w3, [x0]
-    cmp     w2, w3
-    b.eq    PIC_SYM(_longjmp, PLT)
-    b       PIC_SYM(longjmp, PLT)
-END(siglongjmp)

libc/arch-arm64/include/machine/asm.h

@@ -38,17 +38,9 @@
 #ifndef _AARCH64_ASM_H_
 #define _AARCH64_ASM_H_
 
-#ifndef _ALIGN_TEXT
-# define _ALIGN_TEXT .align 0
-#endif
+#define __bionic_asm_align 0
 
 #undef __bionic_asm_function_type
 #define __bionic_asm_function_type %function
 
-#if defined(__ELF__) && defined(PIC)
-#define PIC_SYM(x,y) x ## ( ## y ## )
-#else
-#define PIC_SYM(x,y) x
-#endif
-
 #endif /* _AARCH64_ASM_H_ */

libc/arch-arm64/include/machine/endian.h

@@ -1,58 +0,0 @@
-/*
- * Copyright (C) 2013 The Android Open Source Project
- * All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- *  * Redistributions of source code must retain the above copyright
- *    notice, this list of conditions and the following disclaimer.
- *  * Redistributions in binary form must reproduce the above copyright
- *    notice, this list of conditions and the following disclaimer in
- *    the documentation and/or other materials provided with the
- *    distribution.
- *
- * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
- * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
- * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
- * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
- * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
- * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
- * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
- * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
- * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
- * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT
- * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- */
-
-#ifndef _AARCH64_ENDIAN_H_
-#define _AARCH64_ENDIAN_H_
-
-#include <sys/types.h>
-#include <sys/endian.h>
-
-#ifdef __GNUC__
-
-#define __swap16md(x) ({                                        \
-    register u_int16_t _x = (x);                                \
-    __asm volatile ("rev16 %0, %0" : "+r" (_x));                \
-    _x;                                                         \
-})
-
-/* Use GCC builtins */
-#define __swap32md(x) __builtin_bswap32(x)
-#define __swap64md(x) __builtin_bswap64(x)
-
-/* Tell sys/endian.h we have MD variants of the swap macros.  */
-#define MD_SWAP
-
-#endif  /* __GNUC__ */
-
-#if defined(__AARCH64EB__)
-#define _BYTE_ORDER _BIG_ENDIAN
-#else
-#define _BYTE_ORDER _LITTLE_ENDIAN
-#endif
-
-#endif /* _AARCH64_ENDIAN_H_ */

libc/arch-arm64/include/machine/exec.h

@@ -1,50 +0,0 @@
-/*	$OpenBSD: exec.h,v 1.9 2003/04/17 03:42:14 drahn Exp $	*/
-/*	$NetBSD: exec.h,v 1.6 1994/10/27 04:16:05 cgd Exp $	*/
-
-/*
- * Copyright (c) 1993 Christopher G. Demetriou
- * All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- *    notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- *    notice, this list of conditions and the following disclaimer in the
- *    documentation and/or other materials provided with the distribution.
- * 3. The name of the author may not be used to endorse or promote products
- *    derived from this software without specific prior written permission
- *
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
- * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
- * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
- * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
- * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
- * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
- * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
- * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
- * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
- * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
- */
-
-#ifndef _AARCH64_EXEC_H_
-#define _AARCH64_EXEC_H_
-
-#define	__LDPGSZ		4096
-
-#define	NATIVE_EXEC_ELF
-
-#define	ARCH_ELFSIZE		64
-
-#define	ELF_TARG_CLASS		ELFCLASS64		/* 64-bit objects */
-#define	ELF_TARG_DATA		ELFDATA2LSB
-#define	ELF_TARG_MACH		EM_AARCH64
-
-#define	_NLIST_DO_AOUT
-#define	_NLIST_DO_ELF
-
-#define	_KERN_DO_AOUT
-#define	_KERN_DO_ELF64
-
-#endif  /* _AARCH64_EXEC_H_ */

libc/arch-arm64/include/machine/setjmp.h

@@ -26,48 +26,5 @@
  * SUCH DAMAGE.
  */
 
-/*
- * machine/setjmp.h: machine dependent setjmp-related information.
- */
-
-/* _JBLEN is the size of a jmp_buf in longs(64bit on AArch64) */
+/* _JBLEN is the size of a jmp_buf in longs (64bit on AArch64) */
 #define _JBLEN 32
-
-/* According to AARCH64 PCS document we need to save the following
- * registers:
- *
- * Core     x19 - x30, sp (see section 5.1.1)
- * VFP      d8 - d15 (see section 5.1.2)
- *
- * NOTE: All the registers saved here will have 64bit vales (except FPSR).
- *       AAPCS mandates that the higher part of q registers does not need to
- *       be saveved by the callee.
- */
-
-/* The structure of jmp_buf for AArch64:
- *
- * NOTE: _JBLEN is the size of jmp_buf in longs(64bit on AArch64)! The table
- *      below computes the offsets in words(32bit).
- *
- *  word        name            description
- *  0       magic           magic number
- *  1       sigmask         signal mask (not used with _setjmp / _longjmp)
- *  2       core_base       base of core registers (x19-x30, sp)
- *  28      float_base      base of float registers (d8-d15)
- *  44      reserved        reserved entries (room to grow)
- *  64
- *
- *
- *  NOTE: The instructions that load/store core/vfp registers expect 8-byte
- *        alignment. Contrary to the previous setjmp header for ARM we do not
- *        need to save status/control registers for VFP (it is not a
- *        requirement for setjmp).
- */
-
-#define _JB_MAGIC       0
-#define _JB_SIGMASK     (_JB_MAGIC+1)
-#define _JB_CORE_BASE   (_JB_SIGMASK+1)
-#define _JB_FLOAT_BASE  (_JB_CORE_BASE + (31-19+1)*2)
-
-#define _JB_MAGIC__SETJMP   0x53657200
-#define _JB_MAGIC_SETJMP    0x53657201

libc/arch-arm64/syscalls/__clock_nanosleep.S

@@ -2,7 +2,7 @@
 
 #include <private/bionic_asm.h>
 
-ENTRY(clock_nanosleep)
+ENTRY(__clock_nanosleep)
     mov     x8, __NR_clock_nanosleep
     svc     #0
 
@@ -11,4 +11,5 @@ ENTRY(clock_nanosleep)
     b.hi    __set_errno_internal
 
     ret
-END(clock_nanosleep)
+END(__clock_nanosleep)
+.hidden __clock_nanosleep

libc/arch-arm64/syscalls/__rt_sigqueueinfo.S

@@ -0,0 +1,15 @@
+/* Generated by gensyscalls.py. Do not edit. */
+
+#include <private/bionic_asm.h>
+
+ENTRY(__rt_sigqueueinfo)
+    mov     x8, __NR_rt_sigqueueinfo
+    svc     #0
+
+    cmn     x0, #(MAX_ERRNO + 1)
+    cneg    x0, x0, hi
+    b.hi    __set_errno_internal
+
+    ret
+END(__rt_sigqueueinfo)
+.hidden __rt_sigqueueinfo

libc/arch-arm64/syscalls/sethostname.S

@@ -0,0 +1,14 @@
+/* Generated by gensyscalls.py. Do not edit. */
+
+#include <private/bionic_asm.h>
+
+ENTRY(sethostname)
+    mov     x8, __NR_sethostname
+    svc     #0
+
+    cmn     x0, #(MAX_ERRNO + 1)
+    cneg    x0, x0, hi
+    b.hi    __set_errno_internal
+
+    ret
+END(sethostname)

libc/arch-mips/bionic/_setjmp.S

@@ -1,150 +0,0 @@
-/*	$OpenBSD: _setjmp.S,v 1.4 2005/08/07 16:40:15 espie Exp $ */
-
-/*
- * Copyright (c) 2002 Opsycon AB  (www.opsycon.se / www.opsycon.com)
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- *    notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- *    notice, this list of conditions and the following disclaimer in the
- *    documentation and/or other materials provided with the distribution.
- * 3. Neither the name of Opsycon AB nor the names of its contributors
- *    may be used to endorse or promote products derived from this software
- *    without specific prior written permission.
- *
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS
- * OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
- * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY
- * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- *
- */
-
-#include <private/bionic_asm.h>
-#include <machine/regnum.h>
-#include <machine/signal.h>
-
-/*
- * _setjmp, _longjmp (not restoring signal state)
- *
- * XXX FPSET should probably be taken from SR setting. hmmm...
- *  GPOFF and FRAMESIZE must be the same for both _setjmp and _longjmp!
- *
- */
-
-FRAMESZ= MKFSIZ(0,4)
-GPOFF= FRAMESZ-2*REGSZ
-
-LEAF(_setjmp, FRAMESZ)
-	PTR_SUBU sp, FRAMESZ
-	SETUP_GP64(GPOFF, _setjmp)
-	SAVE_GP(GPOFF)
-	.set	noreorder
-#if defined(__mips64)
-	dli	v0, 0xACEDBADE			# sigcontext magic number
-#else
-	li	v0, 0xACEDBADE			# sigcontext magic number
-#endif
-	REG_S	v0, SC_REGS+ZERO*REGSZ(a0)
-	REG_S	s0, SC_REGS+S0*REGSZ(a0)
-	REG_S	s1, SC_REGS+S1*REGSZ(a0)
-	REG_S	s2, SC_REGS+S2*REGSZ(a0)
-	REG_S	s3, SC_REGS+S3*REGSZ(a0)
-	REG_S	s4, SC_REGS+S4*REGSZ(a0)
-	REG_S	s5, SC_REGS+S5*REGSZ(a0)
-	REG_S	s6, SC_REGS+S6*REGSZ(a0)
-	REG_S	s7, SC_REGS+S7*REGSZ(a0)
-	REG_S	s8, SC_REGS+S8*REGSZ(a0)
-	REG_L	v0, GPOFF(sp)
-	REG_S	v0, SC_REGS+GP*REGSZ(a0)
-	PTR_ADDU v0, sp, FRAMESZ
-	REG_S	v0, SC_REGS+SP*REGSZ(a0)
-	REG_S	ra, SC_PC(a0)
-
-#if !defined(SOFTFLOAT)
-	li	v0, 1				# be nice if we could tell
-	REG_S	v0, SC_FPUSED(a0)		# sc_fpused = 1
-	cfc1	v0, $31
-	s.d	$f20, SC_FPREGS+((F20-F0)*REGSZ_FP)(a0)
-	s.d	$f22, SC_FPREGS+((F22-F0)*REGSZ_FP)(a0)
-	s.d	$f24, SC_FPREGS+((F24-F0)*REGSZ_FP)(a0)
-	s.d	$f26, SC_FPREGS+((F26-F0)*REGSZ_FP)(a0)
-	s.d	$f28, SC_FPREGS+((F28-F0)*REGSZ_FP)(a0)
-	s.d	$f30, SC_FPREGS+((F30-F0)*REGSZ_FP)(a0)
-#if _MIPS_FPSET == 32
-	s.d	$f21, SC_FPREGS+((F21-F0)*REGSZ_FP)(a0)
-	s.d	$f23, SC_FPREGS+((F23-F0)*REGSZ_FP)(a0)
-	s.d	$f25, SC_FPREGS+((F25-F0)*REGSZ_FP)(a0)
-	s.d	$f27, SC_FPREGS+((F27-F0)*REGSZ_FP)(a0)
-	s.d	$f29, SC_FPREGS+((F29-F0)*REGSZ_FP)(a0)
-	s.d	$f31, SC_FPREGS+((F31-F0)*REGSZ_FP)(a0)
-#endif
-	REG_S	v0, SC_FPREGS+((FSR-F0)*REGSZ)(a0)
-#endif /* !SOFTFLOAT */
-	RESTORE_GP64
-	PTR_ADDU sp, FRAMESZ
-	j	ra
-	 move	v0, zero
-END(_setjmp)
-
-LEAF(_longjmp, FRAMESZ)
-	PTR_SUBU sp, FRAMESZ
-	SETUP_GP64(GPOFF, _longjmp)
-	SAVE_GP(GPOFF)
-	.set    noreorder
-	REG_L	v0, SC_REGS+ZERO*REGSZ(a0)
-	bne	v0, 0xACEDBADE, botch		# jump if error
-	REG_L	ra, SC_PC(a0)
-	REG_L	v0, SC_FPREGS+((FSR-F0)*REGSZ)(a0)
-	REG_L	s0, SC_REGS+S0*REGSZ(a0)
-	REG_L	s1, SC_REGS+S1*REGSZ(a0)
-	REG_L	s2, SC_REGS+S2*REGSZ(a0)
-	REG_L	s3, SC_REGS+S3*REGSZ(a0)
-	REG_L	s4, SC_REGS+S4*REGSZ(a0)
-	REG_L	s5, SC_REGS+S5*REGSZ(a0)
-	REG_L	s6, SC_REGS+S6*REGSZ(a0)
-	REG_L	s7, SC_REGS+S7*REGSZ(a0)
-	REG_L	s8, SC_REGS+S8*REGSZ(a0)
-	REG_L	gp, SC_REGS+GP*REGSZ(a0)
-	REG_L	sp, SC_REGS+SP*REGSZ(a0)
-#if !defined(SOFTFLOAT)
-	ctc1	v0, $31
-	l.d	$f20, SC_FPREGS+((F20-F0)*REGSZ_FP)(a0)
-	l.d	$f22, SC_FPREGS+((F22-F0)*REGSZ_FP)(a0)
-	l.d	$f24, SC_FPREGS+((F24-F0)*REGSZ_FP)(a0)
-	l.d	$f26, SC_FPREGS+((F26-F0)*REGSZ_FP)(a0)
-	l.d	$f28, SC_FPREGS+((F28-F0)*REGSZ_FP)(a0)
-	l.d	$f30, SC_FPREGS+((F30-F0)*REGSZ_FP)(a0)
-#if _MIPS_FPSET == 32
-	l.d	$f21, SC_FPREGS+((F21-F0)*REGSZ_FP)(a0)
-	l.d	$f23, SC_FPREGS+((F23-F0)*REGSZ_FP)(a0)
-	l.d	$f25, SC_FPREGS+((F25-F0)*REGSZ_FP)(a0)
-	l.d	$f27, SC_FPREGS+((F27-F0)*REGSZ_FP)(a0)
-	l.d	$f29, SC_FPREGS+((F29-F0)*REGSZ_FP)(a0)
-	l.d	$f31, SC_FPREGS+((F31-F0)*REGSZ_FP)(a0)
-#endif
-#endif /* !SOFTFLOAT */
-	bne	a1, zero, 1f
-	 nop
-	li	a1, 1			# never return 0!
-1:
-	j	ra
-	 move	v0, a1
-
-botch:
-	jal	longjmperror
-	nop
-	jal	abort
-	nop
-	RESTORE_GP64
-	PTR_ADDU sp, FRAMESZ
-END(_longjmp)

libc/arch-mips/bionic/atexit.h

@@ -1,36 +0,0 @@
-/*
- * Copyright (C) 2013 The Android Open Source Project
- * All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- *  * Redistributions of source code must retain the above copyright
- *    notice, this list of conditions and the following disclaimer.
- *  * Redistributions in binary form must reproduce the above copyright
- *    notice, this list of conditions and the following disclaimer in
- *    the documentation and/or other materials provided with the
- *    distribution.
- *
- * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
- * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
- * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
- * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
- * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
- * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
- * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
- * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
- * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
- * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT
- * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- */
-
-extern void *__dso_handle;
-extern int __cxa_atexit(void (*func)(void *), void *arg, void *dso);
-
-__attribute__ ((visibility ("hidden")))
-int atexit(void (*func)(void))
-{
-  return (__cxa_atexit((void (*)(void *))func, (void *)0, &__dso_handle));
-}

libc/arch-mips/bionic/crtbegin.c

@@ -91,4 +91,4 @@ __asm__ (
 );
 
 #include "../../arch-common/bionic/__dso_handle.h"
-#include "atexit.h"
+#include "../../arch-common/bionic/atexit.h"

libc/arch-mips/bionic/crtbegin_so.c

@@ -1,38 +0,0 @@
-/*
- * Copyright (C) 2013 The Android Open Source Project
- * All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- *  * Redistributions of source code must retain the above copyright
- *    notice, this list of conditions and the following disclaimer.
- *  * Redistributions in binary form must reproduce the above copyright
- *    notice, this list of conditions and the following disclaimer in
- *    the documentation and/or other materials provided with the
- *    distribution.
- *
- * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
- * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
- * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
- * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
- * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
- * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
- * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
- * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
- * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
- * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT
- * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- */
-
-extern void __cxa_finalize(void *);
-extern void *__dso_handle;
-
-__attribute__((visibility("hidden"),destructor))
-void __on_dlclose() {
-  __cxa_finalize(&__dso_handle);
-}
-
-#include "../../arch-common/bionic/__dso_handle_so.h"
-#include "atexit.h"

libc/arch-mips/bionic/setjmp.S

@@ -1,5 +1,3 @@
-/*      $OpenBSD: setjmp.S,v 1.5 2005/08/07 16:40:15 espie Exp $ */
-
 /*
  * Copyright (c) 2001-2002 Opsycon AB  (www.opsycon.se / www.opsycon.com)
  *
@@ -28,14 +26,116 @@
  * SUCH DAMAGE.
  *
  */
+/*-
+ * Copyright (c) 1991, 1993, 1995,
+ *	The Regents of the University of California.  All rights reserved.
+ *
+ * This code is derived from software contributed to Berkeley by
+ * Havard Eidnes.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in the
+ *    documentation and/or other materials provided with the distribution.
+ * 3. Neither the name of the University nor the names of its contributors
+ *    may be used to endorse or promote products derived from this software
+ *    without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
+ * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED.  IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
+ * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+ * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
+ * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
+ * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
+ * SUCH DAMAGE.
+ */
+/*
+ * Copyright (c) 1992, 1993
+ *	The Regents of the University of California.  All rights reserved.
+ *
+ * This code is derived from software contributed to Berkeley by
+ * Ralph Campbell.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in the
+ *    documentation and/or other materials provided with the distribution.
+ * 3. Neither the name of the University nor the names of its contributors
+ *    may be used to endorse or promote products derived from this software
+ *    without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
+ * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED.  IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
+ * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+ * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
+ * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
+ * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
+ * SUCH DAMAGE.
+ *
+ *	@(#)signal.h	8.1 (Berkeley) 6/10/93
+ */
 
 #include <private/bionic_asm.h>
-#include <machine/regnum.h>
-#include <machine/signal.h>
+#include <machine/setjmp.h>
+
+/* On Mips32, jmpbuf begins with optional 4-byte filler so that
+ *  all saved FP regs are aligned on 8-byte boundary, despite this whole
+ *  struct being mis-declared to users as an array of (4-byte) longs.
+ *  All the following offsets are then from the rounded-up base addr
+ */
+
+/* Fields of same size on all MIPS abis: */
+#define	SC_MAGIC        (0*4)		/* 4 bytes, identify jmpbuf */
+#define	SC_MASK		(1*4)		/* 4 bytes, saved signal mask */
+#define	SC_FPSR		(2*4)		/* 4 bytes, floating point control/status reg */
+/*     	filler2		(3*4)		   4 bytes, pad to 8-byte boundary */
+
+/* Registers that are 4-byte on mips32 o32, and 8-byte on mips64 n64 abi */
+#define	SC_REGS_SAVED	12		/* ra,gp,sp,s0-s8 */
+#define	SC_REGS		(4*4)		/* SC_REGS_SAVED*REGSZ bytes */
+
+/* Floating pt registers are 8-bytes on all abis,
+ * but the number of saved fp regs varies for o32/n32 versus n64 abis:
+ */
+
+#ifdef __LP64__
+#define	SC_FPREGS_SAVED	8  /* all  fp regs f24,f25,f26,f27,f28,f29,f30,f31 */
+#else
+#define	SC_FPREGS_SAVED	6  /* even fp regs f20,f22,f24,f26,f28,f30 */
+#endif
+
+#define	SC_FPREGS	(SC_REGS + SC_REGS_SAVED*REGSZ)  /* SC_FPREGS_SAVED*REGSZ_FP bytes */
+
+#define	SC_BYTES	(SC_FPREGS + SC_FPREGS_SAVED*REGSZ_FP)
+#define	SC_LONGS	(SC_BYTES/REGSZ)
+
+#ifdef __LP64__
+/* SC_LONGS is 22, so _JBLEN should be 22 or larger */
+#else
+/* SC_LONGS is 28, but must also allocate dynamic-roundup filler.
+   so _JBLEN should be 29 or larger */
+#endif
 
 /*
- * setjmp, longjmp implementation for libc. this code depends
- * on the layout of the struct sigcontext in machine/signal.h.
+ * _setjmp, _longjmp (restoring signal state)
+ *
+ *  GPOFF and FRAMESIZE must be the same for both _setjmp and _longjmp!
  *
  */
 
@@ -51,124 +151,319 @@ NON_LEAF(setjmp, FRAMESZ, ra)
 	SETUP_GP64(GPOFF, setjmp)
 	SAVE_GP(GPOFF)
 	.set	reorder
+
+#ifndef __LP64__
+	addiu   a0, 7				# roundup jmpbuf addr to 8-byte boundary
+	li      t0, ~7
+	and     a0, t0
+#endif
+
 	REG_S	ra, RAOFF(sp)			# save state
 	REG_S	a0, A0OFF(sp)
-
 	move	a0, zero			# get current signal mask
 	jal	sigblock
-
-	REG_L	v1, A0OFF(sp)			# v1 = jmpbuf
-	REG_S	v0, SC_MASK(v1)			# save sc_mask = sigblock(0)
-
-	REG_L	a0, A0OFF(sp)			# restore jmpbuf
+	REG_L	a0, A0OFF(sp)
 	REG_L	ra, RAOFF(sp)
-	REG_S	ra, SC_PC(a0)			# sc_pc = return address
-#if defined(__mips64)
-	dli	v0, 0xACEDBADE			# sigcontext magic number
-#else
-	li	v0, 0xACEDBADE			# sigcontext magic number
-#endif
-	REG_S	v0, SC_REGS+ZERO*REGSZ(a0)
-	REG_S	s0, SC_REGS+S0*REGSZ(a0)
-	REG_S	s1, SC_REGS+S1*REGSZ(a0)
-	REG_S	s2, SC_REGS+S2*REGSZ(a0)
-	REG_S	s3, SC_REGS+S3*REGSZ(a0)
-	REG_S	s4, SC_REGS+S4*REGSZ(a0)
-	REG_S	s5, SC_REGS+S5*REGSZ(a0)
-	REG_S	s6, SC_REGS+S6*REGSZ(a0)
-	REG_S	s7, SC_REGS+S7*REGSZ(a0)
-	REG_S	s8, SC_REGS+S8*REGSZ(a0)
-	REG_L	v0, GPOFF(sp)
-	REG_S	v0, SC_REGS+GP*REGSZ(a0)
-	PTR_ADDU v0, sp, FRAMESZ
-	REG_S	v0, SC_REGS+SP*REGSZ(a0)
 
-#if !defined(SOFTFLOAT)
-	li	v0, 1				# be nice if we could tell
-	REG_S	v0, SC_FPUSED(a0)		# sc_fpused = 1
+	REG_S	v0, SC_MASK(a0)			# save sc_mask = sigblock(0)
+
+	li	v0, 0xACEDBADE			# sigcontext magic number
+	sw	v0, SC_MAGIC(a0)
+	# callee-saved long-sized regs:
+	REG_S	ra, SC_REGS+0*REGSZ(a0)
+	REG_S	s0, SC_REGS+1*REGSZ(a0)
+	REG_S	s1, SC_REGS+2*REGSZ(a0)
+	REG_S	s2, SC_REGS+3*REGSZ(a0)
+	REG_S	s3, SC_REGS+4*REGSZ(a0)
+	REG_S	s4, SC_REGS+5*REGSZ(a0)
+	REG_S	s5, SC_REGS+6*REGSZ(a0)
+	REG_S	s6, SC_REGS+7*REGSZ(a0)
+	REG_S	s7, SC_REGS+8*REGSZ(a0)
+	REG_S	s8, SC_REGS+9*REGSZ(a0)
+	REG_L	v0, GPOFF(sp)
+	REG_S	v0, SC_REGS+10*REGSZ(a0)
+	PTR_ADDU v0, sp, FRAMESZ
+	REG_S	v0, SC_REGS+11*REGSZ(a0)
+
 	cfc1	v0, $31
-	s.d	$f20, SC_FPREGS+((F20-F0)*REGSZ_FP)(a0)
-	s.d	$f22, SC_FPREGS+((F22-F0)*REGSZ_FP)(a0)
-	s.d	$f24, SC_FPREGS+((F24-F0)*REGSZ_FP)(a0)
-	s.d	$f26, SC_FPREGS+((F26-F0)*REGSZ_FP)(a0)
-	s.d	$f28, SC_FPREGS+((F28-F0)*REGSZ_FP)(a0)
-	s.d	$f30, SC_FPREGS+((F30-F0)*REGSZ_FP)(a0)
-#if _MIPS_FPSET == 32
-	s.d	$f21, SC_FPREGS+((F21-F0)*REGSZ_FP)(a0)
-	s.d	$f23, SC_FPREGS+((F23-F0)*REGSZ_FP)(a0)
-	s.d	$f25, SC_FPREGS+((F25-F0)*REGSZ_FP)(a0)
-	s.d	$f27, SC_FPREGS+((F27-F0)*REGSZ_FP)(a0)
-	s.d	$f29, SC_FPREGS+((F29-F0)*REGSZ_FP)(a0)
-	s.d	$f31, SC_FPREGS+((F31-F0)*REGSZ_FP)(a0)
+
+#ifdef __LP64__
+	# callee-saved fp regs on mips n64 ABI are $f24..$f31
+	s.d	$f24, SC_FPREGS+0*REGSZ_FP(a0)
+	s.d	$f25, SC_FPREGS+1*REGSZ_FP(a0)
+	s.d	$f26, SC_FPREGS+2*REGSZ_FP(a0)
+	s.d	$f27, SC_FPREGS+3*REGSZ_FP(a0)
+	s.d	$f28, SC_FPREGS+4*REGSZ_FP(a0)
+	s.d	$f29, SC_FPREGS+5*REGSZ_FP(a0)
+	s.d	$f30, SC_FPREGS+6*REGSZ_FP(a0)
+	s.d	$f31, SC_FPREGS+7*REGSZ_FP(a0)
+#else
+	# callee-saved fp regs on mips o32 ABI are
+	#   the even-numbered fp regs $f20,$f22,...$f30
+	s.d	$f20, SC_FPREGS+0*REGSZ_FP(a0)
+	s.d	$f22, SC_FPREGS+1*REGSZ_FP(a0)
+	s.d	$f24, SC_FPREGS+2*REGSZ_FP(a0)
+	s.d	$f26, SC_FPREGS+3*REGSZ_FP(a0)
+	s.d	$f28, SC_FPREGS+4*REGSZ_FP(a0)
+	s.d	$f30, SC_FPREGS+5*REGSZ_FP(a0)
 #endif
-	REG_S	v0, SC_FPREGS+((FSR-F0)*REGSZ)(a0)
-#endif /* !SOFTFLOAT */
+	sw	v0, SC_FPSR(a0)
 	move	v0, zero
 	RESTORE_GP64
 	PTR_ADDU sp, FRAMESZ
 	j	ra
-
-botch:
-	jal	longjmperror
-	jal	abort
-	RESTORE_GP64
-	PTR_ADDU sp, FRAMESZ
 END(setjmp)
 
-
-LEAF(longjmp, FRAMESZ)
+NON_LEAF(longjmp, FRAMESZ, ra)
+	.mask	0x80000000, RAOFF
 	PTR_SUBU sp, FRAMESZ
 	SETUP_GP64(GPOFF, longjmp)
 	SAVE_GP(GPOFF)
 	.set	reorder
-	sw	a1, A1OFF(sp)
-	sw	a0, A0OFF(sp)
 
+#ifndef __LP64__
+	addiu	a0, 7				# roundup jmpbuf addr to 8-byte boundary
+	li      t0, ~7
+	and	a0, t0
+#endif
+
+	REG_S	a1, A1OFF(sp)
+	REG_S	a0, A0OFF(sp)
 	lw	a0, SC_MASK(a0)
 	jal	sigsetmask
+	REG_L	a0, A0OFF(sp)
+	REG_L	a1, A1OFF(sp)
 
-	lw	a0, A0OFF(sp)
-	lw	a1, A1OFF(sp)
+	lw	v0, SC_MAGIC(a0)
+	li	t0, 0xACEDBADE
+	bne	v0, t0, longjmp_botch			# jump if error
 
-	.set	noreorder
-	REG_L	v0, SC_REGS+ZERO*REGSZ(a0)
-	bne	v0, 0xACEDBADE, botch		# jump if error
-	REG_L	ra, SC_PC(a0)
-	REG_L	s0, SC_REGS+S0*REGSZ(a0)
-	REG_L	s1, SC_REGS+S1*REGSZ(a0)
-	REG_L	s2, SC_REGS+S2*REGSZ(a0)
-	REG_L	s3, SC_REGS+S3*REGSZ(a0)
-	REG_L	s4, SC_REGS+S4*REGSZ(a0)
-	REG_L	s5, SC_REGS+S5*REGSZ(a0)
-	REG_L	s6, SC_REGS+S6*REGSZ(a0)
-	REG_L	s7, SC_REGS+S7*REGSZ(a0)
-	REG_L	s8, SC_REGS+S8*REGSZ(a0)
-	REG_L	gp, SC_REGS+GP*REGSZ(a0)
-	REG_L	sp, SC_REGS+SP*REGSZ(a0)
+	# callee-saved long-sized regs:
+	REG_L	ra, SC_REGS+0*REGSZ(a0)
+	REG_L	s0, SC_REGS+1*REGSZ(a0)
+	REG_L	s1, SC_REGS+2*REGSZ(a0)
+	REG_L	s2, SC_REGS+3*REGSZ(a0)
+	REG_L	s3, SC_REGS+4*REGSZ(a0)
+	REG_L	s4, SC_REGS+5*REGSZ(a0)
+	REG_L	s5, SC_REGS+6*REGSZ(a0)
+	REG_L	s6, SC_REGS+7*REGSZ(a0)
+	REG_L	s7, SC_REGS+8*REGSZ(a0)
+	REG_L	s8, SC_REGS+9*REGSZ(a0)
+	REG_L	gp, SC_REGS+10*REGSZ(a0)
+	REG_L	sp, SC_REGS+11*REGSZ(a0)
 
-#if !defined(SOFTFLOAT)
-	REG_L	v0, SC_FPREGS+((FSR-F0)*REGSZ)(a0)
+	lw	v0, SC_FPSR(a0)
 	ctc1	v0, $31
-	l.d	$f20, SC_FPREGS+((F20-F0)*REGSZ_FP)(a0)
-	l.d	$f22, SC_FPREGS+((F22-F0)*REGSZ_FP)(a0)
-	l.d	$f24, SC_FPREGS+((F24-F0)*REGSZ_FP)(a0)
-	l.d	$f26, SC_FPREGS+((F26-F0)*REGSZ_FP)(a0)
-	l.d	$f28, SC_FPREGS+((F28-F0)*REGSZ_FP)(a0)
-	l.d	$f30, SC_FPREGS+((F30-F0)*REGSZ_FP)(a0)
-#if _MIPS_FPSET == 32
-	l.d	$f21, SC_FPREGS+((F21-F0)*REGSZ_FP)(a0)
-	l.d	$f23, SC_FPREGS+((F23-F0)*REGSZ_FP)(a0)
-	l.d	$f25, SC_FPREGS+((F25-F0)*REGSZ_FP)(a0)
-	l.d	$f27, SC_FPREGS+((F27-F0)*REGSZ_FP)(a0)
-	l.d	$f29, SC_FPREGS+((F29-F0)*REGSZ_FP)(a0)
-	l.d	$f31, SC_FPREGS+((F31-F0)*REGSZ_FP)(a0)
+#ifdef __LP64__
+	# callee-saved fp regs on mips n64 ABI are $f24..$f31
+	l.d	$f24, SC_FPREGS+0*REGSZ_FP(a0)
+	l.d	$f25, SC_FPREGS+1*REGSZ_FP(a0)
+	l.d	$f26, SC_FPREGS+2*REGSZ_FP(a0)
+	l.d	$f27, SC_FPREGS+3*REGSZ_FP(a0)
+	l.d	$f28, SC_FPREGS+4*REGSZ_FP(a0)
+	l.d	$f29, SC_FPREGS+5*REGSZ_FP(a0)
+	l.d	$f30, SC_FPREGS+6*REGSZ_FP(a0)
+	l.d	$f31, SC_FPREGS+7*REGSZ_FP(a0)
+#else
+	# callee-saved fp regs on mips o32 ABI are
+	#   the even-numbered fp regs $f20,$f22,...$f30
+	l.d	$f20, SC_FPREGS+0*REGSZ_FP(a0)
+	l.d	$f22, SC_FPREGS+1*REGSZ_FP(a0)
+	l.d	$f24, SC_FPREGS+2*REGSZ_FP(a0)
+	l.d	$f26, SC_FPREGS+3*REGSZ_FP(a0)
+	l.d	$f28, SC_FPREGS+4*REGSZ_FP(a0)
+	l.d	$f30, SC_FPREGS+5*REGSZ_FP(a0)
 #endif
-#endif /* !SOFTFLOAT */
 	bne	a1, zero, 1f
-	 nop
 	li	a1, 1			# never return 0!
 1:
+	move	v0, a1
 	j	ra
-	 move	v0, a1
 
+longjmp_botch:
+	jal	longjmperror
+	jal	abort
+	RESTORE_GP64
+	PTR_ADDU sp, FRAMESZ
 END(longjmp)
+
+
+/*
+ * _setjmp, _longjmp (not restoring signal state)
+ *
+ *  GPOFF and FRAMESIZE must be the same for both _setjmp and _longjmp!
+ *
+ */
+
+FRAMESZ= MKFSIZ(0,4)
+GPOFF= FRAMESZ-2*REGSZ
+
+LEAF(_setjmp, FRAMESZ)
+	PTR_SUBU sp, FRAMESZ
+	SETUP_GP64(GPOFF, _setjmp)
+	SAVE_GP(GPOFF)
+	.set	reorder
+
+#ifndef __LP64__
+	addiu   a0, 7				# roundup jmpbuf addr to 8-byte boundary
+	li      t0, ~7
+	and     a0, t0
+#endif
+
+	# SC_MASK is unused here
+
+	li	v0, 0xACEDBADE			# sigcontext magic number
+	sw	v0, SC_MAGIC(a0)
+	# callee-saved long-sized regs:
+	REG_S	ra, SC_REGS+0*REGSZ(a0)
+	REG_S	s0, SC_REGS+1*REGSZ(a0)
+	REG_S	s1, SC_REGS+2*REGSZ(a0)
+	REG_S	s2, SC_REGS+3*REGSZ(a0)
+	REG_S	s3, SC_REGS+4*REGSZ(a0)
+	REG_S	s4, SC_REGS+5*REGSZ(a0)
+	REG_S	s5, SC_REGS+6*REGSZ(a0)
+	REG_S	s6, SC_REGS+7*REGSZ(a0)
+	REG_S	s7, SC_REGS+8*REGSZ(a0)
+	REG_S	s8, SC_REGS+9*REGSZ(a0)
+	REG_L	v0, GPOFF(sp)
+	REG_S	v0, SC_REGS+10*REGSZ(a0)
+	PTR_ADDU v0, sp, FRAMESZ
+	REG_S	v0, SC_REGS+11*REGSZ(a0)
+
+	cfc1	v0, $31
+
+#ifdef __LP64__
+	# callee-saved fp regs on mips n64 ABI are $f24..$f31
+	s.d	$f24, SC_FPREGS+0*REGSZ_FP(a0)
+	s.d	$f25, SC_FPREGS+1*REGSZ_FP(a0)
+	s.d	$f26, SC_FPREGS+2*REGSZ_FP(a0)
+	s.d	$f27, SC_FPREGS+3*REGSZ_FP(a0)
+	s.d	$f28, SC_FPREGS+4*REGSZ_FP(a0)
+	s.d	$f29, SC_FPREGS+5*REGSZ_FP(a0)
+	s.d	$f30, SC_FPREGS+6*REGSZ_FP(a0)
+	s.d	$f31, SC_FPREGS+7*REGSZ_FP(a0)
+#else
+	# callee-saved fp regs on mips o32 ABI are
+	#   the even-numbered fp regs $f20,$f22,...$f30
+	s.d	$f20, SC_FPREGS+0*REGSZ_FP(a0)
+	s.d	$f22, SC_FPREGS+1*REGSZ_FP(a0)
+	s.d	$f24, SC_FPREGS+2*REGSZ_FP(a0)
+	s.d	$f26, SC_FPREGS+3*REGSZ_FP(a0)
+	s.d	$f28, SC_FPREGS+4*REGSZ_FP(a0)
+	s.d	$f30, SC_FPREGS+5*REGSZ_FP(a0)
+#endif
+	sw	v0, SC_FPSR(a0)
+	move	v0, zero
+	RESTORE_GP64
+	PTR_ADDU sp, FRAMESZ
+	j	ra
+END(_setjmp)
+
+
+LEAF(_longjmp, FRAMESZ)
+	PTR_SUBU sp, FRAMESZ
+	SETUP_GP64(GPOFF, _longjmp)
+	SAVE_GP(GPOFF)
+	.set	reorder
+
+#ifndef __LP64__
+	addiu	a0, 7				# roundup jmpbuf addr to 8-byte boundary
+	li      t0, ~7
+	and	a0, t0
+#endif
+
+	# SC_MASK is unused here
+
+	lw	v0, SC_MAGIC(a0)
+	li	t0, 0xACEDBADE
+	bne	v0, t0, _longjmp_botch			# jump if error
+
+	# callee-saved long-sized regs:
+	REG_L	ra, SC_REGS+0*REGSZ(a0)
+	REG_L	s0, SC_REGS+1*REGSZ(a0)
+	REG_L	s1, SC_REGS+2*REGSZ(a0)
+	REG_L	s2, SC_REGS+3*REGSZ(a0)
+	REG_L	s3, SC_REGS+4*REGSZ(a0)
+	REG_L	s4, SC_REGS+5*REGSZ(a0)
+	REG_L	s5, SC_REGS+6*REGSZ(a0)
+	REG_L	s6, SC_REGS+7*REGSZ(a0)
+	REG_L	s7, SC_REGS+8*REGSZ(a0)
+	REG_L	s8, SC_REGS+9*REGSZ(a0)
+	REG_L	gp, SC_REGS+10*REGSZ(a0)
+	REG_L	sp, SC_REGS+11*REGSZ(a0)
+
+	lw	v0, SC_FPSR(a0)
+	ctc1	v0, $31
+#ifdef __LP64__
+	# callee-saved fp regs on mips n64 ABI are $f24..$f31
+	l.d	$f24, SC_FPREGS+0*REGSZ_FP(a0)
+	l.d	$f25, SC_FPREGS+1*REGSZ_FP(a0)
+	l.d	$f26, SC_FPREGS+2*REGSZ_FP(a0)
+	l.d	$f27, SC_FPREGS+3*REGSZ_FP(a0)
+	l.d	$f28, SC_FPREGS+4*REGSZ_FP(a0)
+	l.d	$f29, SC_FPREGS+5*REGSZ_FP(a0)
+	l.d	$f30, SC_FPREGS+6*REGSZ_FP(a0)
+	l.d	$f31, SC_FPREGS+7*REGSZ_FP(a0)
+#else
+	# callee-saved fp regs on mips o32 ABI are
+	#   the even-numbered fp regs $f20,$f22,...$f30
+	l.d	$f20, SC_FPREGS+0*REGSZ_FP(a0)
+	l.d	$f22, SC_FPREGS+1*REGSZ_FP(a0)
+	l.d	$f24, SC_FPREGS+2*REGSZ_FP(a0)
+	l.d	$f26, SC_FPREGS+3*REGSZ_FP(a0)
+	l.d	$f28, SC_FPREGS+4*REGSZ_FP(a0)
+	l.d	$f30, SC_FPREGS+5*REGSZ_FP(a0)
+#endif
+	bne	a1, zero, 1f
+	li	a1, 1			# never return 0!
+1:
+	move	v0, a1
+	j	ra
+
+_longjmp_botch:
+	jal	longjmperror
+	jal	abort
+	RESTORE_GP64
+	PTR_ADDU sp, FRAMESZ
+END(_longjmp)
+
+/*
+ * trampolines for sigsetjmp and  siglongjmp save and restore mask.
+ *
+ */
+FRAMESZ= MKFSIZ(1,1)
+GPOFF= FRAMESZ-2*REGSZ
+
+LEAF(sigsetjmp, FRAMESZ)
+	PTR_SUBU sp, FRAMESZ
+	SETUP_GP64(GPOFF, sigsetjmp)
+	.set	reorder
+	sw	a1, _JBLEN*REGSZ(a0)		# save "savemask"
+	bne	a1, 0x0, 1f			# do saving of signal mask?
+	LA	t9, _setjmp
+	RESTORE_GP64
+	PTR_ADDU sp, FRAMESZ
+	jr t9
+
+1:	LA	t9, setjmp
+	RESTORE_GP64
+	PTR_ADDU sp, FRAMESZ
+	jr t9
+END(sigsetjmp)
+
+LEAF(siglongjmp, FRAMESZ)
+	PTR_SUBU sp, FRAMESZ
+	SETUP_GP64(GPOFF, siglongjmp)
+	.set	reorder
+	lw	t0, _JBLEN*REGSZ(a0)		# get "savemask"
+	bne	t0, 0x0, 1f			# restore signal mask?
+	LA	t9, _longjmp
+	RESTORE_GP64
+	PTR_ADDU sp, FRAMESZ
+	jr	t9
+1:
+	LA	t9, longjmp
+	RESTORE_GP64
+	PTR_ADDU sp, FRAMESZ
+	jr	t9
+END(siglongjmp)

libc/arch-mips/include/machine/asm.h

@@ -28,9 +28,7 @@
 #ifndef _MIPS64_ASM_H
 #define _MIPS64_ASM_H
 
-#ifndef _ALIGN_TEXT
-# define _ALIGN_TEXT .align 4
-#endif
+#define __bionic_asm_align 4
 
 #undef __bionic_asm_custom_entry
 #undef __bionic_asm_custom_end

libc/arch-mips/include/machine/endian.h

@@ -1,70 +0,0 @@
-/*	$OpenBSD: endian.h,v 1.5 2006/02/27 23:35:59 miod Exp $ */
-
-/*
- * Copyright (c) 2001-2002 Opsycon AB  (www.opsycon.se / www.opsycon.com)
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- *    notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- *    notice, this list of conditions and the following disclaimer in the
- *    documentation and/or other materials provided with the distribution.
- *
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS
- * OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
- * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY
- * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- *
- */
-
-#ifndef _MIPS64_ENDIAN_H_
-#define _MIPS64_ENDIAN_H_
-
-#ifdef __GNUC__
-
-#if defined(__mips_isa_rev) && (__mips_isa_rev >= 2)
-#define __swap16md(x) ({					\
-    register uint16_t _x = (x);					\
-    register uint16_t _r;					\
-    __asm volatile ("wsbh %0, %1" : "=r" (_r) : "r" (_x));	\
-    _r;								\
-})
-
-#define __swap32md(x) ({					\
-    register uint32_t _x = (x);					\
-    register uint32_t _r;					\
-    __asm volatile ("wsbh %0, %1; rotr %0, %0, 16" : "=r" (_r) : "r" (_x)); \
-    _r;								\
-})
-
-#define __swap64md(x) ({					\
-    uint64_t _swap64md_x = (x);					\
-    (uint64_t) __swap32md(_swap64md_x >> 32) |			\
-        (uint64_t) __swap32md(_swap64md_x & 0xffffffff) << 32;	\
-})
-
-/* Tell sys/endian.h we have MD variants of the swap macros.  */
-#define MD_SWAP
-
-#endif  /* __mips32r2__ */
-#endif  /* __GNUC__ */
-
-#if defined(__MIPSEB__)
-#define _BYTE_ORDER _BIG_ENDIAN
-#else
-#define _BYTE_ORDER _LITTLE_ENDIAN
-#endif
-#define __STRICT_ALIGNMENT
-#include <sys/types.h>
-#include <sys/endian.h>
-
-#endif /* _MIPS64_ENDIAN_H_ */

libc/arch-mips/include/machine/exec.h

@@ -1,188 +0,0 @@
-/*	$OpenBSD: exec.h,v 1.1 2004/10/18 19:05:36 grange Exp $	*/
-
-/*
- * Copyright (c) 1996-2004 Per Fogelstrom, Opsycon AB
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- *    notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- *    notice, this list of conditions and the following disclaimer in the
- *    documentation and/or other materials provided with the distribution.
- *
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS
- * OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
- * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY
- * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- *
- */
-
-#ifndef _MIPS64_EXEC_H_
-#define _MIPS64_EXEC_H_
-
-#define	__LDPGSZ	4096
-
-/*
- *  Define what exec "formats" we should handle.
- */
-#define NATIVE_EXEC_ELF
-#define NATIVE_ELFSIZE 64
-#define	EXEC_SCRIPT
-
-/*
- *  If included from sys/exec.h define kernels ELF format.
- */
-#ifdef __LP64__
-#define	ARCH_ELFSIZE 64
-#define DB_ELFSIZE 64
-#define ELF_TARG_CLASS  ELFCLASS64
-#else
-#define	ARCH_ELFSIZE 32
-#define DB_ELFSIZE 32
-#define ELF_TARG_CLASS  ELFCLASS32
-#endif
-
-#if defined(__MIPSEB__)
-#define ELF_TARG_DATA		ELFDATA2MSB
-#else
-#define ELF_TARG_DATA		ELFDATA2LSB
-#endif
-#define ELF_TARG_MACH		EM_MIPS
-
-#define _NLIST_DO_ELF
-
-#if defined(_LP64)
-#define _KERN_DO_ELF64
-#if defined(COMPAT_O32)
-#define _KERN_DO_ELF
-#endif
-#else
-#define _KERN_DO_ELF
-#endif
-
-/* Information taken from MIPS ABI supplemental */
-
-/* Architecture dependent Segment types - p_type */
-#define PT_MIPS_REGINFO 0x70000000      /* Register usage information */
-
-/* Architecture dependent d_tag field for Elf32_Dyn.  */
-#define DT_MIPS_RLD_VERSION  0x70000001 /* Runtime Linker Interface ID */
-#define DT_MIPS_TIME_STAMP   0x70000002 /* Timestamp */
-#define DT_MIPS_ICHECKSUM    0x70000003 /* Cksum of ext. str. and com. sizes */
-#define DT_MIPS_IVERSION     0x70000004 /* Version string (string tbl index) */
-#define DT_MIPS_FLAGS        0x70000005 /* Flags */
-#define DT_MIPS_BASE_ADDRESS 0x70000006 /* Segment base address */
-#define DT_MIPS_CONFLICT     0x70000008 /* Adr of .conflict section */
-#define DT_MIPS_LIBLIST      0x70000009 /* Address of .liblist section */
-#define DT_MIPS_LOCAL_GOTNO  0x7000000a /* Number of local .GOT entries */
-#define DT_MIPS_CONFLICTNO   0x7000000b /* Number of .conflict entries */
-#define DT_MIPS_LIBLISTNO    0x70000010 /* Number of .liblist entries */
-#define DT_MIPS_SYMTABNO     0x70000011 /* Number of .dynsym entries */
-#define DT_MIPS_UNREFEXTNO   0x70000012 /* First external DYNSYM */
-#define DT_MIPS_GOTSYM       0x70000013 /* First GOT entry in .dynsym */
-#define DT_MIPS_HIPAGENO     0x70000014 /* Number of GOT page table entries */
-#define DT_MIPS_RLD_MAP      0x70000016 /* Address of debug map pointer */
-
-#define DT_PROCNUM (DT_MIPS_RLD_MAP - DT_LOPROC + 1)
-
-/*
- * Legal values for e_flags field of Elf32_Ehdr.
- */
-#define EF_MIPS_NOREORDER	0x00000001	/* .noreorder was used */
-#define EF_MIPS_PIC		0x00000002	/* Contains PIC code */
-#define EF_MIPS_CPIC		0x00000004	/* Uses PIC calling sequence */
-#define	EF_MIPS_ABI2		0x00000020	/* -n32 on Irix 6 */
-#define	EF_MIPS_32BITMODE	0x00000100	/* 64 bit in 32 bit mode... */
-#define EF_MIPS_ARCH		0xf0000000	/* MIPS architecture level */
-#define	E_MIPS_ARCH_1		0x00000000
-#define	E_MIPS_ARCH_2		0x10000000
-#define	E_MIPS_ARCH_3		0x20000000
-#define	E_MIPS_ARCH_4		0x30000000
-#define	EF_MIPS_ABI		0x0000f000	/* ABI level */
-#define	E_MIPS_ABI_NONE		0x00000000	/* ABI level not set */
-#define	E_MIPS_ABI_O32		0x00001000
-#define	E_MIPS_ABI_O64		0x00002000
-#define	E_MIPS_ABI_EABI32	0x00004000
-#define	E_MIPS_ABI_EABI64	0x00004000
-
-/*
- * Mips special sections.
- */
-#define	SHN_MIPS_ACOMMON	0xff00		/* Allocated common symbols */
-#define	SHN_MIPS_SCOMMON	0xff03		/* Small common symbols */
-#define	SHN_MIPS_SUNDEFINED	0xff04		/* Small undefined symbols */
-
-/*
- * Legal values for sh_type field of Elf32_Shdr.
- */
-#define	SHT_MIPS_LIBLIST  0x70000000	/* Shared objects used in link */
-#define	SHT_MIPS_CONFLICT 0x70000002	/* Conflicting symbols */
-#define	SHT_MIPS_GPTAB    0x70000003	/* Global data area sizes */
-#define	SHT_MIPS_UCODE    0x70000004	/* Reserved for SGI/MIPS compilers */
-#define	SHT_MIPS_DEBUG    0x70000005	/* MIPS ECOFF debugging information */
-#define	SHT_MIPS_REGINFO  0x70000006	/* Register usage information */
-
-/*
- * Legal values for sh_flags field of Elf32_Shdr.
- */
-#define	SHF_MIPS_GPREL	0x10000000	/* Must be part of global data area */
-
-#if 0
-/*
- * Entries found in sections of type SHT_MIPS_GPTAB.
- */
-typedef union {
-	struct {
-		Elf32_Word gt_current_g_value;	/* -G val used in compilation */
-		Elf32_Word gt_unused;	/* Not used */
-	} gt_header;			/* First entry in section */
-	struct {
-		Elf32_Word gt_g_value;	/* If this val were used for -G */
-		Elf32_Word gt_bytes;	/* This many bytes would be used */
-	} gt_entry;			/* Subsequent entries in section */
-} Elf32_gptab;
-
-/*
- * Entry found in sections of type SHT_MIPS_REGINFO.
- */
-typedef struct {
-	Elf32_Word	ri_gprmask;	/* General registers used */
-	Elf32_Word	ri_cprmask[4];	/* Coprocessor registers used */
-	Elf32_Sword	ri_gp_value;	/* $gp register value */
-} Elf32_RegInfo;
-#endif
-
-
-/*
- * Mips relocations.
- */
-
-#define	R_MIPS_NONE	0	/* No reloc */
-#define	R_MIPS_16	1	/* Direct 16 bit */
-#define	R_MIPS_32	2	/* Direct 32 bit */
-#define	R_MIPS_REL32	3	/* PC relative 32 bit */
-#define	R_MIPS_26	4	/* Direct 26 bit shifted */
-#define	R_MIPS_HI16	5	/* High 16 bit */
-#define	R_MIPS_LO16	6	/* Low 16 bit */
-#define	R_MIPS_GPREL16	7	/* GP relative 16 bit */
-#define	R_MIPS_LITERAL	8	/* 16 bit literal entry */
-#define	R_MIPS_GOT16	9	/* 16 bit GOT entry */
-#define	R_MIPS_PC16	10	/* PC relative 16 bit */
-#define	R_MIPS_CALL16	11	/* 16 bit GOT entry for function */
-#define	R_MIPS_GPREL32	12	/* GP relative 32 bit */
-
-#define	R_MIPS_64	18
-
-#define	R_MIPS_REL32_64	((R_MIPS_64 << 8) | R_MIPS_REL32)
-
-
-#endif	/* !_MIPS64_EXEC_H_ */

libc/arch-mips/include/machine/regdef.h

@@ -37,6 +37,13 @@
 #ifndef _MIPS_REGDEF_H_
 #define _MIPS_REGDEF_H_
 
+#if (_MIPS_SIM == _ABI64) && !defined(__mips_n64)
+#define __mips_n64 1
+#endif
+#if (_MIPS_SIM == _ABIN32) &&  !defined(__mips_n32)
+#define __mips_n32 1
+#endif
+
 #define zero	$0	/* always zero */
 #define AT	$at	/* assembler temp */
 #define v0	$2	/* return value */

libc/arch-mips/include/machine/regnum.h

@@ -1,119 +0,0 @@
-/*	$OpenBSD: regnum.h,v 1.3 2004/08/10 20:28:13 deraadt Exp $ */
-
-/*
- * Copyright (c) 2001-2002 Opsycon AB  (www.opsycon.se / www.opsycon.com)
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- *    notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- *    notice, this list of conditions and the following disclaimer in the
- *    documentation and/or other materials provided with the distribution.
- *
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS
- * OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
- * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY
- * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- *
- */
-
-#ifndef _MIPS64_REGNUM_H_
-#define _MIPS64_REGNUM_H_
-
-/*
- * Location of the saved registers relative to ZERO.
- * Usage is p->p_regs[XX].
- */
-#define ZERO	0
-#define AST	1
-#define V0	2
-#define V1	3
-#define A0	4
-#define A1	5
-#define A2	6
-#define A3	7
-#define T0	8
-#define T1	9
-#define T2	10
-#define T3	11
-#define T4	12
-#define T5	13
-#define T6	14
-#define T7	15
-#define S0	16
-#define S1	17
-#define S2	18
-#define S3	19
-#define S4	20
-#define S5	21
-#define S6	22
-#define S7	23
-#define T8	24
-#define T9	25
-#define K0	26
-#define K1	27
-#define GP	28
-#define SP	29
-#define S8	30
-#define RA	31
-#define	SR	32
-#define	PS	SR	/* alias for SR */
-#define MULLO	33
-#define MULHI	34
-#define BADVADDR 35
-#define CAUSE	36
-#define	PC	37
-#define	IC	38
-#define	CPL	39
-
-#define	NUMSAVEREGS 40		/* Number of registers saved in trap */
-
-#define FPBASE	NUMSAVEREGS
-#define F0	(FPBASE+0)
-#define F1	(FPBASE+1)
-#define F2	(FPBASE+2)
-#define F3	(FPBASE+3)
-#define F4	(FPBASE+4)
-#define F5	(FPBASE+5)
-#define F6	(FPBASE+6)
-#define F7	(FPBASE+7)
-#define F8	(FPBASE+8)
-#define F9	(FPBASE+9)
-#define F10	(FPBASE+10)
-#define F11	(FPBASE+11)
-#define F12	(FPBASE+12)
-#define F13	(FPBASE+13)
-#define F14	(FPBASE+14)
-#define F15	(FPBASE+15)
-#define F16	(FPBASE+16)
-#define F17	(FPBASE+17)
-#define F18	(FPBASE+18)
-#define F19	(FPBASE+19)
-#define F20	(FPBASE+20)
-#define F21	(FPBASE+21)
-#define F22	(FPBASE+22)
-#define F23	(FPBASE+23)
-#define F24	(FPBASE+24)
-#define F25	(FPBASE+25)
-#define F26	(FPBASE+26)
-#define F27	(FPBASE+27)
-#define F28	(FPBASE+28)
-#define F29	(FPBASE+29)
-#define F30	(FPBASE+30)
-#define F31	(FPBASE+31)
-#define	FSR	(FPBASE+32)
-
-#define	NUMFPREGS 33
-
-#define	NREGS	(NUMSAVEREGS + NUMFPREGS)
-
-#endif /* !_MIPS64_REGNUM_H_ */

libc/arch-mips/include/machine/setjmp.h

@@ -5,6 +5,10 @@
 #ifndef _MIPS_SETJMP_H_
 #define _MIPS_SETJMP_H_
 
-#define	_JBLEN	157		/* size, in longs, of a jmp_buf */
+#ifdef __LP64__
+#define	_JBLEN	22		/* size, in 8-byte longs, of a mips64 jmp_buf */
+#else
+#define	_JBLEN	29		/* size, in 4-byte longs, of a mips32 jmp_buf */
+#endif
 
 #endif /* !_MIPS_SETJMP_H_ */

libc/arch-mips/mips.mk

@@ -67,9 +67,7 @@ libc_bionic_src_files_mips += \
     arch-mips/bionic/bzero.S \
     arch-mips/bionic/cacheflush.cpp \
     arch-mips/bionic/_exit_with_stack_teardown.S \
-    arch-mips/bionic/_setjmp.S \
     arch-mips/bionic/setjmp.S \
-    arch-mips/bionic/sigsetjmp.S \
     arch-mips/bionic/syscall.S \
     arch-mips/bionic/vfork.S \
 

libc/arch-mips/string/mips_strlen.c

@@ -30,6 +30,7 @@
  * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  */
 
+#include <string.h>
 #include "mips-string-ops.h"
 
 #define do_strlen_word(__av) {\
@@ -47,8 +48,8 @@
 #define strlen my_strlen
 #endif
 
-int
-strlen (const void *_a)
+size_t
+strlen (const char *_a)
 {
   int cnt = 0;
   unsigned x;

libc/arch-mips/syscalls/__clock_nanosleep.S

@@ -2,7 +2,7 @@
 
 #include <private/bionic_asm.h>
 
-ENTRY(clock_nanosleep)
+ENTRY(__clock_nanosleep)
     .set noreorder
     .cpload t9
     li v0, __NR_clock_nanosleep
@@ -16,4 +16,4 @@ ENTRY(clock_nanosleep)
     j t9
     nop
     .set reorder
-END(clock_nanosleep)
+END(__clock_nanosleep)

libc/arch-mips/syscalls/__rt_sigqueueinfo.S

@@ -0,0 +1,19 @@
+/* Generated by gensyscalls.py. Do not edit. */
+
+#include <private/bionic_asm.h>
+
+ENTRY(__rt_sigqueueinfo)
+    .set noreorder
+    .cpload t9
+    li v0, __NR_rt_sigqueueinfo
+    syscall
+    bnez a3, 1f
+    move a0, v0
+    j ra
+    nop
+1:
+    la t9,__set_errno_internal
+    j t9
+    nop
+    .set reorder
+END(__rt_sigqueueinfo)

libc/arch-mips/syscalls/sethostname.S

@@ -0,0 +1,19 @@
+/* Generated by gensyscalls.py. Do not edit. */
+
+#include <private/bionic_asm.h>
+
+ENTRY(sethostname)
+    .set noreorder
+    .cpload t9
+    li v0, __NR_sethostname
+    syscall
+    bnez a3, 1f
+    move a0, v0
+    j ra
+    nop
+1:
+    la t9,__set_errno_internal
+    j t9
+    nop
+    .set reorder
+END(sethostname)

libc/arch-mips64/bionic/_setjmp.S

@@ -1,150 +0,0 @@
-/*	$OpenBSD: _setjmp.S,v 1.4 2005/08/07 16:40:15 espie Exp $ */
-
-/*
- * Copyright (c) 2002 Opsycon AB  (www.opsycon.se / www.opsycon.com)
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- *    notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- *    notice, this list of conditions and the following disclaimer in the
- *    documentation and/or other materials provided with the distribution.
- * 3. Neither the name of Opsycon AB nor the names of its contributors
- *    may be used to endorse or promote products derived from this software
- *    without specific prior written permission.
- *
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS
- * OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
- * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY
- * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- *
- */
-
-#include <private/bionic_asm.h>
-#include <machine/regnum.h>
-#include <machine/signal.h>
-
-/*
- * _setjmp, _longjmp (not restoring signal state)
- *
- * XXX FPSET should probably be taken from SR setting. hmmm...
- *  GPOFF and FRAMESIZE must be the same for both _setjmp and _longjmp!
- *
- */
-
-FRAMESZ= MKFSIZ(0,4)
-GPOFF= FRAMESZ-2*REGSZ
-
-LEAF(_setjmp, FRAMESZ)
-	PTR_SUBU sp, FRAMESZ
-	SETUP_GP64(GPOFF, _setjmp)
-	SAVE_GP(GPOFF)
-	.set	noreorder
-#if defined(__mips64)
-	dli	v0, 0xACEDBADE			# sigcontext magic number
-#else
-	li	v0, 0xACEDBADE			# sigcontext magic number
-#endif
-	REG_S	v0, SC_REGS+ZERO*REGSZ(a0)
-	REG_S	s0, SC_REGS+S0*REGSZ(a0)
-	REG_S	s1, SC_REGS+S1*REGSZ(a0)
-	REG_S	s2, SC_REGS+S2*REGSZ(a0)
-	REG_S	s3, SC_REGS+S3*REGSZ(a0)
-	REG_S	s4, SC_REGS+S4*REGSZ(a0)
-	REG_S	s5, SC_REGS+S5*REGSZ(a0)
-	REG_S	s6, SC_REGS+S6*REGSZ(a0)
-	REG_S	s7, SC_REGS+S7*REGSZ(a0)
-	REG_S	s8, SC_REGS+S8*REGSZ(a0)
-	REG_L	v0, GPOFF(sp)
-	REG_S	v0, SC_REGS+GP*REGSZ(a0)
-	PTR_ADDU v0, sp, FRAMESZ
-	REG_S	v0, SC_REGS+SP*REGSZ(a0)
-	REG_S	ra, SC_PC(a0)
-
-#if !defined(SOFTFLOAT)
-	li	v0, 1				# be nice if we could tell
-	REG_S	v0, SC_FPUSED(a0)		# sc_fpused = 1
-	cfc1	v0, $31
-	s.d	$f20, SC_FPREGS+((F20-F0)*REGSZ_FP)(a0)
-	s.d	$f22, SC_FPREGS+((F22-F0)*REGSZ_FP)(a0)
-	s.d	$f24, SC_FPREGS+((F24-F0)*REGSZ_FP)(a0)
-	s.d	$f26, SC_FPREGS+((F26-F0)*REGSZ_FP)(a0)
-	s.d	$f28, SC_FPREGS+((F28-F0)*REGSZ_FP)(a0)
-	s.d	$f30, SC_FPREGS+((F30-F0)*REGSZ_FP)(a0)
-#if _MIPS_FPSET == 32
-	s.d	$f21, SC_FPREGS+((F21-F0)*REGSZ_FP)(a0)
-	s.d	$f23, SC_FPREGS+((F23-F0)*REGSZ_FP)(a0)
-	s.d	$f25, SC_FPREGS+((F25-F0)*REGSZ_FP)(a0)
-	s.d	$f27, SC_FPREGS+((F27-F0)*REGSZ_FP)(a0)
-	s.d	$f29, SC_FPREGS+((F29-F0)*REGSZ_FP)(a0)
-	s.d	$f31, SC_FPREGS+((F31-F0)*REGSZ_FP)(a0)
-#endif
-	REG_S	v0, SC_FPREGS+((FSR-F0)*REGSZ)(a0)
-#endif /* !SOFTFLOAT */
-	RESTORE_GP64
-	PTR_ADDU sp, FRAMESZ
-	j	ra
-	 move	v0, zero
-END(_setjmp)
-
-LEAF(_longjmp, FRAMESZ)
-	PTR_SUBU sp, FRAMESZ
-	SETUP_GP64(GPOFF, _longjmp)
-	SAVE_GP(GPOFF)
-	.set    noreorder
-	REG_L	v0, SC_REGS+ZERO*REGSZ(a0)
-	bne	v0, 0xACEDBADE, botch		# jump if error
-	REG_L	ra, SC_PC(a0)
-	REG_L	v0, SC_FPREGS+((FSR-F0)*REGSZ)(a0)
-	REG_L	s0, SC_REGS+S0*REGSZ(a0)
-	REG_L	s1, SC_REGS+S1*REGSZ(a0)
-	REG_L	s2, SC_REGS+S2*REGSZ(a0)
-	REG_L	s3, SC_REGS+S3*REGSZ(a0)
-	REG_L	s4, SC_REGS+S4*REGSZ(a0)
-	REG_L	s5, SC_REGS+S5*REGSZ(a0)
-	REG_L	s6, SC_REGS+S6*REGSZ(a0)
-	REG_L	s7, SC_REGS+S7*REGSZ(a0)
-	REG_L	s8, SC_REGS+S8*REGSZ(a0)
-	REG_L	gp, SC_REGS+GP*REGSZ(a0)
-	REG_L	sp, SC_REGS+SP*REGSZ(a0)
-#if !defined(SOFTFLOAT)
-	ctc1	v0, $31
-	l.d	$f20, SC_FPREGS+((F20-F0)*REGSZ_FP)(a0)
-	l.d	$f22, SC_FPREGS+((F22-F0)*REGSZ_FP)(a0)
-	l.d	$f24, SC_FPREGS+((F24-F0)*REGSZ_FP)(a0)
-	l.d	$f26, SC_FPREGS+((F26-F0)*REGSZ_FP)(a0)
-	l.d	$f28, SC_FPREGS+((F28-F0)*REGSZ_FP)(a0)
-	l.d	$f30, SC_FPREGS+((F30-F0)*REGSZ_FP)(a0)
-#if _MIPS_FPSET == 32
-	l.d	$f21, SC_FPREGS+((F21-F0)*REGSZ_FP)(a0)
-	l.d	$f23, SC_FPREGS+((F23-F0)*REGSZ_FP)(a0)
-	l.d	$f25, SC_FPREGS+((F25-F0)*REGSZ_FP)(a0)
-	l.d	$f27, SC_FPREGS+((F27-F0)*REGSZ_FP)(a0)
-	l.d	$f29, SC_FPREGS+((F29-F0)*REGSZ_FP)(a0)
-	l.d	$f31, SC_FPREGS+((F31-F0)*REGSZ_FP)(a0)
-#endif
-#endif /* !SOFTFLOAT */
-	bne	a1, zero, 1f
-	 nop
-	li	a1, 1			# never return 0!
-1:
-	j	ra
-	 move	v0, a1
-
-botch:
-	jal	longjmperror
-	nop
-	jal	abort
-	nop
-	RESTORE_GP64
-	PTR_ADDU sp, FRAMESZ
-END(_longjmp)

libc/arch-mips64/bionic/atexit.h

@@ -1,36 +0,0 @@
-/*
- * Copyright (C) 2013 The Android Open Source Project
- * All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- *  * Redistributions of source code must retain the above copyright
- *    notice, this list of conditions and the following disclaimer.
- *  * Redistributions in binary form must reproduce the above copyright
- *    notice, this list of conditions and the following disclaimer in
- *    the documentation and/or other materials provided with the
- *    distribution.
- *
- * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
- * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
- * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
- * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
- * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
- * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
- * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
- * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
- * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
- * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT
- * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- */
-
-extern void *__dso_handle;
-extern int __cxa_atexit(void (*func)(void *), void *arg, void *dso);
-
-__attribute__ ((visibility ("hidden")))
-int atexit(void (*func)(void))
-{
-  return (__cxa_atexit((void (*)(void *))func, (void *)0, &__dso_handle));
-}

libc/arch-mips64/bionic/crtbegin.c

@@ -91,4 +91,4 @@ __asm__ (
 );
 
 #include "../../arch-common/bionic/__dso_handle.h"
-#include "atexit.h"
+#include "../../arch-common/bionic/atexit.h"

libc/arch-mips64/bionic/crtbegin_so.c

@@ -1,38 +0,0 @@
-/*
- * Copyright (C) 2013 The Android Open Source Project
- * All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- *  * Redistributions of source code must retain the above copyright
- *    notice, this list of conditions and the following disclaimer.
- *  * Redistributions in binary form must reproduce the above copyright
- *    notice, this list of conditions and the following disclaimer in
- *    the documentation and/or other materials provided with the
- *    distribution.
- *
- * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
- * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
- * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
- * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
- * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
- * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
- * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
- * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
- * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
- * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT
- * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- */
-
-extern void __cxa_finalize(void *);
-extern void *__dso_handle;
-
-__attribute__((visibility("hidden"),destructor))
-void __on_dlclose() {
-  __cxa_finalize(&__dso_handle);
-}
-
-#include "../../arch-common/bionic/__dso_handle_so.h"
-#include "atexit.h"

libc/arch-mips64/bionic/setjmp.S

@@ -1,174 +0,0 @@
-/*      $OpenBSD: setjmp.S,v 1.5 2005/08/07 16:40:15 espie Exp $ */
-
-/*
- * Copyright (c) 2001-2002 Opsycon AB  (www.opsycon.se / www.opsycon.com)
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- *    notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- *    notice, this list of conditions and the following disclaimer in the
- *    documentation and/or other materials provided with the distribution.
- * 3. Neither the name of Opsycon AB nor the names of its contributors
- *    may be used to endorse or promote products derived from this software
- *    without specific prior written permission.
- *
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS
- * OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
- * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY
- * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- *
- */
-
-#include <private/bionic_asm.h>
-#include <machine/regnum.h>
-#include <machine/signal.h>
-
-/*
- * setjmp, longjmp implementation for libc. this code depends
- * on the layout of the struct sigcontext in machine/signal.h.
- *
- */
-
-FRAMESZ= MKFSIZ(2,6)
-A1OFF= FRAMESZ-4*REGSZ
-A0OFF= FRAMESZ-3*REGSZ
-GPOFF= FRAMESZ-2*REGSZ
-RAOFF= FRAMESZ-1*REGSZ
-
-NON_LEAF(setjmp, FRAMESZ, ra)
-	.mask	0x80000000, RAOFF
-	PTR_SUBU sp, FRAMESZ			# allocate stack frame
-	SETUP_GP64(GPOFF, setjmp)
-	SAVE_GP(GPOFF)
-	.set	reorder
-	REG_S	ra, RAOFF(sp)			# save state
-	REG_S	a0, A0OFF(sp)
-
-	move	a0, zero			# get current signal mask
-	jal	sigblock
-
-	REG_L	v1, A0OFF(sp)			# v1 = jmpbuf
-	REG_S	v0, SC_MASK(v1)			# save sc_mask = sigblock(0)
-
-	REG_L	a0, A0OFF(sp)			# restore jmpbuf
-	REG_L	ra, RAOFF(sp)
-	REG_S	ra, SC_PC(a0)			# sc_pc = return address
-#if defined(__mips64)
-	dli	v0, 0xACEDBADE			# sigcontext magic number
-#else
-	li	v0, 0xACEDBADE			# sigcontext magic number
-#endif
-	REG_S	v0, SC_REGS+ZERO*REGSZ(a0)
-	REG_S	s0, SC_REGS+S0*REGSZ(a0)
-	REG_S	s1, SC_REGS+S1*REGSZ(a0)
-	REG_S	s2, SC_REGS+S2*REGSZ(a0)
-	REG_S	s3, SC_REGS+S3*REGSZ(a0)
-	REG_S	s4, SC_REGS+S4*REGSZ(a0)
-	REG_S	s5, SC_REGS+S5*REGSZ(a0)
-	REG_S	s6, SC_REGS+S6*REGSZ(a0)
-	REG_S	s7, SC_REGS+S7*REGSZ(a0)
-	REG_S	s8, SC_REGS+S8*REGSZ(a0)
-	REG_L	v0, GPOFF(sp)
-	REG_S	v0, SC_REGS+GP*REGSZ(a0)
-	PTR_ADDU v0, sp, FRAMESZ
-	REG_S	v0, SC_REGS+SP*REGSZ(a0)
-
-#if !defined(SOFTFLOAT)
-	li	v0, 1				# be nice if we could tell
-	REG_S	v0, SC_FPUSED(a0)		# sc_fpused = 1
-	cfc1	v0, $31
-	s.d	$f20, SC_FPREGS+((F20-F0)*REGSZ_FP)(a0)
-	s.d	$f22, SC_FPREGS+((F22-F0)*REGSZ_FP)(a0)
-	s.d	$f24, SC_FPREGS+((F24-F0)*REGSZ_FP)(a0)
-	s.d	$f26, SC_FPREGS+((F26-F0)*REGSZ_FP)(a0)
-	s.d	$f28, SC_FPREGS+((F28-F0)*REGSZ_FP)(a0)
-	s.d	$f30, SC_FPREGS+((F30-F0)*REGSZ_FP)(a0)
-#if _MIPS_FPSET == 32
-	s.d	$f21, SC_FPREGS+((F21-F0)*REGSZ_FP)(a0)
-	s.d	$f23, SC_FPREGS+((F23-F0)*REGSZ_FP)(a0)
-	s.d	$f25, SC_FPREGS+((F25-F0)*REGSZ_FP)(a0)
-	s.d	$f27, SC_FPREGS+((F27-F0)*REGSZ_FP)(a0)
-	s.d	$f29, SC_FPREGS+((F29-F0)*REGSZ_FP)(a0)
-	s.d	$f31, SC_FPREGS+((F31-F0)*REGSZ_FP)(a0)
-#endif
-	REG_S	v0, SC_FPREGS+((FSR-F0)*REGSZ)(a0)
-#endif /* !SOFTFLOAT */
-	move	v0, zero
-	RESTORE_GP64
-	PTR_ADDU sp, FRAMESZ
-	j	ra
-
-botch:
-	jal	longjmperror
-	jal	abort
-	RESTORE_GP64
-	PTR_ADDU sp, FRAMESZ
-END(setjmp)
-
-
-LEAF(longjmp, FRAMESZ)
-	PTR_SUBU sp, FRAMESZ
-	SETUP_GP64(GPOFF, longjmp)
-	SAVE_GP(GPOFF)
-	.set	reorder
-	sw	a1, A1OFF(sp)
-	sw	a0, A0OFF(sp)
-
-	lw	a0, SC_MASK(a0)
-	jal	sigsetmask
-
-	lw	a0, A0OFF(sp)
-	lw	a1, A1OFF(sp)
-
-	.set	noreorder
-	REG_L	v0, SC_REGS+ZERO*REGSZ(a0)
-	bne	v0, 0xACEDBADE, botch		# jump if error
-	REG_L	ra, SC_PC(a0)
-	REG_L	s0, SC_REGS+S0*REGSZ(a0)
-	REG_L	s1, SC_REGS+S1*REGSZ(a0)
-	REG_L	s2, SC_REGS+S2*REGSZ(a0)
-	REG_L	s3, SC_REGS+S3*REGSZ(a0)
-	REG_L	s4, SC_REGS+S4*REGSZ(a0)
-	REG_L	s5, SC_REGS+S5*REGSZ(a0)
-	REG_L	s6, SC_REGS+S6*REGSZ(a0)
-	REG_L	s7, SC_REGS+S7*REGSZ(a0)
-	REG_L	s8, SC_REGS+S8*REGSZ(a0)
-	REG_L	gp, SC_REGS+GP*REGSZ(a0)
-	REG_L	sp, SC_REGS+SP*REGSZ(a0)
-
-#if !defined(SOFTFLOAT)
-	REG_L	v0, SC_FPREGS+((FSR-F0)*REGSZ)(a0)
-	ctc1	v0, $31
-	l.d	$f20, SC_FPREGS+((F20-F0)*REGSZ_FP)(a0)
-	l.d	$f22, SC_FPREGS+((F22-F0)*REGSZ_FP)(a0)
-	l.d	$f24, SC_FPREGS+((F24-F0)*REGSZ_FP)(a0)
-	l.d	$f26, SC_FPREGS+((F26-F0)*REGSZ_FP)(a0)
-	l.d	$f28, SC_FPREGS+((F28-F0)*REGSZ_FP)(a0)
-	l.d	$f30, SC_FPREGS+((F30-F0)*REGSZ_FP)(a0)
-#if _MIPS_FPSET == 32
-	l.d	$f21, SC_FPREGS+((F21-F0)*REGSZ_FP)(a0)
-	l.d	$f23, SC_FPREGS+((F23-F0)*REGSZ_FP)(a0)
-	l.d	$f25, SC_FPREGS+((F25-F0)*REGSZ_FP)(a0)
-	l.d	$f27, SC_FPREGS+((F27-F0)*REGSZ_FP)(a0)
-	l.d	$f29, SC_FPREGS+((F29-F0)*REGSZ_FP)(a0)
-	l.d	$f31, SC_FPREGS+((F31-F0)*REGSZ_FP)(a0)
-#endif
-#endif /* !SOFTFLOAT */
-	bne	a1, zero, 1f
-	 nop
-	li	a1, 1			# never return 0!
-1:
-	j	ra
-	 move	v0, a1
-
-END(longjmp)

libc/arch-mips64/bionic/setjmp.S

@@ -0,0 +1 @@
+../../arch-mips/bionic/setjmp.S

libc/arch-mips64/bionic/syscall.S

@@ -52,7 +52,7 @@ LEAF(syscall,FRAMESZ)
 #else
 	move	a3, a4
 	move	a4, a5
-	REG_L	a5, FRAMESZ(sp)
+	move	a5, a6
 #endif
 	syscall
 	move	a0, v0

libc/arch-mips64/include/machine

@@ -0,0 +1 @@
+../../arch-mips/include/machine

libc/arch-mips64/include/machine/asm.h

@@ -1,208 +0,0 @@
-/*	$OpenBSD: asm.h,v 1.7 2004/10/20 12:49:15 pefo Exp $ */
-
-/*
- * Copyright (c) 2001-2002 Opsycon AB  (www.opsycon.se / www.opsycon.com)
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- *    notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- *    notice, this list of conditions and the following disclaimer in the
- *    documentation and/or other materials provided with the distribution.
- *
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS
- * OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
- * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY
- * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- *
- */
-#ifndef _MIPS64_ASM_H
-#define _MIPS64_ASM_H
-
-#ifndef _ALIGN_TEXT
-# define _ALIGN_TEXT .align 4
-#endif
-
-#undef __bionic_asm_custom_entry
-#undef __bionic_asm_custom_end
-#define __bionic_asm_custom_entry(f) .ent f
-#define __bionic_asm_custom_end(f) .end f
-
-#include <machine/regdef.h>
-
-#define	_MIPS_ISA_MIPS1	1	/* R2000/R3000 */
-#define	_MIPS_ISA_MIPS2	2	/* R4000/R6000 */
-#define	_MIPS_ISA_MIPS3	3	/* R4000 */
-#define	_MIPS_ISA_MIPS4	4	/* TFP (R1x000) */
-#define	_MIPS_ISA_MIPS5 5
-#define	_MIPS_ISA_MIPS32 6
-#define	_MIPS_ISA_MIPS64 7
-
-#if !defined(ABICALLS) && !defined(_NO_ABICALLS)
-#define	ABICALLS	.abicalls
-#endif
-
-#if defined(ABICALLS) && !defined(_KERNEL)
-	ABICALLS
-#endif
-
-#if !defined(__MIPSEL__) && !defined(__MIPSEB__)
-#error "__MIPSEL__ or __MIPSEB__ must be defined"
-#endif
-/*
- * Define how to access unaligned data word
- */
-#if defined(__MIPSEL__)
-#define LWLO    lwl
-#define LWHI    lwr
-#define	SWLO	swl
-#define	SWHI	swr
-#define LDLO    ldl
-#define LDHI    ldr
-#define	SDLO	sdl
-#define	SDHI	sdr
-#endif
-#if defined(__MIPSEB__)
-#define LWLO    lwr
-#define LWHI    lwl
-#define	SWLO	swr
-#define	SWHI	swl
-#define LDLO    ldr
-#define LDHI    ldl
-#define	SDLO	sdr
-#define	SDHI	sdl
-#endif
-
-/*
- *  Define programming environment for ABI.
- */
-#if defined(ABICALLS) && !defined(_KERNEL) && !defined(_STANDALONE)
-
-#if (_MIPS_SIM == _ABIO32) || (_MIPS_SIM == _ABI32)
-#define NARGSAVE	4
-
-#define	SETUP_GP		\
-	.set	noreorder;	\
-	.cpload	t9;		\
-	.set	reorder;
-
-#define	SAVE_GP(x)		\
-	.cprestore x
-
-#define	SETUP_GP64(gpoff, name)
-#define	RESTORE_GP64
-#endif
-
-#if (_MIPS_SIM == _ABI64) || (_MIPS_SIM == _ABIN32)
-#define NARGSAVE	0
-
-#define	SETUP_GP
-#define	SAVE_GP(x)
-#define	SETUP_GP64(gpoff, name)	\
-	.cpsetup t9, gpoff, name
-#define	RESTORE_GP64		\
-	.cpreturn
-#endif
-
-#define	MKFSIZ(narg,locals) (((narg+locals)*REGSZ+31)&(~31))
-
-#else /* defined(ABICALLS) && !defined(_KERNEL) */
-
-#define	NARGSAVE	4
-#define	SETUP_GP
-#define	SAVE_GP(x)
-
-#define	ALIGNSZ		16	/* Stack layout alignment */
-#define	FRAMESZ(sz)	(((sz) + (ALIGNSZ-1)) & ~(ALIGNSZ-1))
-
-#endif
-
-/*
- *  Basic register operations based on selected ISA
- */
-#if (_MIPS_ISA == _MIPS_ISA_MIPS1 || _MIPS_ISA == _MIPS_ISA_MIPS2 || _MIPS_ISA == _MIPS_ISA_MIPS32)
-#define REGSZ		4	/* 32 bit mode register size */
-#define LOGREGSZ	2	/* log rsize */
-#define	REG_S	sw
-#define	REG_L	lw
-#define	CF_SZ		24	/* Call frame size */
-#define	CF_ARGSZ	16	/* Call frame arg size */
-#define	CF_RA_OFFS	20	/* Call ra save offset */
-#endif
-
-#if (_MIPS_ISA == _MIPS_ISA_MIPS3 || _MIPS_ISA == _MIPS_ISA_MIPS4 || _MIPS_ISA == _MIPS_ISA_MIPS64)
-#define REGSZ		8	/* 64 bit mode register size */
-#define LOGREGSZ	3	/* log rsize */
-#define	REG_S	sd
-#define	REG_L	ld
-#define	CF_SZ		48	/* Call frame size (multiple of ALIGNSZ) */
-#define	CF_ARGSZ	32	/* Call frame arg size */
-#define	CF_RA_OFFS	40	/* Call ra save offset */
-#endif
-
-#define REGSZ_FP	 8	/* 64 bit FP register size */
-
-#ifndef __LP64__
-#define	PTR_L		lw
-#define	PTR_S		sw
-#define	PTR_SUB		sub
-#define	PTR_ADD		add
-#define	PTR_SUBU	subu
-#define	PTR_ADDU	addu
-#define LI		li
-#define	LA		la
-#define	PTR_SLL		sll
-#define	PTR_SRL		srl
-#define	PTR_VAL		.word
-#else
-#define	PTR_L		ld
-#define	PTR_S		sd
-#define	PTR_ADD		dadd
-#define	PTR_SUB		dsub
-#define	PTR_SUBU	dsubu
-#define	PTR_ADDU	daddu
-#define LI		dli
-#define LA		dla
-#define	PTR_SLL		dsll
-#define	PTR_SRL		dsrl
-#define	PTR_VAL		.dword
-#endif
-
-/*
- * LEAF(x, fsize)
- *
- *	Declare a leaf routine.
- */
-#define LEAF(x, fsize)		\
-	.align	3;		\
-	.globl x;		\
-	.ent x, 0;		\
-x: ;				\
-	.cfi_startproc; \
-	.frame sp, fsize, ra;	\
-	SETUP_GP		\
-
-/*
- * NON_LEAF(x)
- *
- *	Declare a non-leaf routine (a routine that makes other C calls).
- */
-#define NON_LEAF(x, fsize, retpc) \
-	.align	3;		\
-	.globl x;		\
-	.ent x, 0;		\
-x: ;				\
-	.cfi_startproc; \
-	.frame sp, fsize, retpc; \
-	SETUP_GP		\
-
-#endif /* !_MIPS_ASM_H */

libc/arch-mips64/include/machine/elf_machdep.h

@@ -1,196 +0,0 @@
-/*	$NetBSD: elf_machdep.h,v 1.15 2011/03/15 07:39:22 matt Exp $	*/
-
-#ifndef _MIPS_ELF_MACHDEP_H_
-#define  _MIPS_ELF_MACHDEP_H_
-
-#ifdef _LP64
-#define ARCH_ELFSIZE		64	/* MD native binary size */
-#else
-#define ARCH_ELFSIZE		32	/* MD native binary size */
-#endif
-
-#if ELFSIZE == 32
-#define	ELF32_MACHDEP_ID_CASES						\
-		case EM_MIPS:						\
-			break;
-
-#define	ELF32_MACHDEP_ID	EM_MIPS
-#elif ELFSIZE == 64
-#define	ELF64_MACHDEP_ID_CASES						\
-		case EM_MIPS:						\
-			break;
-
-#define	ELF64_MACHDEP_ID	EM_MIPS
-#endif
-
-/* mips relocs.  */
-
-#define R_MIPS_NONE		0
-#define R_MIPS_16		1
-#define R_MIPS_32		2
-#define R_MIPS_REL32		3
-#define R_MIPS_REL		R_MIPS_REL32
-#define R_MIPS_26		4
-#define R_MIPS_HI16		5	/* high 16 bits of symbol value */
-#define R_MIPS_LO16		6	/* low 16 bits of symbol value */
-#define R_MIPS_GPREL16		7  	/* GP-relative reference  */
-#define R_MIPS_LITERAL		8 	/* Reference to literal section  */
-#define R_MIPS_GOT16		9	/* Reference to global offset table */
-#define R_MIPS_GOT		R_MIPS_GOT16
-#define R_MIPS_PC16		10  	/* 16 bit PC relative reference */
-#define R_MIPS_CALL16 		11  	/* 16 bit call thru glbl offset tbl */
-#define R_MIPS_CALL		R_MIPS_CALL16
-#define R_MIPS_GPREL32		12
-
-/* 13, 14, 15 are not defined at this point. */
-#define R_MIPS_UNUSED1		13
-#define R_MIPS_UNUSED2		14
-#define R_MIPS_UNUSED3		15
-
-/*
- * The remaining relocs are apparently part of the 64-bit Irix ELF ABI.
- */
-#define R_MIPS_SHIFT5		16
-#define R_MIPS_SHIFT6		17
-
-#define R_MIPS_64		18
-#define R_MIPS_GOT_DISP		19
-#define R_MIPS_GOT_PAGE		20
-#define R_MIPS_GOT_OFST		21
-#define R_MIPS_GOT_HI16		22
-#define R_MIPS_GOT_LO16		23
-#define R_MIPS_SUB 		24
-#define R_MIPS_INSERT_A		25
-#define R_MIPS_INSERT_B		26
-#define R_MIPS_DELETE		27
-#define R_MIPS_HIGHER		28
-#define R_MIPS_HIGHEST		29
-#define R_MIPS_CALL_HI16	30
-#define R_MIPS_CALL_LO16	31
-#define R_MIPS_SCN_DISP		32
-#define R_MIPS_REL16		33
-#define R_MIPS_ADD_IMMEDIATE	34
-#define R_MIPS_PJUMP		35
-#define R_MIPS_RELGOT		36
-#define	R_MIPS_JALR		37
-/* TLS relocations */
-
-#define R_MIPS_TLS_DTPMOD32	38	/* Module number 32 bit */
-#define R_MIPS_TLS_DTPREL32	39	/* Module-relative offset 32 bit */
-#define R_MIPS_TLS_DTPMOD64	40	/* Module number 64 bit */
-#define R_MIPS_TLS_DTPREL64	41	/* Module-relative offset 64 bit */
-#define R_MIPS_TLS_GD		42	/* 16 bit GOT offset for GD */
-#define R_MIPS_TLS_LDM		43	/* 16 bit GOT offset for LDM */
-#define R_MIPS_TLS_DTPREL_HI16	44	/* Module-relative offset, high 16 bits */
-#define R_MIPS_TLS_DTPREL_LO16	45	/* Module-relative offset, low 16 bits */
-#define R_MIPS_TLS_GOTTPREL	46	/* 16 bit GOT offset for IE */
-#define R_MIPS_TLS_TPREL32	47	/* TP-relative offset, 32 bit */
-#define R_MIPS_TLS_TPREL64	48	/* TP-relative offset, 64 bit */
-#define R_MIPS_TLS_TPREL_HI16	49	/* TP-relative offset, high 16 bits */
-#define R_MIPS_TLS_TPREL_LO16	50	/* TP-relative offset, low 16 bits */
-
-#define R_MIPS_max		51
-
-#define R_TYPE(name)		__CONCAT(R_MIPS_,name)
-
-#define	R_MIPS16_min		100
-#define	R_MIPS16_26		100
-#define	R_MIPS16_GPREL		101
-#define	R_MIPS16_GOT16		102
-#define	R_MIPS16_CALL16		103
-#define	R_MIPS16_HI16		104
-#define	R_MIPS16_LO16		105
-#define	R_MIPS16_max		106
-
-
-/* mips dynamic tags */
-
-#define DT_MIPS_RLD_VERSION	0x70000001
-#define DT_MIPS_TIME_STAMP	0x70000002
-#define DT_MIPS_ICHECKSUM	0x70000003
-#define DT_MIPS_IVERSION	0x70000004
-#define DT_MIPS_FLAGS		0x70000005
-#define DT_MIPS_BASE_ADDRESS	0x70000006
-#define DT_MIPS_CONFLICT	0x70000008
-#define DT_MIPS_LIBLIST		0x70000009
-#define DT_MIPS_CONFLICTNO	0x7000000b
-#define	DT_MIPS_LOCAL_GOTNO	0x7000000a	/* number of local got ents */
-#define DT_MIPS_LIBLISTNO	0x70000010
-#define	DT_MIPS_SYMTABNO	0x70000011	/* number of .dynsym entries */
-#define DT_MIPS_UNREFEXTNO	0x70000012
-#define	DT_MIPS_GOTSYM		0x70000013	/* first dynamic sym in got */
-#define DT_MIPS_HIPAGENO	0x70000014
-#define	DT_MIPS_RLD_MAP		0x70000016	/* address of loader map */
-
-/*
- * ELF Flags
- */
-#define	EF_MIPS_PIC		0x00000002	/* Contains PIC code */
-#define	EF_MIPS_CPIC		0x00000004	/* STD PIC calling sequence */
-#define	EF_MIPS_ABI2		0x00000020	/* N32 */
-
-#define	EF_MIPS_ARCH_ASE	0x0f000000	/* Architectural extensions */
-#define	EF_MIPS_ARCH_MDMX	0x08000000	/* MDMX multimedia extension */
-#define	EF_MIPS_ARCH_M16	0x04000000	/* MIPS-16 ISA extensions */
-
-#define	EF_MIPS_ARCH		0xf0000000	/* Architecture field */
-#define	EF_MIPS_ARCH_1		0x00000000	/* -mips1 code */
-#define	EF_MIPS_ARCH_2		0x10000000	/* -mips2 code */
-#define	EF_MIPS_ARCH_3		0x20000000	/* -mips3 code */
-#define	EF_MIPS_ARCH_4		0x30000000	/* -mips4 code */
-#define	EF_MIPS_ARCH_5		0x40000000	/* -mips5 code */
-#define	EF_MIPS_ARCH_32		0x50000000	/* -mips32 code */
-#define	EF_MIPS_ARCH_64		0x60000000	/* -mips64 code */
-#define	EF_MIPS_ARCH_32R2	0x70000000	/* -mips32r2 code */
-#define	EF_MIPS_ARCH_64R2	0x80000000	/* -mips64r2 code */
-
-#define	EF_MIPS_ABI		0x0000f000
-#define	EF_MIPS_ABI_O32		0x00001000
-#define	EF_MIPS_ABI_O64		0x00002000
-#define	EF_MIPS_ABI_EABI32	0x00003000
-#define	EF_MIPS_ABI_EABI64	0x00004000
-
-#if defined(__MIPSEB__)
-#define	ELF32_MACHDEP_ENDIANNESS	ELFDATA2MSB
-#define	ELF64_MACHDEP_ENDIANNESS	ELFDATA2MSB
-#elif defined(__MIPSEL__)
-#define	ELF32_MACHDEP_ENDIANNESS	ELFDATA2LSB
-#define	ELF64_MACHDEP_ENDIANNESS	ELFDATA2LSB
-#elif !defined(HAVE_NBTOOL_CONFIG_H)
-#error neither __MIPSEL__ nor __MIPSEB__ are defined.
-#endif
-
-#ifdef _KERNEL
-#ifdef _KERNEL_OPT
-#include "opt_compat_netbsd.h"
-#endif
-#ifdef COMPAT_16
-/*
- * Up to 1.6, the ELF dynamic loader (ld.elf_so) was not relocatable.
- * Tell the kernel ELF exec code not to try relocating the interpreter
- * for dynamically-linked ELF binaries.
- */
-#define ELF_INTERP_NON_RELOCATABLE
-#endif /* COMPAT_16 */
-
-/*
- * We need to be able to include the ELF header so we can pick out the
- * ABI being used.
- */
-#ifdef ELFSIZE
-#define	ELF_MD_PROBE_FUNC	ELFNAME2(mips_netbsd,probe)
-#define	ELF_MD_COREDUMP_SETUP	ELFNAME2(coredump,setup)
-#endif
-
-struct exec_package;
-
-int mips_netbsd_elf32_probe(struct lwp *, struct exec_package *, void *, char *,
-	vaddr_t *);
-void coredump_elf32_setup(struct lwp *, void *);
-
-int mips_netbsd_elf64_probe(struct lwp *, struct exec_package *, void *, char *,
-	vaddr_t *);
-void coredump_elf64_setup(struct lwp *, void *);
-#endif /* _KERNEL */
-
-#endif /* _MIPS_ELF_MACHDEP_H_ */

libc/arch-mips64/include/machine/endian.h

@@ -1,70 +0,0 @@
-/*	$OpenBSD: endian.h,v 1.5 2006/02/27 23:35:59 miod Exp $ */
-
-/*
- * Copyright (c) 2001-2002 Opsycon AB  (www.opsycon.se / www.opsycon.com)
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- *    notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- *    notice, this list of conditions and the following disclaimer in the
- *    documentation and/or other materials provided with the distribution.
- *
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS
- * OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
- * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY
- * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- *
- */
-
-#ifndef _MIPS64_ENDIAN_H_
-#define _MIPS64_ENDIAN_H_
-
-#ifdef __GNUC__
-
-#if defined(__mips_isa_rev) && (__mips_isa_rev >= 2)
-#define __swap16md(x) ({					\
-    register uint16_t _x = (x);					\
-    register uint16_t _r;					\
-    __asm volatile ("wsbh %0, %1" : "=r" (_r) : "r" (_x));	\
-    _r;								\
-})
-
-#define __swap32md(x) ({					\
-    register uint32_t _x = (x);					\
-    register uint32_t _r;					\
-    __asm volatile ("wsbh %0, %1; rotr %0, %0, 16" : "=r" (_r) : "r" (_x)); \
-    _r;								\
-})
-
-#define __swap64md(x) ({					\
-    uint64_t _swap64md_x = (x);					\
-    (uint64_t) __swap32md(_swap64md_x >> 32) |			\
-        (uint64_t) __swap32md(_swap64md_x & 0xffffffff) << 32;	\
-})
-
-/* Tell sys/endian.h we have MD variants of the swap macros.  */
-#define MD_SWAP
-
-#endif  /* __mips32r2__ */
-#endif  /* __GNUC__ */
-
-#if defined(__MIPSEB__)
-#define _BYTE_ORDER _BIG_ENDIAN
-#else
-#define _BYTE_ORDER _LITTLE_ENDIAN
-#endif
-#define __STRICT_ALIGNMENT
-#include <sys/types.h>
-#include <sys/endian.h>
-
-#endif /* _MIPS64_ENDIAN_H_ */

libc/arch-mips64/include/machine/exec.h

@@ -1,188 +0,0 @@
-/*	$OpenBSD: exec.h,v 1.1 2004/10/18 19:05:36 grange Exp $	*/
-
-/*
- * Copyright (c) 1996-2004 Per Fogelstrom, Opsycon AB
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- *    notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- *    notice, this list of conditions and the following disclaimer in the
- *    documentation and/or other materials provided with the distribution.
- *
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS
- * OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
- * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY
- * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- *
- */
-
-#ifndef _MIPS64_EXEC_H_
-#define _MIPS64_EXEC_H_
-
-#define	__LDPGSZ	4096
-
-/*
- *  Define what exec "formats" we should handle.
- */
-#define NATIVE_EXEC_ELF
-#define NATIVE_ELFSIZE 64
-#define	EXEC_SCRIPT
-
-/*
- *  If included from sys/exec.h define kernels ELF format.
- */
-#ifdef __LP64__
-#define	ARCH_ELFSIZE 64
-#define DB_ELFSIZE 64
-#define ELF_TARG_CLASS  ELFCLASS64
-#else
-#define	ARCH_ELFSIZE 32
-#define DB_ELFSIZE 32
-#define ELF_TARG_CLASS  ELFCLASS32
-#endif
-
-#if defined(__MIPSEB__)
-#define ELF_TARG_DATA		ELFDATA2MSB
-#else
-#define ELF_TARG_DATA		ELFDATA2LSB
-#endif
-#define ELF_TARG_MACH		EM_MIPS
-
-#define _NLIST_DO_ELF
-
-#if defined(_LP64)
-#define _KERN_DO_ELF64
-#if defined(COMPAT_O32)
-#define _KERN_DO_ELF
-#endif
-#else
-#define _KERN_DO_ELF
-#endif
-
-/* Information taken from MIPS ABI supplemental */
-
-/* Architecture dependent Segment types - p_type */
-#define PT_MIPS_REGINFO 0x70000000      /* Register usage information */
-
-/* Architecture dependent d_tag field for Elf32_Dyn.  */
-#define DT_MIPS_RLD_VERSION  0x70000001 /* Runtime Linker Interface ID */
-#define DT_MIPS_TIME_STAMP   0x70000002 /* Timestamp */
-#define DT_MIPS_ICHECKSUM    0x70000003 /* Cksum of ext. str. and com. sizes */
-#define DT_MIPS_IVERSION     0x70000004 /* Version string (string tbl index) */
-#define DT_MIPS_FLAGS        0x70000005 /* Flags */
-#define DT_MIPS_BASE_ADDRESS 0x70000006 /* Segment base address */
-#define DT_MIPS_CONFLICT     0x70000008 /* Adr of .conflict section */
-#define DT_MIPS_LIBLIST      0x70000009 /* Address of .liblist section */
-#define DT_MIPS_LOCAL_GOTNO  0x7000000a /* Number of local .GOT entries */
-#define DT_MIPS_CONFLICTNO   0x7000000b /* Number of .conflict entries */
-#define DT_MIPS_LIBLISTNO    0x70000010 /* Number of .liblist entries */
-#define DT_MIPS_SYMTABNO     0x70000011 /* Number of .dynsym entries */
-#define DT_MIPS_UNREFEXTNO   0x70000012 /* First external DYNSYM */
-#define DT_MIPS_GOTSYM       0x70000013 /* First GOT entry in .dynsym */
-#define DT_MIPS_HIPAGENO     0x70000014 /* Number of GOT page table entries */
-#define DT_MIPS_RLD_MAP      0x70000016 /* Address of debug map pointer */
-
-#define DT_PROCNUM (DT_MIPS_RLD_MAP - DT_LOPROC + 1)
-
-/*
- * Legal values for e_flags field of Elf32_Ehdr.
- */
-#define EF_MIPS_NOREORDER	0x00000001	/* .noreorder was used */
-#define EF_MIPS_PIC		0x00000002	/* Contains PIC code */
-#define EF_MIPS_CPIC		0x00000004	/* Uses PIC calling sequence */
-#define	EF_MIPS_ABI2		0x00000020	/* -n32 on Irix 6 */
-#define	EF_MIPS_32BITMODE	0x00000100	/* 64 bit in 32 bit mode... */
-#define EF_MIPS_ARCH		0xf0000000	/* MIPS architecture level */
-#define	E_MIPS_ARCH_1		0x00000000
-#define	E_MIPS_ARCH_2		0x10000000
-#define	E_MIPS_ARCH_3		0x20000000
-#define	E_MIPS_ARCH_4		0x30000000
-#define	EF_MIPS_ABI		0x0000f000	/* ABI level */
-#define	E_MIPS_ABI_NONE		0x00000000	/* ABI level not set */
-#define	E_MIPS_ABI_O32		0x00001000
-#define	E_MIPS_ABI_O64		0x00002000
-#define	E_MIPS_ABI_EABI32	0x00004000
-#define	E_MIPS_ABI_EABI64	0x00004000
-
-/*
- * Mips special sections.
- */
-#define	SHN_MIPS_ACOMMON	0xff00		/* Allocated common symbols */
-#define	SHN_MIPS_SCOMMON	0xff03		/* Small common symbols */
-#define	SHN_MIPS_SUNDEFINED	0xff04		/* Small undefined symbols */
-
-/*
- * Legal values for sh_type field of Elf32_Shdr.
- */
-#define	SHT_MIPS_LIBLIST  0x70000000	/* Shared objects used in link */
-#define	SHT_MIPS_CONFLICT 0x70000002	/* Conflicting symbols */
-#define	SHT_MIPS_GPTAB    0x70000003	/* Global data area sizes */
-#define	SHT_MIPS_UCODE    0x70000004	/* Reserved for SGI/MIPS compilers */
-#define	SHT_MIPS_DEBUG    0x70000005	/* MIPS ECOFF debugging information */
-#define	SHT_MIPS_REGINFO  0x70000006	/* Register usage information */
-
-/*
- * Legal values for sh_flags field of Elf32_Shdr.
- */
-#define	SHF_MIPS_GPREL	0x10000000	/* Must be part of global data area */
-
-#if 0
-/*
- * Entries found in sections of type SHT_MIPS_GPTAB.
- */
-typedef union {
-	struct {
-		Elf32_Word gt_current_g_value;	/* -G val used in compilation */
-		Elf32_Word gt_unused;	/* Not used */
-	} gt_header;			/* First entry in section */
-	struct {
-		Elf32_Word gt_g_value;	/* If this val were used for -G */
-		Elf32_Word gt_bytes;	/* This many bytes would be used */
-	} gt_entry;			/* Subsequent entries in section */
-} Elf32_gptab;
-
-/*
- * Entry found in sections of type SHT_MIPS_REGINFO.
- */
-typedef struct {
-	Elf32_Word	ri_gprmask;	/* General registers used */
-	Elf32_Word	ri_cprmask[4];	/* Coprocessor registers used */
-	Elf32_Sword	ri_gp_value;	/* $gp register value */
-} Elf32_RegInfo;
-#endif
-
-
-/*
- * Mips relocations.
- */
-
-#define	R_MIPS_NONE	0	/* No reloc */
-#define	R_MIPS_16	1	/* Direct 16 bit */
-#define	R_MIPS_32	2	/* Direct 32 bit */
-#define	R_MIPS_REL32	3	/* PC relative 32 bit */
-#define	R_MIPS_26	4	/* Direct 26 bit shifted */
-#define	R_MIPS_HI16	5	/* High 16 bit */
-#define	R_MIPS_LO16	6	/* Low 16 bit */
-#define	R_MIPS_GPREL16	7	/* GP relative 16 bit */
-#define	R_MIPS_LITERAL	8	/* 16 bit literal entry */
-#define	R_MIPS_GOT16	9	/* 16 bit GOT entry */
-#define	R_MIPS_PC16	10	/* PC relative 16 bit */
-#define	R_MIPS_CALL16	11	/* 16 bit GOT entry for function */
-#define	R_MIPS_GPREL32	12	/* GP relative 32 bit */
-
-#define	R_MIPS_64	18
-
-#define	R_MIPS_REL32_64	((R_MIPS_64 << 8) | R_MIPS_REL32)
-
-
-#endif	/* !_MIPS64_EXEC_H_ */

libc/arch-mips64/include/machine/regdef.h

@@ -1,99 +0,0 @@
-/*	$OpenBSD: regdef.h,v 1.3 2005/08/07 07:29:44 miod Exp $	*/
-
-/*
- * Copyright (c) 1992, 1993
- *	The Regents of the University of California.  All rights reserved.
- *
- * This code is derived from software contributed to Berkeley by
- * Ralph Campbell. This file is derived from the MIPS RISC
- * Architecture book by Gerry Kane.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- *    notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- *    notice, this list of conditions and the following disclaimer in the
- *    documentation and/or other materials provided with the distribution.
- * 3. Neither the name of the University nor the names of its contributors
- *    may be used to endorse or promote products derived from this software
- *    without specific prior written permission.
- *
- * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED.  IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- *
- *	@(#)regdef.h	8.1 (Berkeley) 6/10/93
- */
-#ifndef _MIPS_REGDEF_H_
-#define _MIPS_REGDEF_H_
-
-#if (_MIPS_SIM == _ABI64) && !defined(__mips_n64)
-#define __mips_n64 1
-#endif
-#if (_MIPS_SIM == _ABIN32) &&  !defined(__mips_n32)
-#define __mips_n32 1
-#endif
-
-#define zero	$0	/* always zero */
-#define AT	$at	/* assembler temp */
-#define v0	$2	/* return value */
-#define v1	$3
-#define a0	$4	/* argument registers */
-#define a1	$5
-#define a2	$6
-#define a3	$7
-#if defined(__mips_n32) || defined(__mips_n64)
-#define a4	$8	/* expanded register arguments */
-#define a5	$9
-#define a6	$10
-#define a7	$11
-#define ta0	$8	/* alias */
-#define ta1	$9
-#define ta2	$10
-#define ta3	$11
-#define t0	$12	/* temp registers (not saved across subroutine calls) */
-#define t1	$13
-#define t2	$14
-#define t3	$15
-#else
-#define t0	$8	/* temp registers (not saved across subroutine calls) */
-#define t1	$9
-#define t2	$10
-#define t3	$11
-#define t4	$12
-#define t5	$13
-#define t6	$14
-#define t7	$15
-#define ta0	$12	/* alias */
-#define ta1	$13
-#define ta2	$14
-#define ta3	$15
-#endif
-#define s0	$16	/* saved across subroutine calls (callee saved) */
-#define s1	$17
-#define s2	$18
-#define s3	$19
-#define s4	$20
-#define s5	$21
-#define s6	$22
-#define s7	$23
-#define t8	$24	/* two more temp registers */
-#define t9	$25
-#define k0	$26	/* kernel temporary */
-#define k1	$27
-#define gp	$28	/* global pointer */
-#define sp	$29	/* stack pointer */
-#define s8	$30	/* one more callee saved */
-#define ra	$31	/* return address */
-
-#endif /* !_MIPS_REGDEF_H_ */

libc/arch-mips64/include/machine/regnum.h

@@ -1,119 +0,0 @@
-/*	$OpenBSD: regnum.h,v 1.3 2004/08/10 20:28:13 deraadt Exp $ */
-
-/*
- * Copyright (c) 2001-2002 Opsycon AB  (www.opsycon.se / www.opsycon.com)
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- *    notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- *    notice, this list of conditions and the following disclaimer in the
- *    documentation and/or other materials provided with the distribution.
- *
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS
- * OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
- * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY
- * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- *
- */
-
-#ifndef _MIPS64_REGNUM_H_
-#define _MIPS64_REGNUM_H_
-
-/*
- * Location of the saved registers relative to ZERO.
- * Usage is p->p_regs[XX].
- */
-#define ZERO	0
-#define AST	1
-#define V0	2
-#define V1	3
-#define A0	4
-#define A1	5
-#define A2	6
-#define A3	7
-#define T0	8
-#define T1	9
-#define T2	10
-#define T3	11
-#define T4	12
-#define T5	13
-#define T6	14
-#define T7	15
-#define S0	16
-#define S1	17
-#define S2	18
-#define S3	19
-#define S4	20
-#define S5	21
-#define S6	22
-#define S7	23
-#define T8	24
-#define T9	25
-#define K0	26
-#define K1	27
-#define GP	28
-#define SP	29
-#define S8	30
-#define RA	31
-#define	SR	32
-#define	PS	SR	/* alias for SR */
-#define MULLO	33
-#define MULHI	34
-#define BADVADDR 35
-#define CAUSE	36
-#define	PC	37
-#define	IC	38
-#define	CPL	39
-
-#define	NUMSAVEREGS 40		/* Number of registers saved in trap */
-
-#define FPBASE	NUMSAVEREGS
-#define F0	(FPBASE+0)
-#define F1	(FPBASE+1)
-#define F2	(FPBASE+2)
-#define F3	(FPBASE+3)
-#define F4	(FPBASE+4)
-#define F5	(FPBASE+5)
-#define F6	(FPBASE+6)
-#define F7	(FPBASE+7)
-#define F8	(FPBASE+8)
-#define F9	(FPBASE+9)
-#define F10	(FPBASE+10)
-#define F11	(FPBASE+11)
-#define F12	(FPBASE+12)
-#define F13	(FPBASE+13)
-#define F14	(FPBASE+14)
-#define F15	(FPBASE+15)
-#define F16	(FPBASE+16)
-#define F17	(FPBASE+17)
-#define F18	(FPBASE+18)
-#define F19	(FPBASE+19)
-#define F20	(FPBASE+20)
-#define F21	(FPBASE+21)
-#define F22	(FPBASE+22)
-#define F23	(FPBASE+23)
-#define F24	(FPBASE+24)
-#define F25	(FPBASE+25)
-#define F26	(FPBASE+26)
-#define F27	(FPBASE+27)
-#define F28	(FPBASE+28)
-#define F29	(FPBASE+29)
-#define F30	(FPBASE+30)
-#define F31	(FPBASE+31)
-#define	FSR	(FPBASE+32)
-
-#define	NUMFPREGS 33
-
-#define	NREGS	(NUMSAVEREGS + NUMFPREGS)
-
-#endif /* !_MIPS64_REGNUM_H_ */

libc/arch-mips64/include/machine/setjmp.h

@@ -1,10 +0,0 @@
-/*	$OpenBSD: setjmp.h,v 1.2 2004/08/10 21:10:56 pefo Exp $	*/
-
-/* Public domain */
-
-#ifndef _MIPS_SETJMP_H_
-#define _MIPS_SETJMP_H_
-
-#define	_JBLEN	157		/* size, in longs, of a jmp_buf */
-
-#endif /* !_MIPS_SETJMP_H_ */

libc/arch-mips64/mips64.mk

@@ -49,10 +49,7 @@ libc_openbsd_src_files_mips64 += \
 libc_bionic_src_files_mips64 += \
     arch-mips64/bionic/__bionic_clone.S \
     arch-mips64/bionic/_exit_with_stack_teardown.S \
-    arch-mips64/bionic/__get_sp.S \
-    arch-mips64/bionic/_setjmp.S \
     arch-mips64/bionic/setjmp.S \
-    arch-mips64/bionic/sigsetjmp.S \
     arch-mips64/bionic/syscall.S \
     arch-mips64/bionic/vfork.S \
 

libc/arch-mips64/syscalls/__clock_nanosleep.S

@@ -2,7 +2,7 @@
 
 #include <private/bionic_asm.h>
 
-ENTRY(clock_nanosleep)
+ENTRY(__clock_nanosleep)
     .set push
     .set noreorder
     li v0, __NR_clock_nanosleep
@@ -22,4 +22,5 @@ ENTRY(clock_nanosleep)
     j t9
     move ra, t0
     .set pop
-END(clock_nanosleep)
+END(__clock_nanosleep)
+.hidden __clock_nanosleep

libc/arch-mips64/syscalls/__rt_sigqueueinfo.S

@@ -0,0 +1,26 @@
+/* Generated by gensyscalls.py. Do not edit. */
+
+#include <private/bionic_asm.h>
+
+ENTRY(__rt_sigqueueinfo)
+    .set push
+    .set noreorder
+    li v0, __NR_rt_sigqueueinfo
+    syscall
+    bnez a3, 1f
+    move a0, v0
+    j ra
+    nop
+1:
+    move t0, ra
+    bal     2f
+    nop
+2:
+    .cpsetup ra, t1, 2b
+    LA t9,__set_errno_internal
+    .cpreturn
+    j t9
+    move ra, t0
+    .set pop
+END(__rt_sigqueueinfo)
+.hidden __rt_sigqueueinfo

libc/arch-mips64/syscalls/sethostname.S

@@ -2,10 +2,10 @@
 
 #include <private/bionic_asm.h>
 
-ENTRY(_flush_cache)
+ENTRY(sethostname)
     .set push
     .set noreorder
-    li v0, __NR_cacheflush
+    li v0, __NR_sethostname
     syscall
     bnez a3, 1f
     move a0, v0
@@ -22,4 +22,4 @@ ENTRY(_flush_cache)
     j t9
     move ra, t0
     .set pop
-END(_flush_cache)
+END(sethostname)

libc/arch-x86/atom/string/sse2-wcslen-atom.S

@@ -65,21 +65,21 @@ name:	\
 ENTRY (wcslen)
 	mov	STR(%esp), %edx
 #endif
-	cmp	$0, (%edx)
+	cmpl	$0, (%edx)
 	jz	L(exit_tail0)
-	cmp	$0, 4(%edx)
+	cmpl	$0, 4(%edx)
 	jz	L(exit_tail1)
-	cmp	$0, 8(%edx)
+	cmpl	$0, 8(%edx)
 	jz	L(exit_tail2)
-	cmp	$0, 12(%edx)
+	cmpl	$0, 12(%edx)
 	jz	L(exit_tail3)
-	cmp	$0, 16(%edx)
+	cmpl	$0, 16(%edx)
 	jz	L(exit_tail4)
-	cmp	$0, 20(%edx)
+	cmpl	$0, 20(%edx)
 	jz	L(exit_tail5)
-	cmp	$0, 24(%edx)
+	cmpl	$0, 24(%edx)
 	jz	L(exit_tail6)
-	cmp	$0, 28(%edx)
+	cmpl	$0, 28(%edx)
 	jz	L(exit_tail7)
 
 	pxor	%xmm0, %xmm0

libc/arch-x86/atom/string/ssse3-wcscat-atom.S

@@ -98,13 +98,13 @@ L(WcscpyAtom):
 	mov	STR2(%esp), %ecx
 	lea	(%edi, %eax), %edx
 
-	cmp	$0, (%ecx)
+	cmpl	$0, (%ecx)
 	jz	L(Exit4)
-	cmp	$0, 4(%ecx)
+	cmpl	$0, 4(%ecx)
 	jz	L(Exit8)
-	cmp	$0, 8(%ecx)
+	cmpl	$0, 8(%ecx)
 	jz	L(Exit12)
-	cmp	$0, 12(%ecx)
+	cmpl	$0, 12(%ecx)
 	jz	L(Exit16)
 
 #undef RETURN

libc/arch-x86/atom/string/ssse3-wcscpy-atom.S

@@ -92,13 +92,13 @@ ENTRY (wcscpy)
 	mov	STR1(%esp), %edx
 	mov	STR2(%esp), %ecx
 
-	cmp	$0, (%ecx)
+	cmpl	$0, (%ecx)
 	jz	L(ExitTail4)
-	cmp	$0, 4(%ecx)
+	cmpl	$0, 4(%ecx)
 	jz	L(ExitTail8)
-	cmp	$0, 8(%ecx)
+	cmpl	$0, 8(%ecx)
 	jz	L(ExitTail12)
-	cmp	$0, 12(%ecx)
+	cmpl	$0, 12(%ecx)
 	jz	L(ExitTail16)
 
 	PUSH	(%edi)

libc/arch-x86/bionic/setjmp.S

@@ -1,4 +1,3 @@
-/* $OpenBSD: setjmp.S,v 1.8 2005/08/07 11:30:38 espie Exp $ */
 /*-
  * Copyright (c) 1990 The Regents of the University of California.
  * All rights reserved.
@@ -33,55 +32,98 @@
 
 #include <private/bionic_asm.h>
 
-/*
- * C library -- setjmp, longjmp
- *
- *	longjmp(a,v)
- * will generate a "return(v)" from the last call to
- *	setjmp(a)
- * by restoring registers from the stack.
- * The previous signal state is restored.
- */
+#define _JB_EDX 0
+#define _JB_EBX 1
+#define _JB_ESP 2
+#define _JB_EBP 3
+#define _JB_ESI 4
+#define _JB_EDI 5
+#define _JB_SIGMASK 6
+#define _JB_SIGFLAG 7
 
 ENTRY(setjmp)
-	PIC_PROLOGUE
-	pushl	$0
-	call	PIC_PLT(sigblock)
-	addl	$4,%esp
-	PIC_EPILOGUE
-
-	movl	4(%esp),%ecx
-	movl	0(%esp),%edx
-	movl	%edx, 0(%ecx)
-	movl	%ebx, 4(%ecx)
-	movl	%esp, 8(%ecx)
-	movl	%ebp,12(%ecx)
-	movl	%esi,16(%ecx)
-	movl	%edi,20(%ecx)
-	movl	%eax,24(%ecx)
-	xorl	%eax,%eax
-	ret
+  movl 4(%esp),%ecx
+  movl $1,(_JB_SIGFLAG * 4)(%ecx)
+  jmp .L_sigsetjmp_signal_mask
 END(setjmp)
 
-ENTRY(longjmp)
-	movl	4(%esp),%edx
-	PIC_PROLOGUE
-	pushl	24(%edx)
-	call	PIC_PLT(sigsetmask)
-	addl	$4,%esp
-	PIC_EPILOGUE
+ENTRY(_setjmp)
+  movl 4(%esp),%ecx
+  movl $0,(_JB_SIGFLAG * 4)(%ecx)
+  jmp .L_sigsetjmp_no_signal_mask
+END(_setjmp)
 
-	movl	4(%esp),%edx
-	movl	8(%esp),%eax
-	movl	0(%edx),%ecx
-	movl	4(%edx),%ebx
-	movl	8(%edx),%esp
-	movl	12(%edx),%ebp
-	movl	16(%edx),%esi
-	movl	20(%edx),%edi
-	testl	%eax,%eax
-	jnz	1f
-	incl	%eax
-1:	movl	%ecx,0(%esp)
-	ret
-END(longjmp)
+ENTRY(sigsetjmp)
+  movl 4(%esp),%ecx
+  movl 8(%esp),%eax
+
+  // Record whether or not the signal mask is valid.
+  movl %eax,(_JB_SIGFLAG * 4)(%ecx)
+
+  // Do we need to save the signal mask?
+  testl %eax,%eax
+  jz 1f
+
+.L_sigsetjmp_signal_mask:
+  // Get the current signal mask.
+  PIC_PROLOGUE
+  pushl $0
+  call PIC_PLT(sigblock)
+  addl $4,%esp
+  PIC_EPILOGUE
+
+  // Save the signal mask.
+  movl 4(%esp),%ecx
+  movl %eax,(_JB_SIGMASK * 4)(%ecx)
+
+.L_sigsetjmp_no_signal_mask:
+1:
+  // Save the callee-save registers.
+  movl 0(%esp),%edx
+  movl %edx,(_JB_EDX * 4)(%ecx)
+  movl %ebx,(_JB_EBX * 4)(%ecx)
+  movl %esp,(_JB_ESP * 4)(%ecx)
+  movl %ebp,(_JB_EBP * 4)(%ecx)
+  movl %esi,(_JB_ESI * 4)(%ecx)
+  movl %edi,(_JB_EDI * 4)(%ecx)
+
+  xorl %eax,%eax
+  ret
+END(sigsetjmp)
+
+ENTRY(siglongjmp)
+  // Do we have a signal mask to restore?
+  movl 4(%esp),%edx
+  cmpl $0,(_JB_SIGFLAG * 4)(%edx)
+  jz 1f
+
+  // Restore the signal mask.
+  PIC_PROLOGUE
+  pushl (_JB_SIGMASK * 4)(%edx)
+  call PIC_PLT(sigsetmask)
+  addl $4,%esp
+  PIC_EPILOGUE
+
+1:
+  // Restore the callee-save registers.
+  movl 4(%esp),%edx
+  movl 8(%esp),%eax
+  movl (_JB_EDX * 4)(%edx),%ecx
+  movl (_JB_EBX * 4)(%edx),%ebx
+  movl (_JB_ESP * 4)(%edx),%esp
+  movl (_JB_EBP * 4)(%edx),%ebp
+  movl (_JB_ESI * 4)(%edx),%esi
+  movl (_JB_EDI * 4)(%edx),%edi
+
+  testl %eax,%eax
+  jnz 2f
+  incl %eax
+2:
+  movl %ecx,0(%esp)
+  ret
+END(siglongjmp)
+
+  .globl longjmp
+  .equ longjmp, siglongjmp
+  .globl _longjmp
+  .equ _longjmp, siglongjmp

libc/arch-x86/bionic/sigsetjmp.S

@@ -1,86 +0,0 @@
-/* $OpenBSD: sigsetjmp.S,v 1.7 2005/08/07 11:30:38 espie Exp $ */
-/*-
- * Copyright (c) 1990 The Regents of the University of California.
- * All rights reserved.
- *
- * This code is derived from software contributed to Berkeley by
- * William Jolitz.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- *    notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- *    notice, this list of conditions and the following disclaimer in the
- *    documentation and/or other materials provided with the distribution.
- * 3. Neither the name of the University nor the names of its contributors
- *    may be used to endorse or promote products derived from this software
- *    without specific prior written permission.
- *
- * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED.  IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- */
-
-#include <private/bionic_asm.h>
-
-ENTRY(sigsetjmp)
-	movl	4(%esp),%ecx
-	movl	8(%esp),%eax
-	movl	%eax,28(%ecx)
-	testl	%eax,%eax
-	jz	1f
-
-	PIC_PROLOGUE
-	pushl	$0
-	call	PIC_PLT(sigblock)
-	addl	$4,%esp
-	PIC_EPILOGUE
-
-	movl	4(%esp),%ecx
-	movl	%eax,24(%ecx)
-1:	movl	0(%esp),%edx
-	movl	%edx, 0(%ecx)
-	movl	%ebx, 4(%ecx)
-	movl	%esp, 8(%ecx)
-	movl	%ebp,12(%ecx)
-	movl	%esi,16(%ecx)
-	movl	%edi,20(%ecx)
-	xorl	%eax,%eax
-	ret
-END(sigsetjmp)
-
-ENTRY(siglongjmp)
-	movl	4(%esp),%edx
-	cmpl	$0,28(%edx)
-	jz	1f
-
-	PIC_PROLOGUE
-	pushl	24(%edx)
-	call	PIC_PLT(sigsetmask)
-	addl	$4,%esp
-	PIC_EPILOGUE
-
-1:	movl	4(%esp),%edx
-	movl	8(%esp),%eax
-	movl	0(%edx),%ecx
-	movl	4(%edx),%ebx
-	movl	8(%edx),%esp
-	movl	12(%edx),%ebp
-	movl	16(%edx),%esi
-	movl	20(%edx),%edi
-	testl	%eax,%eax
-	jnz	2f
-	incl	%eax
-2:	movl	%ecx,0(%esp)
-	ret
-END(siglongjmp)

libc/arch-x86/include/machine/asm.h

@@ -49,15 +49,6 @@
 #define PIC_GOT(x)	x@GOT(%ebx)
 #define PIC_GOTOFF(x)	x@GOTOFF(%ebx)
 
-/* let kernels and others override entrypoint alignment */
-#if !defined(_ALIGN_TEXT) && !defined(_KERNEL)
-# ifdef _STANDALONE
-#  define _ALIGN_TEXT .align 1
-# elif defined __ELF__
-#  define _ALIGN_TEXT .align 16
-# else
-#  define _ALIGN_TEXT .align 4
-# endif
-#endif
+#define __bionic_asm_align 16
 
 #endif /* !_I386_ASM_H_ */

libc/arch-x86/include/machine/endian.h

@@ -1,61 +0,0 @@
-/*	$OpenBSD: endian.h,v 1.17 2011/03/12 04:03:04 guenther Exp $	*/
-
-/*-
- * Copyright (c) 1997 Niklas Hallqvist.  All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- *    notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- *    notice, this list of conditions and the following disclaimer in the
- *    documentation and/or other materials provided with the distribution.
- *
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
- * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
- * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
- * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
- * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
- * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
- * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
- * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
- * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
- * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
- */
-
-#ifndef _MACHINE_ENDIAN_H_
-#define _MACHINE_ENDIAN_H_
-
-#ifdef __GNUC__
-
-#define	__swap32md(x) __statement({					\
-	uint32_t __swap32md_x = (x);					\
-									\
-	__asm ("bswap %0" : "+r" (__swap32md_x));			\
-	__swap32md_x;							\
-})
-
-#define	__swap64md(x) __statement({					\
-	uint64_t __swap64md_x = (x);					\
-									\
-	(uint64_t)__swap32md(__swap64md_x >> 32) |			\
-	    (uint64_t)__swap32md(__swap64md_x & 0xffffffff) << 32;	\
-})
-#define	__swap16md(x) __statement({					\
-	uint16_t __swap16md_x = (x);					\
-									\
-	__asm ("rorw $8, %w0" : "+r" (__swap16md_x));			\
-	__swap16md_x;							\
-})
-
-/* Tell sys/endian.h we have MD variants of the swap macros.  */
-#define MD_SWAP
-
-#endif	/* __GNUC__ */
-
-#define _BYTE_ORDER _LITTLE_ENDIAN
-#include <sys/types.h>
-#include <sys/endian.h>
-
-#endif /* _MACHINE_ENDIAN_H_ */

libc/arch-x86/include/machine/exec.h

@@ -1,51 +0,0 @@
-/*	$OpenBSD: exec.h,v 1.9 2003/04/17 03:42:14 drahn Exp $	*/
-/*	$NetBSD: exec.h,v 1.6 1994/10/27 04:16:05 cgd Exp $	*/
-
-/*
- * Copyright (c) 1993 Christopher G. Demetriou
- * All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- *    notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- *    notice, this list of conditions and the following disclaimer in the
- *    documentation and/or other materials provided with the distribution.
- * 3. The name of the author may not be used to endorse or promote products
- *    derived from this software without specific prior written permission
- *
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
- * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
- * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
- * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
- * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
- * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
- * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
- * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
- * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
- * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
- */
-
-#ifndef _I386_EXEC_H_
-#define _I386_EXEC_H_
-
-#define __LDPGSZ	4096
-
-#define NATIVE_EXEC_ELF
-
-#define ARCH_ELFSIZE		32
-
-#define ELF_TARG_CLASS		ELFCLASS32
-#define ELF_TARG_DATA		ELFDATA2LSB
-#define ELF_TARG_MACH		EM_386 /* XXX - EM_486 is currently unused
-                                          by all OSs/compilers/linkers */
-
-#define _NLIST_DO_AOUT
-#define _NLIST_DO_ELF
-
-#define _KERN_DO_AOUT
-#define _KERN_DO_ELF
-
-#endif  /* _I386_EXEC_H_ */

libc/arch-x86/syscalls/__clock_nanosleep.S

@@ -2,7 +2,7 @@
 
 #include <private/bionic_asm.h>
 
-ENTRY(clock_nanosleep)
+ENTRY(__clock_nanosleep)
     pushl   %ebx
     .cfi_def_cfa_offset 8
     .cfi_rel_offset ebx, 0
@@ -33,4 +33,4 @@ ENTRY(clock_nanosleep)
     popl    %ecx
     popl    %ebx
     ret
-END(clock_nanosleep)
+END(__clock_nanosleep)

libc/arch-x86/syscalls/__rt_sigqueueinfo.S

@@ -0,0 +1,31 @@
+/* Generated by gensyscalls.py. Do not edit. */
+
+#include <private/bionic_asm.h>
+
+ENTRY(__rt_sigqueueinfo)
+    pushl   %ebx
+    .cfi_def_cfa_offset 8
+    .cfi_rel_offset ebx, 0
+    pushl   %ecx
+    .cfi_adjust_cfa_offset 4
+    .cfi_rel_offset ecx, 0
+    pushl   %edx
+    .cfi_adjust_cfa_offset 4
+    .cfi_rel_offset edx, 0
+    mov     16(%esp), %ebx
+    mov     20(%esp), %ecx
+    mov     24(%esp), %edx
+    movl    $__NR_rt_sigqueueinfo, %eax
+    int     $0x80
+    cmpl    $-MAX_ERRNO, %eax
+    jb      1f
+    negl    %eax
+    pushl   %eax
+    call    __set_errno_internal
+    addl    $4, %esp
+1:
+    popl    %edx
+    popl    %ecx
+    popl    %ebx
+    ret
+END(__rt_sigqueueinfo)

libc/arch-x86/syscalls/sethostname.S

@@ -0,0 +1,26 @@
+/* Generated by gensyscalls.py. Do not edit. */
+
+#include <private/bionic_asm.h>
+
+ENTRY(sethostname)
+    pushl   %ebx
+    .cfi_def_cfa_offset 8
+    .cfi_rel_offset ebx, 0
+    pushl   %ecx
+    .cfi_adjust_cfa_offset 4
+    .cfi_rel_offset ecx, 0
+    mov     12(%esp), %ebx
+    mov     16(%esp), %ecx
+    movl    $__NR_sethostname, %eax
+    int     $0x80
+    cmpl    $-MAX_ERRNO, %eax
+    jb      1f
+    negl    %eax
+    pushl   %eax
+    call    __set_errno_internal
+    addl    $4, %esp
+1:
+    popl    %ecx
+    popl    %ebx
+    ret
+END(sethostname)

libc/arch-x86/x86.mk

@@ -40,10 +40,8 @@ libc_bionic_src_files_x86 += \
     arch-x86/bionic/_exit_with_stack_teardown.S \
     arch-x86/bionic/libgcc_compat.c \
     arch-x86/bionic/__restore.S \
-    arch-x86/bionic/_setjmp.S \
     arch-x86/bionic/setjmp.S \
     arch-x86/bionic/__set_tls.c \
-    arch-x86/bionic/sigsetjmp.S \
     arch-x86/bionic/syscall.S \
     arch-x86/bionic/vfork.S \
 

libc/arch-x86_64/bionic/_setjmp.S

@@ -1,83 +0,0 @@
-/*	$OpenBSD: _setjmp.S,v 1.1 2004/01/28 01:44:45 mickey Exp $	*/
-/*	$NetBSD: _setjmp.S,v 1.1 2001/06/19 00:25:02 fvdl Exp $	*/
-
-/*
- * Copyright (c) 2001 Wasabi Systems, Inc.
- * All rights reserved.
- *
- * Written by Frank van der Linden for Wasabi Systems, Inc.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- *    notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- *    notice, this list of conditions and the following disclaimer in the
- *    documentation and/or other materials provided with the distribution.
- * 3. All advertising materials mentioning features or use of this software
- *    must display the following acknowledgement:
- *      This product includes software developed for the NetBSD Project by
- *      Wasabi Systems, Inc.
- * 4. The name of Wasabi Systems, Inc. may not be used to endorse
- *    or promote products derived from this software without specific prior
- *    written permission.
- *
- * THIS SOFTWARE IS PROVIDED BY WASABI SYSTEMS, INC. ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
- * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
- * PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL WASABI SYSTEMS, INC
- * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
- * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
- * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
- * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
- * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
- * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
- * POSSIBILITY OF SUCH DAMAGE.
- */
-
-#include <private/bionic_asm.h>
-#include <machine/setjmp.h>
-
-/*
- * C library -- _setjmp, _longjmp
- *
- *	_longjmp(a,v)
- * will generate a "return(v)" from the last call to
- *	_setjmp(a)
- * by restoring registers from the stack.
- * The previous signal state is NOT restored.
- */
-
-ENTRY(_setjmp)
-	movq    (%rsp),%r11
-	movq    %rbx,(_JB_RBX * 8)(%rdi)
-	movq    %rbp,(_JB_RBP * 8)(%rdi)
-	movq    %r12,(_JB_R12 * 8)(%rdi)
-	movq    %r13,(_JB_R13 * 8)(%rdi)
-	movq    %r14,(_JB_R14 * 8)(%rdi)
-	movq    %r15,(_JB_R15 * 8)(%rdi)
-	movq    %rsp,(_JB_RSP * 8)(%rdi)
-	movq    %r11,(_JB_PC  * 8)(%rdi)
-
-	xorl	%eax,%eax
-	ret
-END(_setjmp)
-
-ENTRY(_longjmp)
-	movq    (_JB_RBX * 8)(%rdi),%rbx
-	movq    (_JB_RBP * 8)(%rdi),%rbp
-	movq    (_JB_R12 * 8)(%rdi),%r12
-	movq    (_JB_R13 * 8)(%rdi),%r13
-	movq    (_JB_R14 * 8)(%rdi),%r14
-	movq    (_JB_R15 * 8)(%rdi),%r15
-	movq    (_JB_RSP * 8)(%rdi),%rsp
-	movq    (_JB_PC  * 8)(%rdi),%r11
-
-	movl	%esi,%eax
-	testl	%eax,%eax
-	jnz	1f
-	incl	%eax
-1:	movq	%r11,0(%rsp)
-	ret
-END(_longjmp)

libc/arch-x86_64/bionic/setjmp.S

@@ -1,6 +1,3 @@
-/*	$OpenBSD: setjmp.S,v 1.3 2012/08/22 17:19:34 pascal Exp $	*/
-/*	$NetBSD: __setjmp14.S,v 1.1 2001/06/19 00:25:02 fvdl Exp $	*/
-
 /*
  * Copyright (c) 2001 Wasabi Systems, Inc.
  * All rights reserved.
@@ -37,60 +34,102 @@
  */
 
 #include <private/bionic_asm.h>
-#include <machine/setjmp.h>
 
-/*
- * C library -- _setjmp, _longjmp
- *
- *	longjmp(a,v)
- * will generate a "return(v)" from the last call to
- *	setjmp(a)
- * by restoring registers from the stack.
- * The previous signal state is restored.
- */
+// These are only the callee-saved registers. Code calling setjmp
+// will expect the rest to be clobbered anyway.
+
+#define _JB_RBX 0
+#define _JB_RBP 1
+#define _JB_R12 2
+#define _JB_R13 3
+#define _JB_R14 4
+#define _JB_R15 5
+#define _JB_RSP 6
+#define _JB_PC 7
+#define _JB_SIGFLAG 8
+#define _JB_SIGMASK 9
+#define _JB_SIGMASK_RT 10 // sigprocmask will write here too.
 
 ENTRY(setjmp)
-	pushq	%rdi
-	xorq	%rdi,%rdi
-	call	PIC_PLT(sigblock)
-	popq	%rdi
-	movq	%rax,(_JB_SIGMASK * 8)(%rdi)
-
-	movq	(%rsp),%r11
-	movq	%rbx,(_JB_RBX * 8)(%rdi)
-	movq	%rbp,(_JB_RBP * 8)(%rdi)
-	movq	%r12,(_JB_R12 * 8)(%rdi)
-	movq	%r13,(_JB_R13 * 8)(%rdi)
-	movq	%r14,(_JB_R14 * 8)(%rdi)
-	movq	%r15,(_JB_R15 * 8)(%rdi)
-	movq	%rsp,(_JB_RSP * 8)(%rdi)
-	movq	%r11,(_JB_PC  * 8)(%rdi)
-
-2:	xorl	%eax,%eax
-	ret
+  movl $1,%esi
+  jmp PIC_PLT(sigsetjmp)
 END(setjmp)
 
-ENTRY(longjmp)
-	movq	%rdi,%r12
-	movl	%esi,%r8d
+ENTRY(_setjmp)
+  movl $0,%esi
+  jmp PIC_PLT(sigsetjmp)
+END(_setjmp)
 
-	movq	(_JB_SIGMASK * 8)(%rdi),%rdi
-	pushq	%r8
-	call	PIC_PLT(sigsetmask)
-	popq	%r8
-	movq	(_JB_RBX * 8)(%r12),%rbx
-	movq	(_JB_RBP * 8)(%r12),%rbp
-	movq	(_JB_R13 * 8)(%r12),%r13
-	movq	(_JB_R14 * 8)(%r12),%r14
-	movq	(_JB_R15 * 8)(%r12),%r15
-	movq	(_JB_RSP * 8)(%r12),%rsp
-	movq	(_JB_PC  * 8)(%r12),%r11
-	movq	(_JB_R12 * 8)(%r12),%r12
+// int sigsetjmp(sigjmp_buf env, int save_signal_mask);
+ENTRY(sigsetjmp)
+  // Record whether or not we're saving the signal mask.
+  movl %esi,(_JB_SIGFLAG * 8)(%rdi)
 
-	movl	%r8d,%eax
-	testl	%eax,%eax
-	jnz	1f
-	incl	%eax
-1:	movq	%r11,0(%rsp)
-	ret
-END(longjmp)
+  // Do we need to save the signal mask?
+  testl %esi,%esi
+  jz 2f
+
+  // Save current signal mask.
+  pushq %rdi // Push 'env'.
+  // The 'how' argument is ignored if new_mask is NULL.
+  xorq %rsi,%rsi // NULL.
+  leaq (_JB_SIGMASK * 8)(%rdi),%rdx // old_mask.
+  call PIC_PLT(sigprocmask)
+  popq %rdi // Pop 'env'.
+
+2:
+  // Save the callee-save registers.
+  movq (%rsp),%r11
+  movq %rbx,(_JB_RBX * 8)(%rdi)
+  movq %rbp,(_JB_RBP * 8)(%rdi)
+  movq %r12,(_JB_R12 * 8)(%rdi)
+  movq %r13,(_JB_R13 * 8)(%rdi)
+  movq %r14,(_JB_R14 * 8)(%rdi)
+  movq %r15,(_JB_R15 * 8)(%rdi)
+  movq %rsp,(_JB_RSP * 8)(%rdi)
+  movq %r11,(_JB_PC  * 8)(%rdi)
+
+  xorl %eax,%eax
+  ret
+END(sigsetjmp)
+
+// void siglongjmp(sigjmp_buf env, int value);
+ENTRY(siglongjmp)
+  movq %rdi,%r12
+  pushq %rsi // Push 'value'.
+
+  // Do we need to restore the signal mask?
+  cmpl $0,(_JB_SIGFLAG * 8)(%rdi)
+  jz 2f
+
+  // Restore the signal mask.
+  movq $2,%rdi // SIG_SETMASK.
+  leaq (_JB_SIGMASK * 8)(%r12),%rsi // new_mask.
+  xorq %rdx,%rdx // NULL.
+  call PIC_PLT(sigprocmask)
+
+2:
+  popq %rax // Pop 'value'.
+
+  // Restore the callee-save registers.
+  movq (_JB_RBX * 8)(%r12),%rbx
+  movq (_JB_RBP * 8)(%r12),%rbp
+  movq (_JB_R13 * 8)(%r12),%r13
+  movq (_JB_R14 * 8)(%r12),%r14
+  movq (_JB_R15 * 8)(%r12),%r15
+  movq (_JB_RSP * 8)(%r12),%rsp
+  movq (_JB_PC  * 8)(%r12),%r11
+  movq (_JB_R12 * 8)(%r12),%r12
+
+  testl %eax,%eax
+  jnz 1f
+  incl %eax
+1:
+  movq %r11,0(%rsp)
+  ret
+END(siglongjmp)
+
+  .globl longjmp
+  .equ longjmp, siglongjmp
+  .globl _longjmp
+  .equ _longjmp, siglongjmp

libc/arch-x86_64/bionic/sigsetjmp.S

@@ -1,101 +0,0 @@
-/*	$OpenBSD: sigsetjmp.S,v 1.3 2012/08/22 17:19:34 pascal Exp $	*/
-/*	$NetBSD: __setjmp14.S,v 1.1 2001/06/19 00:25:02 fvdl Exp $	*/
-
-/*
- * Copyright (c) 2001 Wasabi Systems, Inc.
- * All rights reserved.
- *
- * Written by Frank van der Linden for Wasabi Systems, Inc.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- *    notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- *    notice, this list of conditions and the following disclaimer in the
- *    documentation and/or other materials provided with the distribution.
- * 3. All advertising materials mentioning features or use of this software
- *    must display the following acknowledgement:
- *      This product includes software developed for the NetBSD Project by
- *      Wasabi Systems, Inc.
- * 4. The name of Wasabi Systems, Inc. may not be used to endorse
- *    or promote products derived from this software without specific prior
- *    written permission.
- *
- * THIS SOFTWARE IS PROVIDED BY WASABI SYSTEMS, INC. ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
- * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
- * PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL WASABI SYSTEMS, INC
- * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
- * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
- * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
- * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
- * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
- * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
- * POSSIBILITY OF SUCH DAMAGE.
- */
-
-
-#include <private/bionic_asm.h>
-#include <machine/setjmp.h>
-
-/*
- * C library -- _setjmp, _longjmp
- *
- *	longjmp(a,v)
- * will generate a "return(v)" from the last call to
- *	setjmp(a)
- * by restoring registers from the stack.
- * The previous signal state is restored.
- */
-
-ENTRY(sigsetjmp)
-	movl    %esi,(_JB_SIGFLAG  * 8)(%rdi)
-	testl   %esi,%esi
-	jz      2f
-
-	pushq	%rdi
-	xorq	%rdi,%rdi
-	call	PIC_PLT(sigblock)
-	popq	%rdi
-	movq	%rax,(_JB_SIGMASK * 8)(%rdi)
-
-2:	movq	(%rsp),%r11
-	movq	%rbx,(_JB_RBX * 8)(%rdi)
-	movq	%rbp,(_JB_RBP * 8)(%rdi)
-	movq	%r12,(_JB_R12 * 8)(%rdi)
-	movq	%r13,(_JB_R13 * 8)(%rdi)
-	movq	%r14,(_JB_R14 * 8)(%rdi)
-	movq	%r15,(_JB_R15 * 8)(%rdi)
-	movq	%rsp,(_JB_RSP * 8)(%rdi)
-	movq	%r11,(_JB_PC  * 8)(%rdi)
-
-2:	xorl	%eax,%eax
-	ret
-END(sigsetjmp)
-
-ENTRY(siglongjmp)
-	movq	%rdi,%r12
-	pushq   %rsi
-	cmpl    $0, (_JB_SIGFLAG * 8)(%rdi)
-	jz      2f
-
-	movq	(_JB_SIGMASK * 8)(%rdi),%rdi
-	call	PIC_PLT(sigsetmask)
-2:	popq	%rax
-	movq	(_JB_RBX * 8)(%r12),%rbx
-	movq	(_JB_RBP * 8)(%r12),%rbp
-	movq	(_JB_R13 * 8)(%r12),%r13
-	movq	(_JB_R14 * 8)(%r12),%r14
-	movq	(_JB_R15 * 8)(%r12),%r15
-	movq	(_JB_RSP * 8)(%r12),%rsp
-	movq	(_JB_PC  * 8)(%r12),%r11
-	movq	(_JB_R12 * 8)(%r12),%r12
-
-	testl	%eax,%eax
-	jnz	1f
-	incl	%eax
-1:	movq	%r11,0(%rsp)
-	ret
-END(siglongjmp)

libc/arch-x86_64/include/machine/asm.h

@@ -40,13 +40,6 @@
 #define PIC_PLT(x)	x@PLT
 #define PIC_GOT(x)	x@GOTPCREL(%rip)
 
-/* let kernels and others override entrypoint alignment */
-#ifndef _ALIGN_TEXT
-# ifdef _STANDALONE
-#  define _ALIGN_TEXT .align 4
-# else
-#  define _ALIGN_TEXT .align 16
-# endif
-#endif
+#define __bionic_asm_align 16
 
 #endif /* !_AMD64_ASM_H_ */

libc/arch-x86_64/include/machine/endian.h

@@ -1,61 +0,0 @@
-/*	$OpenBSD: endian.h,v 1.5 2011/03/12 22:27:48 guenther Exp $	*/
-
-/*-
- * Copyright (c) 1997 Niklas Hallqvist.  All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- *    notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- *    notice, this list of conditions and the following disclaimer in the
- *    documentation and/or other materials provided with the distribution.
- *
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
- * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
- * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
- * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
- * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
- * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
- * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
- * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
- * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
- * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
- */
-
-#ifndef _MACHINE_ENDIAN_H_
-#define _MACHINE_ENDIAN_H_
-
-#ifdef __GNUC__
-
-#define	__swap32md(x) __statement({					\
-	u_int32_t __swap32md_x = (x);					\
-									\
-	__asm ("bswap %0" : "+r" (__swap32md_x));			\
-	__swap32md_x;							\
-})
-
-#define	__swap64md(x) __statement({					\
-	u_int64_t __swap64md_x = (x);					\
-									\
-	__asm ("bswapq %0" : "+r" (__swap64md_x));			\
-	__swap64md_x;							\
-})
-
-#define	__swap16md(x) __statement({					\
-	u_int16_t __swap16md_x = (x);					\
-									\
-	__asm ("rorw $8, %w0" : "+r" (__swap16md_x));			\
-	__swap16md_x;							\
-})
-
-/* Tell sys/endian.h we have MD variants of the swap macros.  */
-#define MD_SWAP
-
-#endif	/* __GNUC__ */
-
-#define _BYTE_ORDER _LITTLE_ENDIAN
-#include <sys/endian.h>
-
-#endif /* _MACHINE_ENDIAN_H_ */

libc/arch-x86_64/include/machine/exec.h

@@ -1,20 +0,0 @@
-/*	$OpenBSD: exec.h,v 1.4 2012/09/11 15:44:17 deraadt Exp $	*/
-/*
- * Written by Artur Grabowski <art@openbsd.org> Public Domain
- */
-
-#ifndef _MACHINE_EXEC_H_
-#define _MACHINE_EXEC_H_
-
-#define __LDPGSZ 4096
-
-#define ARCH_ELFSIZE 64
-
-#define ELF_TARG_CLASS		ELFCLASS64
-#define ELF_TARG_DATA		ELFDATA2LSB
-#define ELF_TARG_MACH		EM_X86_64
-
-#define _NLIST_DO_ELF
-#define _KERN_DO_ELF64
-
-#endif

libc/arch-x86_64/include/machine/setjmp.h

@@ -1,21 +1,4 @@
 /*	$OpenBSD: setjmp.h,v 1.1 2004/01/28 01:39:39 mickey Exp $	*/
 /*	$NetBSD: setjmp.h,v 1.1 2003/04/26 18:39:47 fvdl Exp $	*/
 
-/*
- * machine/setjmp.h: machine dependent setjmp-related information.
- * These are only the callee-saved registers, code calling setjmp
- * will expect the rest to be clobbered anyway.
- */
-
-#define _JB_RBX		0
-#define _JB_RBP		1
-#define _JB_R12		2
-#define _JB_R13		3
-#define _JB_R14		4
-#define _JB_R15		5
-#define _JB_RSP		6
-#define _JB_PC		7
-#define _JB_SIGFLAG	8
-#define _JB_SIGMASK	9
-
 #define	_JBLEN	11		/* size, in longs, of a jmp_buf */

libc/arch-x86_64/string/sse2-strlcat-slm.S

@@ -0,0 +1,37 @@
+/*
+Copyright (c) 2014, Intel Corporation
+All rights reserved.
+
+Redistribution and use in source and binary forms, with or without
+modification, are permitted provided that the following conditions are met:
+
+    * Redistributions of source code must retain the above copyright notice,
+    * this list of conditions and the following disclaimer.
+
+    * Redistributions in binary form must reproduce the above copyright notice,
+    * this list of conditions and the following disclaimer in the documentation
+    * and/or other materials provided with the distribution.
+
+    * Neither the name of Intel Corporation nor the names of its contributors
+    * may be used to endorse or promote products derived from this software
+    * without specific prior written permission.
+
+THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
+ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
+WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR
+ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
+ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
+SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+*/
+
+#define USE_AS_STRLCAT
+
+#ifndef STRLCPY
+# define STRLCPY	strlcat
+#endif
+
+#include "sse2-strlcpy-slm.S"

libc/arch-x86_64/syscalls/__clock_nanosleep.S

@@ -2,7 +2,7 @@
 
 #include <private/bionic_asm.h>
 
-ENTRY(clock_nanosleep)
+ENTRY(__clock_nanosleep)
     movq    %rcx, %r10
     movl    $__NR_clock_nanosleep, %eax
     syscall
@@ -13,4 +13,5 @@ ENTRY(clock_nanosleep)
     call    __set_errno_internal
 1:
     ret
-END(clock_nanosleep)
+END(__clock_nanosleep)
+.hidden __clock_nanosleep

libc/arch-x86_64/syscalls/__rt_sigqueueinfo.S

@@ -0,0 +1,16 @@
+/* Generated by gensyscalls.py. Do not edit. */
+
+#include <private/bionic_asm.h>
+
+ENTRY(__rt_sigqueueinfo)
+    movl    $__NR_rt_sigqueueinfo, %eax
+    syscall
+    cmpq    $-MAX_ERRNO, %rax
+    jb      1f
+    negl    %eax
+    movl    %eax, %edi
+    call    __set_errno_internal
+1:
+    ret
+END(__rt_sigqueueinfo)
+.hidden __rt_sigqueueinfo

libc/arch-x86_64/syscalls/sethostname.S

@@ -0,0 +1,15 @@
+/* Generated by gensyscalls.py. Do not edit. */
+
+#include <private/bionic_asm.h>
+
+ENTRY(sethostname)
+    movl    $__NR_sethostname, %eax
+    syscall
+    cmpq    $-MAX_ERRNO, %rax
+    jb      1f
+    negl    %eax
+    movl    %eax, %edi
+    call    __set_errno_internal
+1:
+    ret
+END(sethostname)