For builds under windows this could emit a non-vec mov that's not optional for
AVX versions.
Change-Id: I31e6ea3b62d48c5a13f6e83f8d684f0b5551087b
Signed-off-by: Greg Tucker <greg.b.tucker@intel.com>
The gf_{2-6}vect_dot_prod tests were kept in other_tests since the 5,6vect
functions were not strictly called by the higher level ec_encode_data() and
needed independent testing. As this has now changed the extra tests can be
removed as redundant.
Change-Id: I8a95e31487b150a2a8f929c5586785524d951fde
Signed-off-by: Greg Tucker <greg.b.tucker@intel.com>
1) Implement the ErasureCode function in Altivec Intrinsics
2) Coding style update
Change-Id: I2c81d035f4083e9b011dbf3b741f628813b68606
Thanks-to: Daniel Axtens <dja@axtens.net>
Signed-off-by: Hong Bo Peng <penghb@cn.ibm.com>
Added AVX512 optimized functions to calculate the
GF(2^8) vector dot product with 5 and 6 outputs
at a time. Also added GF(2^8) vector multiply
AVX512 optimized functions with 5 and 6 accumulate.
Change-Id: I6d2c080f4f4f8e4823ad9a9be2c65c3b5b3bb1f8
Signed-off-by: John Kariuki <John.K.Kariuki@intel.com>
1.Replace below erasure code interfaces to arm neon interface by mbin_interface function.
ec_encode_data
gf_vect_mul
gf_vect_dot_prod
gf_vect_mad
ec_encode_data_update
2.Utilise arm neon instrution to accelerate GF(2^8) set compute by 128bit registor.
Change-Id: Ib0ecbfbd1837d2b1f823d26815c896724d2d22e4
Signed-off-by: Zhou Xiong <zhouxiong13@huawei.com>
ec_base.h has several variables, which were defined with
a global scope. Exactly those global variables caused issues
on linking a static compilation of libisal.a to a shared lib.
Adding -fPIC to CFLAGS somehow didn't help.
As all the variables in ec_base.h are only included
and used by a single C file, all of these can be
(file) static, which then will also helps the compiler to
make further optimizations. And which also solves the issue
to link the static libisal to a shared lib.
Also make the variables const, as these are constants and
must be modified.
Change-Id: I2b8141dabc1c7a528401f2778cdbdbed6c93c36b
Signed-off-by: Bernd Schubert <bschubert@ddn.com>
This patch addresses one build failure and fixes several build warnings
for Arm (some for x86 too).
- Fix dynamic relocation link failure of ld.bfd 2.30 on Arm
[log] relocation R_AARCH64_ADR_PREL_PG_HI21 against symbol `xor_gen_neon' which may bind externally can not be used when making a shared object
- Add arch dependent "other_tests" to exclude x86 specific tests on Arm
[log] isa-l/erasure_code/gf_2vect_dot_prod_sse_test.c:181: undefined reference to `gf_2vect_dot_prod_sse'
- Check "fread" return value to fix gcc warnings on Arm and x86
[log] warning: ignoring return value of ‘fread’, declared with attribute warn_unused_result [-Wunused-result]
fread(in_buf, 1, in_size, in_file);
^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
- Fix issue of comparing "char" with "int" on Arm. "char" is unsigned
on Arm by default, an unsigned char will never equal to EOF(-1).
[Log] programs/igzip_cli.c:318:31: warning: comparison is always true due to limited range of data type [-Wtype-limits]
while (tmp != '\n' && tmp != EOF)
^~
- Include <stdlib.h> to several files to fix build warnings on Arm
[log] igzip/igzip_inflate_perf.c:339:5: warning: incompatible implicit declaration of built-in function ‘exit’
exit(0);
^~~~
Change-Id: I82c1b63316b634b3d398ffba2ff815679d9051a8
Signed-off-by: Yibo Cai <yibo.cai@arm.com>
Remove gf_vect_mad_perf.c as it is architecture specific and does not provide
useful information in its current format.
Change-Id: I7819679db491a9b5572128e4fc05d989b870d22d
Signed-off-by: Roy Oursler <roy.j.oursler@intel.com>
This matches the definition of struct slver elsewhere in the code.
Removes the last use of [U]INT{8,16,32,64} types.
Change-Id: I70761ac27add1e19808f1cebd6a7ee69ebd08dee
Signed-off-by: Daniel Verkamp <daniel.verkamp@intel.com>
This patch makes the project compile and run (tests and
performance tests as well) with CPUs which are not
supporting SSE instructions.
Signed-off-by: Jean-Yves Vet <jyvet@ddn.com>
Add a program calculating some of the exact conditions where gf_gen_rs_matrix
works, add comments stating these bounds to gf_gen_rs_matrix, and fix erasure
code test that violates the bounds.
Change-Id: I1d0010b09fea97731bfd24f4f76e24609538b24f
Signed-off-by: Roy Oursler <roy.j.oursler@intel.com>
Allows configure to again build in an external directory. When building ISAL in
an external path, assembler or compiler needs relative include paths.
Signed-off-by: Xiaodong Liu <xiaodong.liu@intel.com>
Reviewed-by: Greg Tucker <greg.b.tucker@intel.com>
The avx512 functions are not directly exported and this could cause warnings
when unit tests try to link to them directly.
Signed-off-by: Greg Tucker <greg.b.tucker@intel.com>
- Includes gf_nvect_dot_prod, gf_nvect_mad functions
- Change ec multibinary to use common macros
- Autoconf checks for nasm or yasm support and picks if available
- Leave out compile of any avx512 code if assembler not available
Signed-off-by: Greg Tucker <greg.b.tucker@intel.com>
