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ec: Group src by arch
Signed-off-by: Greg Tucker <greg.b.tucker@intel.com>
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@ -19,6 +19,7 @@ perf_tests_extra=
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examples=
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other_tests=
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lsrc_x86_64=
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lsrc_x86_32=
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lsrc32=
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unit_tests32=
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perf_tests32=
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@ -1,5 +1,5 @@
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########################################################################
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# Copyright(c) 2011-2015 Intel Corporation All rights reserved.
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# Copyright(c) 2011-2017 Intel Corporation All rights reserved.
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#
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# Redistribution and use in source and binary forms, with or without
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# modification, are permitted provided that the following conditions
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@ -28,7 +28,9 @@
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########################################################################
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lsrc += erasure_code/ec_highlevel_func.c \
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erasure_code/ec_base.c \
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erasure_code/ec_base.c
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lsrc_x86_64 += \
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erasure_code/gf_vect_mul_sse.asm \
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erasure_code/gf_vect_mul_avx.asm \
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erasure_code/gf_vect_dot_prod_sse.asm \
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@ -70,7 +72,8 @@ lsrc += erasure_code/ec_highlevel_func.c \
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erasure_code/ec_multibinary.asm
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#if HAVE_AVX512
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lsrc += erasure_code/gf_vect_dot_prod_avx512.asm \
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lsrc_x86_64 += \
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erasure_code/gf_vect_dot_prod_avx512.asm \
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erasure_code/gf_2vect_dot_prod_avx512.asm \
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erasure_code/gf_3vect_dot_prod_avx512.asm \
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erasure_code/gf_4vect_dot_prod_avx512.asm \
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@ -79,9 +82,8 @@ lsrc += erasure_code/gf_vect_dot_prod_avx512.asm \
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erasure_code/gf_3vect_mad_avx512.asm \
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erasure_code/gf_4vect_mad_avx512.asm
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lsrc32 += erasure_code/ec_highlevel_func.c \
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lsrc_x86_32 += \
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erasure_code/ec_multibinary.asm \
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erasure_code/ec_base.c \
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erasure_code/gf_vect_dot_prod_avx.asm \
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erasure_code/gf_2vect_dot_prod_avx.asm \
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erasure_code/gf_3vect_dot_prod_avx.asm \
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