Commit Graph

364 Commits

Author SHA1 Message Date
Pablo de Lara
0c58317fe4 Fix Legacy SSE instructions to be VEX encoded
Signed-off-by: Pablo de Lara <pablo.de.lara.guarch@intel.com>
2025-11-06 13:53:18 +00:00
Veronika Karpenko
e6db28bf03 shim: improve overconsumption workaround
Fix issue: #369

Signed-off-by: Veronika Karpenko <veronika.karpenko@intel.com>
2025-11-05 16:17:11 +00:00
Veronika Karpenko
4bf531b403 shim: add inflateReset
Fix issue: #368

Signed-off-by: Veronika Karpenko <veronika.karpenko@intel.com>
2025-10-20 11:54:25 +01:00
Veronika Karpenko
74f29cfe8d shim: add crc32 and adler32 support
Signed-off-by: Veronika Karpenko <veronika.karpenko@intel.com>
2025-10-16 15:23:21 +01:00
Karpenko, Veronika
c9076a6380 shim: fix EOF exception
Fix issue: #361

Signed-off-by: Karpenko, Veronika <veronika.karpenko@intel.com>
2025-10-14 14:53:29 +01:00
Pablo de Lara
a90a880887 igzip: fix typos reported by codespell
Signed-off-by: Pablo de Lara <pablo.de.lara.guarch@intel.com>
2025-10-10 16:33:25 +01:00
Pablo de Lara
0b3ec4f3b6 Add error checking to get_filesize function
Signed-off-by: Pablo de Lara <pablo.de.lara.guarch@intel.com>
2025-10-02 10:29:58 +01:00
Pablo de Lara
bfc99b6a18 igzip: exit with status 1 in applications upon failure
Signed-off-by: Pablo de Lara <pablo.de.lara.guarch@intel.com>
2025-10-02 10:29:58 +01:00
Greg Tucker
9f77f65dbc igzip: Change return variable type consistent with usage
Signed-off-by: Greg Tucker <greg.b.tucker@intel.com>
2025-10-02 10:29:58 +01:00
vkarpenk
09d7b05dd4 shim: update README (#111)
Signed-off-by: Karpenko, Veronika <veronika.karpenko@intel.com>
2025-09-19 09:47:31 +01:00
Tim Burke
a46e3f1588 igzip: Fix aarch64 registry width for bfinal
We only ever load 32 bits into it, and we only ever want to compare against
32 bits. There was no need to declare it as 64 bits.

Furthermore, there were cases where a 64 bit comparison around
isal_out_overflow_1 led us to erroneously set the block state to
ISAL_BLOCK_INPUT_DONE when it should have been left at ISAL_BLOCK_NEW_HDR.

Fixes #316

Signed-off-by: Tim Burke <tim.burke@gmail.com>
2025-08-29 23:50:35 +08:00
Pablo de Lara
768b77219f igzip: [SHIM] fix memory leaks
Signed-off-by: Pablo de Lara <pablo.de.lara.guarch@intel.com>
2025-08-11 17:37:49 +01:00
Pablo de Lara
8f2c02ab9e igzip: fix memory leak in test
Signed-off-by: Pablo de Lara <pablo.de.lara.guarch@intel.com>
2025-08-11 17:37:49 +01:00
vkarpenk
f0320e1c30 shim: add zlib shim library
This is experimental library is a drop-in replacement for zlib that
utilizes ISA-L for improved compression/decompression performance.

Signed-off-by: Karpenko, Veronika <veronika.karpenko@intel.com>
Signed-off-by: Pablo de Lara <pablo.de.lara.guarch@intel.com>
2025-08-08 07:47:35 +00:00
Pablo de Lara
fc37bd08e3 Further memory leak fixes
Signed-off-by: Pablo de Lara <pablo.de.lara.guarch@intel.com>
2025-06-23 08:48:01 +01:00
Pablo de Lara
94690d01ca Remove 32-bit x86 architecture support
As already announced in issue #296, we are removing 32-bit x86 support,
which was not being validated anyway.

Signed-off-by: Pablo de Lara <pablo.de.lara.guarch@intel.com>
2025-05-08 18:37:08 +01:00
Pablo de Lara
8045bee170 Bump minimum NASM version to 2.14.01
NASM version 2.14.01 supports all x86 ISA in this library.
Since this version has been out since 2018, it is safe to
only permit the library to be compiled with this minimum version,
as announced in issue #297.

Signed-off-by: Pablo de Lara <pablo.de.lara.guarch@intel.com>
2025-05-08 16:20:08 +01:00
sunyuechi
b725bddd05 license: correct name to "ISCAS"
Signed-off-by: sunyuechi <sunyuechi@iscas.ac.cn>
2025-04-29 12:16:00 +00:00
Mattias Ellert
7e01b2c812 Address type mismatch warnings on riscv64
The riscv64 dispatcher code uses the same PROVIDER_INFO macro as the
aarch64 dispatcher and have the same kind of warnings during compilation:

igzip/riscv64/igzip_multibinary_riscv64_dispatcher.c:39:24: warning: type of 'adler32_base' does not match original declaration [-Wlto-type-mismatch]
   39 |                 return PROVIDER_BASIC(adler32);
      |                        ^
igzip/adler32_base.c:34:1: note: return value type mismatch
   34 | adler32_base(uint32_t adler32, uint8_t *start, uint64_t length)
      | ^
igzip/adler32_base.c:34:1: note: type 'uint32_t' should match type 'void'
igzip/adler32_base.c:34:1: note: 'adler32_base' was previously declared here

This commit introduces the same correction for riscv64.

Signed-off-by: Mattias Ellert <mattias.ellert@physics.uu.se>
2025-04-23 20:04:05 +01:00
Pablo de Lara
6b03bc4f1e igzip: fix coding style of inflate example
Signed-off-by: Pablo de Lara <pablo.de.lara.guarch@intel.com>
2025-04-23 13:46:12 +01:00
Mattias Ellert
841f9e34ad Address type mismatch warnings on aarch64
The PROVIDER_INFO macro used in the aarch64 code declares all
functions with the signature:

extern void function(void);

The actual return type and parameter list of the functions are however
different. The declarations provided by the PROVIDER_INFO macro
therfore conflicts with the actual declarations of the functions
elsewhere in the code, causing compiler warnings.

This commit drops the PROVIDER_INFO macro and provides proper function
declarations, eiter by including a header file or by providing a
forward declaration. This corresponds to how the code for the other
architectures are handlinging this issue.

Signed-off-by: Mattias Ellert <mattias.ellert@physics.uu.se>
2025-04-22 12:55:53 +01:00
Karpenko, Veronika
3e03e91cef igzip: add inflate example
Signed-off-by: Karpenko, Veronika <veronika.karpenko@intel.com>
2025-04-08 10:13:32 +01:00
sunyuechi
c0bd84c20e add R-V V build check
Signed-off-by: sunyuechi <sunyuechi@iscas.ac.cn>
2025-03-20 19:22:40 +00:00
sunyuechi
027be4beb9 add volatile for igzip/checksum32_funs_test
When using RISC-V GCC 14, `gcc -O0` passes the test, but `gcc -O2` fails.

The log shows that it enters the branch `if (c_dut != c_ref) {`

even though `c_dut` and `c_ref` have the same value.

Adding `volatile` allows the test to pass.

Signed-off-by: sunyuechi <sunyuechi@iscas.ac.cn>
2025-03-20 19:22:40 +00:00
sunyuechi
e0687d4964 igzip: R-V V isal_adler32
banana_f3:
	new: adler32_warm: runtime =    3062612 usecs, bandwidth 3861 MB in 3.0626 sec = 1261.01 MB/s
	old: adler32_warm: runtime =    3062505 usecs, bandwidth 1027 MB in 3.0625 sec = 335.64 MB/s

Signed-off-by: sunyuechi <sunyuechi@iscas.ac.cn>
2025-03-20 19:22:40 +00:00
sunyuechi
83d58b856c multibinary: Add run-time cpu feature detect for riscv64
Signed-off-by: sunyuechi <sunyuechi@iscas.ac.cn>
2025-03-20 19:22:40 +00:00
Daniel Gregory
726a6f7c02 build: Add riscv64 support
Use the base implementations for every function.

Signed-off-by: Daniel Gregory <daniel.gregory@bytedance.com>
2025-03-20 19:22:40 +00:00
Pablo de Lara
633add1b56 igzip: fix header construction in Big Endian systems
When a file contains a number of repeated '0x00' or '0xff'
bytes, the block header is copied from a precomputed header,
which only worked for Little-Endian systems.

Fixes #311.

Signed-off-by: Pablo de Lara <pablo.de.lara.guarch@intel.com>
2025-02-04 10:13:32 +00:00
Mattias Ellert
e3c2d243a1 Address compiler warnings on ppc64le and s390x
igzip/igzip_icf_body.c:7:1: warning: type of 'gen_icf_map_lh1' does not match original declaration [-Wlto-type-mismatch]
    7 | gen_icf_map_lh1(struct isal_zstream *, struct deflate_icf *, uint32_t);
      | ^
igzip/igzip_base_aliases.c:177:1: note: return value type mismatch
  177 | gen_icf_map_lh1(struct isal_zstream *stream, struct deflate_icf *matches_icf_lookup,
      | ^
igzip/igzip_base_aliases.c:177:1: note: type 'void' should match type 'uint64_t'
igzip/igzip_base_aliases.c:177:1: note: 'gen_icf_map_lh1' was previously declared here
igzip/igzip_base_aliases.c:177:1: note: code may be misoptimized unless '-fno-strict-aliasing' is used
igzip/igzip_icf_body.c:9:1: warning: type of 'set_long_icf_fg' does not match original declaration [-Wlto-type-mismatch]
    9 | set_long_icf_fg(uint8_t *, uint64_t, uint64_t, struct deflate_icf *);
      | ^
igzip/igzip_base_aliases.c:170:1: note: type mismatch in parameter 2
  170 | set_long_icf_fg(uint8_t *next_in, uint8_t *end_in, struct deflate_icf *match_lookup,
      | ^
igzip/igzip_base_aliases.c:170:1: note: 'set_long_icf_fg' was previously declared here
igzip/igzip_base_aliases.c:170:1: note: code may be misoptimized unless '-fno-strict-aliasing' is used
igzip/igzip_base_aliases.c:62:1: warning: type of 'set_long_icf_fg_base' does not match original declaration [-Wlto-type-mismatch]
   62 | set_long_icf_fg_base(uint8_t *next_in, uint8_t *end_in, struct deflate_icf *match_lookup,
      | ^
igzip/igzip_icf_body.c:34:1: note: type mismatch in parameter 2
   34 | set_long_icf_fg_base(uint8_t *next_in, uint64_t processed, uint64_t input_size,
      | ^
igzip/igzip_icf_body.c:34:1: note: 'set_long_icf_fg_base' was previously declared here
igzip/igzip_icf_body.c:34:1: note: code may be misoptimized unless '-fno-strict-aliasing' is used
igzip/igzip_base_aliases.c:54:1: warning: type of 'adler32_base' does not match original declaration [-Wlto-type-mismatch]
   54 | adler32_base(uint32_t init, const unsigned char *buf, uint64_t len);
      | ^
igzip/adler32_base.c:34:1: note: type mismatch in parameter 3
   34 | adler32_base(uint32_t adler32, uint8_t *start, uint32_t length)
      | ^
igzip/adler32_base.c:34:1: note: type 'uint32_t' should match type 'uint64_t'
igzip/adler32_base.c:34:1: note: 'adler32_base' was previously declared here
igzip/adler32_base.c:34:1: note: code may be misoptimized unless '-fno-strict-aliasing' is used

Signed-off-by: Mattias Ellert <mattias.ellert@physics.uu.se>
2025-01-27 23:01:00 +01:00
Pablo de Lara
7ebc65baa7 igzip: fix build on FreeBSD
Fix build warnings on FreeBSD, due to unused value.

Signed-off-by: Pablo de Lara <pablo.de.lara.guarch@intel.com>
2024-05-31 13:30:48 +01:00
Marcel Cornu
55fbfabfc6 igzip: reformat using new code style
Signed-off-by: Marcel Cornu <marcel.d.cornu@intel.com>
2024-04-22 11:35:03 +02:00
Taiju Yamada
38279f5e9e Avoid using x18 register
Signed-off-by: Taiju Yamada <tyamada@bi.a.u-tokyo.ac.jp>
2024-03-25 15:34:01 +00:00
Taiju Yamada
4be96e2437 Fixed isal_deflate_icf_finish_lvl1 dispatcher
Signed-off-by: Taiju Yamada <tyamada@bi.a.u-tokyo.ac.jp>
2024-03-07 10:10:39 +00:00
Colin Ian King
1500db751d Fix a handful of spelling mistakes and typos
There are quite a few spelling mistakes and typos in comments and
user facing message literal strings as found using codespell. Fix
these.

Signed-off-by: Colin Ian King <colin.i.king@gmail.com>
Signed-off-by: Pablo de Lara <pablo.de.lara.guarch@intel.com>
2024-02-06 15:03:14 +00:00
Pablo de Lara
29d99fce26 igzip: add zlib header init function
Add isal_zlib_hdr_init() function to initialize
the isal_zlib_header structure to all 0.

Signed-off-by: Pablo de Lara <pablo.de.lara.guarch@intel.com>
2023-12-20 14:05:52 +00:00
Tomasz Kantecki
6ef2abe80e igzip: fix issues reported by static code analysis
compute_dist_code() and compute_dist_icf_code() in huffman.h:
    Correct `assert(msb >= 1)` to `assert(msb >= 2)`.
    `msb` cannot be lower than 2 as it would result in corrupt computations.

get_dist_code() in huffman.h:
    Remove dead `if` statement at the beginning of the function.
    `dist` must be equal 1 or above in this function.

Signed-off-by: Tomasz Kantecki <tomasz.kantecki@intel.com>
2023-12-19 20:36:39 +00:00
Tomasz Kantecki
5a00eaec33 igzip: several fixes for issues reported by static code analysis
Signed-off-by: Tomasz Kantecki <tomasz.kantecki@intel.com>
2023-12-19 20:36:39 +00:00
Pablo de Lara
c06db0c60a igzip: [test] fix memory leak
Signed-off-by: Pablo de Lara <pablo.de.lara.guarch@intel.com>
2023-12-18 14:25:22 +00:00
Tomasz Kantecki
0e6bc4a5a1 igzip: zero flags field in isal_gzip_header_init()
Signed-off-by: Tomasz Kantecki <tomasz.kantecki@intel.com>
2023-12-14 13:55:52 +00:00
Pablo de Lara
4203d9628c igzip: fix null-terminated string setting
Signed-off-by: Pablo de Lara <pablo.de.lara.guarch@intel.com>
2023-12-07 13:34:21 +00:00
Pablo de Lara
4a4635e8db igzip: remove unneeded check
Signed-off-by: Pablo de Lara <pablo.de.lara.guarch@intel.com>
2023-12-07 13:34:21 +00:00
Pablo de Lara
02aa005c2d igzip: fix return value in wrapper header test
Signed-off-by: Pablo de Lara <pablo.de.lara.guarch@intel.com>
2023-12-07 13:34:21 +00:00
Pablo de Lara
7e2b097f15 igzip: fix build warnings on Windows
Signed-off-by: Pablo de Lara <pablo.de.lara.guarch@intel.com>
2023-12-07 13:23:09 +00:00
Pablo de Lara
2ca781df19 lib: reduce verbosity by default in tests
Signed-off-by: Pablo de Lara <pablo.de.lara.guarch@intel.com>
2023-12-01 14:33:29 +00:00
Pablo de Lara
e2acfbfe78 igzip: fix build warning
Fix the following build issue by initializing look_back_dist to 0.

igzip/igzip_inflate.c: In function ‘decode_huffman_code_block_stateless_base’:
igzip/igzip_inflate.c:1727:36:
 warning: ‘look_back_dist’ may be used uninitialized  [-Wmaybe-uninitialized]

Signed-off-by: Pablo de Lara <pablo.de.lara.guarch@intel.com>
2023-11-15 13:46:52 +00:00
Greg Tucker
9f2b68f057 igzip: Add precautionary reset hist_bits on stateless_init
The zstate.hist_bits is an option and shouldn't be set randomly by a
deflate stateless run but like level we may set anyway.

Change-Id: I37d3b51863d4697e964d45a482ddd526f40a0902
Signed-off-by: Greg Tucker <greg.b.tucker@intel.com>
2023-03-14 17:26:58 -07:00
Taiju Yamada
1187583a97 Fixes for aarch64 mac
- It should be fine to enable pmull always on Apple Silicon
- macOS 12+ is required for PMULL instruction.
- Changed the conditional macro to __APPLE__
- Rewritten dispatcher using sysctlbyname
- Use __USER_LABEL_PREFIX__
- Use __TEXT,__const as readonly section
- use ASM_DEF_RODATA macro
- fix func decl

Change-Id: I800593f21085d8187b480c8bb3ab2bd70c4a6974
Signed-off-by: Taiju Yamada <tyamada@bi.a.u-tokyo.ac.jp>
2022-10-28 08:27:26 -07:00
Greg Tucker
9c7e3b9f22 test: Change perf tests to warm by default
The cold versions of tests depended on a fixed size of last level
cache that is too low on some arch and too high for the total
available memory on others.

Change-Id: Iee98403f9ace02e01b810c296a5fe44b933bfb17
Signed-off-by: Greg Tucker <greg.b.tucker@intel.com>
2022-08-03 16:35:55 -07:00
Greg Tucker
9f75defd57 Remove all slver legacy segments
The relic slver is no longer used for individual versioning
on functions and is confusing tools looking for data in text
sections. This removes all instances instead of fixing since
its usefulness is waining. Fixes #221

Change-Id: Ife0b9f105950a90337c58e8a41ac2cffc0f67d99
Signed-off-by: Greg Tucker <greg.b.tucker@intel.com>
2022-07-14 19:23:52 -07:00
Martin Oliveira
8b7c1b80b2 igzip: fix neon adler32 load beyond buffer end
In the adler32_neon function, during the last iteration of the
loop through "accum32_neon", we would load data after the end of the
buffer (in the ld1 instruction, the "start" register points to the end
of the buffer).

If this memory is unmapped, this would cause a segfault. If the memory
is mapped, the checksum would be correct because that value would
only be used in the next iteration, but this happens during the last
iteration.

To fix this, we can simply do the load before incrementing "start". And
while we're at it, we can load directly into d0_v/d1_v, saving a couple
of mov's.

Finally, the ld1 done during the function initialization can be removed
as the values aren't used for anything.

Change-Id: I4a0f2811adc523852ebe774da0a6fb1f5419192f
Signed-off-by: Martin Oliveira <martin.oliveira@eideticom.com>
2022-04-25 15:36:37 -07:00