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Bump minimum NASM version to 2.14.01

Browse Source 
NASM version 2.14.01 supports all x86 ISA in this library.
Since this version has been out since 2018, it is safe to
only permit the library to be compiled with this minimum version,
as announced in issue #297.

Signed-off-by: Pablo de Lara <pablo.de.lara.guarch@intel.com>
This commit is contained in:
Pablo de Lara 2025-04-29 21:25:03 +00:00 committed by Tomasz Kantecki
parent d20335bba8
commit 8045bee170
63 changed files with 24 additions and 422 deletions
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6
Makefile.nmake
View File

@ -193,13 +193,11 @@ objs = \
bin\mem_multibinary.obj
INCLUDES = -I./ -Ierasure_code/ -Iraid/ -Icrc/ -Iigzip/ -Iprograms/ -Imem/ -Iinclude/ -Itests/fuzz/ -Iexamples/ec/
# Modern asm feature level, consider upgrading nasm before decreasing feature_level
FEAT_FLAGS = -DHAVE_AS_KNOWS_AVX512 -DAS_FEATURE_LEVEL=10
CFLAGS_REL = -O2 -DNDEBUG /Z7 /Gy
CFLAGS_DBG = -Od -DDEBUG /Z7
LINKFLAGS = -nologo -incremental:no -debug
CFLAGS = $(CFLAGS_REL) -nologo -D_USE_MATH_DEFINES $(FEAT_FLAGS) $(INCLUDES) $(D)
AFLAGS = -f win64 $(FEAT_FLAGS) $(INCLUDES) $(D)
CFLAGS = $(CFLAGS_REL) -nologo -D_USE_MATH_DEFINES $(INCLUDES) $(D)
AFLAGS = -f win64 $(INCLUDES) $(D)
CC = cl
# or CC = icl -Qstd=c99
AS = nasm

3
README.md
View File

@ -39,8 +39,7 @@ Building ISA-L
* Optional: Manual generation requires help2man package.
x86_64:
* Assembler: nasm. Version 2.15 or later suggested (other versions of nasm
may build but with limited function [support](doc/build.md)).
* Assembler: nasm. 2.14.01 minimum version required [support](doc/build.md)).
* Compiler: gcc, clang, icc or VC compiler.
aarch64:

3
Release_notes.txt
View File

@ -141,6 +141,9 @@ v2.10
v2.32
* General:
- Minimum NASM version required for x86 architecture is 2.14.01 now.
* RISCV support.
- Initial riscv64 support with runtime and build-time CPU feature detection.

61
configure.ac
View File

@ -135,31 +135,9 @@ int main(int argc, char **argv)
if test x"$nasm_feature_level" = x"1"; then
AC_MSG_CHECKING([for modern nasm])
AC_LANG_CONFTEST([AC_LANG_SOURCE([[pblendvb xmm2, xmm1;]])])
sed -i -e '/pblendvb/!d' conftest.c
if nasm -f elf64 conftest.c 2> /dev/null; then
AC_MSG_RESULT([yes])
nasm_feature_level=4
else
AC_MSG_RESULT([no])
fi
fi
if test x"$nasm_feature_level" = x"4"; then
AC_MSG_CHECKING([for optional nasm AVX512 support])
AC_LANG_CONFTEST([AC_LANG_SOURCE([[vinserti32x8 zmm0, ymm1, 1;]])])
sed -i -e '/vinsert/!d' conftest.c
if nasm -f elf64 conftest.c 2> /dev/null; then
AC_MSG_RESULT([yes])
nasm_feature_level=6
else
AC_MSG_RESULT([no])
fi
fi
if test x"$nasm_feature_level" = x"6"; then
AC_MSG_CHECKING([for additional nasm AVX512 support])
AC_LANG_CONFTEST([AC_LANG_SOURCE([[vpcompressb zmm0 {k1}, zmm1;]])])
sed -i -e '/vpcompressb/!d' conftest.c
if nasm -f elf64 conftest.c 2> /dev/null; then
if nasm -f elf64 conftest.c 2> /dev/null; then
AC_MSG_RESULT([yes])
nasm_feature_level=10
else
@ -181,29 +159,6 @@ int main(int argc, char **argv)
fi
if test x"$as_feature_level" = x"1"; then
AC_MSG_CHECKING([for modern $AS])
AC_LANG_CONFTEST([AC_LANG_SOURCE([[pblendvb xmm2, xmm1;]])])
sed -i -e '/pblendvb/!d' conftest.c
if $AS -f elf64 conftest.c 2> /dev/null; then
AC_MSG_RESULT([yes])
as_feature_level=4
else
AC_MSG_RESULT([no])
fi
fi
if test x"$as_feature_level" = x"4"; then
AC_MSG_CHECKING([for optional as AVX512 support])
AC_LANG_CONFTEST([AC_LANG_SOURCE([[vinserti32x8 zmm0, ymm1, 1;]])])
sed -i -e '/vinsert/!d' conftest.c
if $AS -f elf64 conftest.c 2> /dev/null; then
AC_MSG_RESULT([yes])
as_feature_level=6
else
AC_MSG_RESULT([no])
fi
fi
if test x"$as_feature_level" = x"6"; then
AC_MSG_CHECKING([for additional as AVX512 support])
AC_LANG_CONFTEST([AC_LANG_SOURCE([[vpcompressb zmm0, k1, zmm1;]])])
sed -i -e '/vpcompressb/!d' conftest.c
if $AS -f elf64 conftest.c 2> /dev/null; then
@ -215,8 +170,8 @@ int main(int argc, char **argv)
fi
fi
if test $as_feature_level -lt 2 ; then
AC_MSG_ERROR([No modern nasm found as required. Nasm should be v2.11.01 or later (v2.13 for AVX512).])
if test $as_feature_level -lt 10 ; then
AC_MSG_ERROR([No modern nasm found as required. Nasm should be v2.14.01 or later.])
fi
case $host_os in
@ -227,23 +182,13 @@ int main(int argc, char **argv)
*) arch=unknown asm_args="-f elf64";;
esac
AC_DEFINE_UNQUOTED(AS_FEATURE_LEVEL, [$as_feature_level], [Assembler feature level.])
if test $as_feature_level -ge 6 ; then
AC_DEFINE(HAVE_AS_KNOWS_AVX512, [1], [Assembler can do AVX512.])
have_as_knows_avx512=yes
else
AC_MSG_RESULT([Assembler does not understand AVX512 opcodes. Consider upgrading for best performance.])
fi
AM_CONDITIONAL(USE_NASM, test x"$AS" = x"nasm")
AM_CONDITIONAL(WITH_AVX512, test x"$have_as_knows_avx512" = x"yes")
AC_SUBST([asm_args])
AM_CONDITIONAL(DARWIN, test x"$arch" = x"darwin")
AC_MSG_RESULT([Using $AS args target "$arch" "$asm_args"])
else
# Disable below conditionals if not x86
AM_CONDITIONAL(USE_NASM, test "x" = "y")
AM_CONDITIONAL(WITH_AVX512, test "x" = "y")
AM_CONDITIONAL(DARWIN, test "x" = "y")
fi

9
crc/crc16_t10dif_by16_10.asm
View File

@ -51,8 +51,6 @@
%define FUNCTION_NAME crc16_t10dif_by16_10
%endif
%if (AS_FEATURE_LEVEL) >= 10
[bits 64]
default rel
@ -576,10 +574,3 @@ dq 0x8786858483828100, 0x8f8e8d8c8b8a8988
dq 0x0706050403020100, 0x000e0d0c0b0a0908
dq 0x8080808080808080, 0x0f0e0d0c0b0a0908
dq 0x8080808080808080, 0x8080808080808080
%else ; Assembler doesn't understand these opcodes. Add empty symbol for windows.
%ifidn __OUTPUT_FORMAT__, win64
global no_ %+ FUNCTION_NAME
no_ %+ FUNCTION_NAME %+ :
%endif
%endif ; (AS_FEATURE_LEVEL) >= 10

9
crc/crc32_gzip_refl_by16_10.asm
View File

@ -59,8 +59,6 @@
%define FUNCTION_NAME crc32_gzip_refl_by16_10
%endif
%if (AS_FEATURE_LEVEL) >= 10
%define fetch_dist 1024
[bits 64]
@ -534,10 +532,3 @@ pshufb_shift_table:
mask: dq 0xFFFFFFFFFFFFFFFF, 0x0000000000000000
mask2: dq 0xFFFFFFFF00000000, 0xFFFFFFFFFFFFFFFF
mask3: dq 0x8080808080808080, 0x8080808080808080
%else ; Assembler doesn't understand these opcodes. Add empty symbol for windows.
%ifidn __OUTPUT_FORMAT__, win64
global no_ %+ FUNCTION_NAME
no_ %+ FUNCTION_NAME %+ :
%endif
%endif ; (AS_FEATURE_LEVEL) >= 10

9
crc/crc32_ieee_by16_10.asm
View File

@ -51,8 +51,6 @@
%define FUNCTION_NAME crc32_ieee_by16_10
%endif
%if (AS_FEATURE_LEVEL) >= 10
[bits 64]
default rel
@ -557,10 +555,3 @@ dq 0x8786858483828100, 0x8f8e8d8c8b8a8988
dq 0x0706050403020100, 0x000e0d0c0b0a0908
dq 0x8080808080808080, 0x0f0e0d0c0b0a0908
dq 0x8080808080808080, 0x8080808080808080
%else ; Assembler doesn't understand these opcodes. Add empty symbol for windows.
%ifidn __OUTPUT_FORMAT__, win64
global no_ %+ FUNCTION_NAME
no_ %+ FUNCTION_NAME %+ :
%endif
%endif ; (AS_FEATURE_LEVEL) >= 10

9
crc/crc32_iscsi_by16_10.asm
View File

@ -51,8 +51,6 @@
%define FUNCTION_NAME crc32_iscsi_by16_10
%endif
%if (AS_FEATURE_LEVEL) >= 10
[bits 64]
default rel
@ -504,10 +502,3 @@ dq 0x0706050403020100, 0x000e0d0c0b0a0908
mask: dq 0xFFFFFFFFFFFFFFFF, 0x0000000000000000
mask2: dq 0xFFFFFFFF00000000, 0xFFFFFFFFFFFFFFFF
mask3: dq 0x8080808080808080, 0x8080808080808080
%else ; Assembler doesn't understand these opcodes. Add empty symbol for windows.
%ifidn __OUTPUT_FORMAT__, win64
global no_ %+ FUNCTION_NAME
no_ %+ FUNCTION_NAME %+ :
%endif
%endif ; (AS_FEATURE_LEVEL) >= 10

10
crc/crc64_iso_norm_by16_10.asm
View File

@ -41,8 +41,6 @@
%define FUNCTION_NAME crc64_iso_norm_by16_10
%endif
%if (AS_FEATURE_LEVEL) >= 10
%define fetch_dist 1024
[bits 64]
@ -463,11 +461,3 @@ dw 0x0000, 0x0001, 0x0003, 0x0007,
dw 0x000f, 0x001f, 0x003f, 0x007f,
dw 0x00ff, 0x01ff, 0x03ff, 0x07ff,
dw 0x0fff, 0x1fff, 0x3fff, 0x7fff,
%else ; Assembler doesn't understand these opcodes. Add empty symbol for windows.
%ifidn __OUTPUT_FORMAT__, win64
global no_ %+ FUNCTION_NAME
no_ %+ FUNCTION_NAME %+ :
%endif
%endif ; (AS_FEATURE_LEVEL) >= 10

9
crc/crc64_iso_refl_by16_10.asm
View File

@ -41,8 +41,6 @@
%define FUNCTION_NAME crc64_iso_refl_by16_10
%endif
%if (AS_FEATURE_LEVEL) >= 10
%define fetch_dist 1024
[bits 64]
@ -474,10 +472,3 @@ dq 0x0706050403020100, 0x000e0d0c0b0a0908
mask: dq 0xFFFFFFFFFFFFFFFF, 0x0000000000000000
mask2: dq 0xFFFFFFFF00000000, 0xFFFFFFFFFFFFFFFF
mask3: dq 0x8080808080808080, 0x8080808080808080
%else ; Assembler doesn't understand these opcodes. Add empty symbol for windows.
%ifidn __OUTPUT_FORMAT__, win64
global no_ %+ FUNCTION_NAME
no_ %+ FUNCTION_NAME %+ :
%endif
%endif ; (AS_FEATURE_LEVEL) >= 10

2
crc/crc64_multibinary.asm
View File

@ -61,7 +61,6 @@ extern crc64_rocksoft_refl_base
extern crc64_rocksoft_norm_by8
extern crc64_rocksoft_norm_base
%if (AS_FEATURE_LEVEL) >= 10
extern crc64_iso_refl_by16_10
extern crc64_iso_norm_by16_10
extern crc64_jones_refl_by16_10
@ -70,7 +69,6 @@ extern crc64_ecma_refl_by16_10
extern crc64_ecma_norm_by16_10
extern crc64_rocksoft_refl_by16_10
extern crc64_rocksoft_norm_by16_10
%endif
section .text

8
crc/crc_multibinary.asm
View File

@ -54,12 +54,10 @@ extern crc16_t10dif_copy_by4
extern crc16_t10dif_copy_by4_02
extern crc16_t10dif_copy_base
%if (AS_FEATURE_LEVEL) >= 10
extern crc32_gzip_refl_by16_10
extern crc32_ieee_by16_10
extern crc32_iscsi_by16_10
extern crc16_t10dif_by16_10
%endif
%include "multibinary.asm"
@ -121,7 +119,6 @@ crc32_iscsi_dispatch_init:
je .crc_iscsi_init_done
;; AVX/02 opt if available
%if AS_FEATURE_LEVEL >= 10
;; Test for AVX2
xor ecx, ecx
mov eax, 7
@ -141,7 +138,6 @@ crc32_iscsi_dispatch_init:
cmp ecx, FLAGS_CPUID7_ECX_AVX512_G2
lea rbx, [crc32_iscsi_by16_10 WRT_OPT] ; AVX512/10 opt
cmove rsi, rbx
%endif
.crc_iscsi_init_done:
mov [crc32_iscsi_dispatched], rsi
@ -202,7 +198,6 @@ crc32_ieee_dispatch_init:
je .crc_ieee_init_done
lea rsi, [crc32_ieee_02 WRT_OPT] ; AVX/02 opt
%if AS_FEATURE_LEVEL >= 10
;; Test for AVX2
xor ecx, ecx
mov eax, 7
@ -222,7 +217,6 @@ crc32_ieee_dispatch_init:
cmp ecx, FLAGS_CPUID7_ECX_AVX512_G2
lea rbx, [crc32_ieee_by16_10 WRT_OPT] ; AVX512/10 opt
cmove rsi, rbx
%endif
.crc_ieee_init_done:
mov [crc32_ieee_dispatched], rsi
@ -283,7 +277,6 @@ crc16_t10dif_dispatch_init:
je .t10dif_init_done
lea rsi, [crc16_t10dif_02 WRT_OPT] ; AVX/02 opt
%if AS_FEATURE_LEVEL >= 10
;; Test for AVX2
xor ecx, ecx
mov eax, 7
@ -303,7 +296,6 @@ crc16_t10dif_dispatch_init:
cmp ecx, FLAGS_CPUID7_ECX_AVX512_G2
lea rbx, [crc16_t10dif_by16_10 WRT_OPT] ; AVX512/10 opt
cmove rsi, rbx
%endif
.t10dif_init_done:
mov [crc16_t10dif_dispatched], rsi

14
doc/build.md
View File

@ -3,20 +3,12 @@
## Build tools
NASM: For x86-64 builds it is highly recommended to get an up-to-date version of
[nasm] that can understand the latest instruction sets. Building with an older
assembler version is often possible but the library may lack some function
versions for the best performance. For example, as a minimum, nasm v2.11.01
can be used to build a limited functionality library but it will not
include any function versions with AVX2, AVX512, or optimizations for many
processors before the assembler's build. The configure or make tools can run
tests to check the assembler's knowledge of new instructions and change build
defines. For autoconf builds, check the output of configure for full nasm
support as it includes the following lines.
[nasm] that can understand the latest instruction sets.
Minimum version of NASM is 2.14.01, supporting all the ISA needed for the library.
The configure or make tools can check for this minimum version.
checking for nasm... yes
checking for modern nasm... yes
checking for optional nasm AVX512 support... yes
checking for additional nasm AVX512 support... yes
If an appropriate nasm is not available from your distro, it is simple to build
from source or download an executable from [nasm].

7
erasure_code/ec_highlevel_func.c
View File

@ -141,8 +141,6 @@ ec_encode_data_avx2(int len, int k, int rows, unsigned char *g_tbls, unsigned ch
}
}
#ifdef HAVE_AS_KNOWS_AVX512
extern int
gf_vect_dot_prod_avx512(int len, int k, unsigned char *g_tbls, unsigned char **data,
unsigned char *dest);
@ -253,8 +251,6 @@ ec_encode_data_update_avx512(int len, int k, int rows, int vec_i, unsigned char
}
}
#if AS_FEATURE_LEVEL >= 10
extern void
gf_vect_dot_prod_avx512_gfni(int len, int k, unsigned char *g_tbls, unsigned char **data,
unsigned char *dest);
@ -447,9 +443,6 @@ ec_encode_data_update_avx2_gfni(int len, int k, int rows, int vec_i, unsigned ch
}
}
#endif // AS_FEATURE_LEVEL >= 10
#endif // HAVE_AS_KNOWS_AVX512
#if __WORDSIZE == 64 || _WIN64 || __x86_64__
void

14
erasure_code/ec_multibinary.asm
View File

@ -39,12 +39,10 @@
extern ec_encode_data_update_sse
extern ec_encode_data_update_avx
extern ec_encode_data_update_avx2
%ifdef HAVE_AS_KNOWS_AVX512
extern ec_encode_data_avx512
extern gf_vect_dot_prod_avx512
extern ec_encode_data_update_avx512
extern gf_vect_mad_avx512
%endif
extern gf_vect_mul_sse
extern gf_vect_mul_avx
@ -53,13 +51,11 @@
extern gf_vect_mad_avx2
%endif
%if (AS_FEATURE_LEVEL) >= 10
extern ec_init_tables_gfni
extern ec_encode_data_avx512_gfni
extern ec_encode_data_avx2_gfni
extern ec_encode_data_update_avx512_gfni
extern ec_encode_data_update_avx2_gfni
%endif
extern ec_init_tables_gfni
extern ec_encode_data_avx512_gfni
extern ec_encode_data_avx2_gfni
extern ec_encode_data_update_avx512_gfni
extern ec_encode_data_update_avx2_gfni
extern ec_init_tables_base

3
erasure_code/gf_2vect_dot_prod_avx2_gfni.asm
View File

@ -35,8 +35,6 @@
%include "gf_vect_gfni.inc"
%include "memcpy.asm"
%if AS_FEATURE_LEVEL >= 10
%ifidn __OUTPUT_FORMAT__, elf64
%define arg0 rdi
%define arg1 rsi
@ -359,4 +357,3 @@ func(gf_2vect_dot_prod_avx2_gfni)
ret
endproc_frame
%endif ; if AS_FEATURE_LEVEL >= 10

9
erasure_code/gf_2vect_dot_prod_avx512.asm
View File

@ -33,8 +33,6 @@
%include "reg_sizes.asm"
%ifdef HAVE_AS_KNOWS_AVX512
%ifidn __OUTPUT_FORMAT__, elf64
%define arg0 rdi
%define arg1 rsi
@ -222,10 +220,3 @@ func(gf_2vect_dot_prod_avx512)
ret
endproc_frame
%else
%ifidn __OUTPUT_FORMAT__, win64
global no_gf_2vect_dot_prod_avx512
no_gf_2vect_dot_prod_avx512:
%endif
%endif ; ifdef HAVE_AS_KNOWS_AVX512

3
erasure_code/gf_2vect_dot_prod_avx512_gfni.asm
View File

@ -34,8 +34,6 @@
%include "reg_sizes.asm"
%include "gf_vect_gfni.inc"
%if AS_FEATURE_LEVEL >= 10
%ifidn __OUTPUT_FORMAT__, elf64
%define arg0 rdi
%define arg1 rsi
@ -206,4 +204,3 @@ func(gf_2vect_dot_prod_avx512_gfni)
ret
endproc_frame
%endif ; if AS_FEATURE_LEVEL >= 10

3
erasure_code/gf_2vect_mad_avx2_gfni.asm
View File

@ -35,8 +35,6 @@
%include "gf_vect_gfni.inc"
%include "memcpy.asm"
%if AS_FEATURE_LEVEL >= 10
%ifidn __OUTPUT_FORMAT__, elf64
%define arg0 rdi
%define arg1 rsi
@ -295,4 +293,3 @@ func(gf_2vect_mad_avx2_gfni)
ret
endproc_frame
%endif ; if AS_FEATURE_LEVEL >= 10

9
erasure_code/gf_2vect_mad_avx512.asm
View File

@ -33,8 +33,6 @@
%include "reg_sizes.asm"
%ifdef HAVE_AS_KNOWS_AVX512
%ifidn __OUTPUT_FORMAT__, elf64
%define arg0 rdi
%define arg1 rsi
@ -221,10 +219,3 @@ func(gf_2vect_mad_avx512)
ret
endproc_frame
%else
%ifidn __OUTPUT_FORMAT__, win64
global no_gf_2vect_mad_avx512
no_gf_2vect_mad_avx512:
%endif
%endif ; ifdef HAVE_AS_KNOWS_AVX512

3
erasure_code/gf_2vect_mad_avx512_gfni.asm
View File

@ -34,8 +34,6 @@
%include "reg_sizes.asm"
%include "gf_vect_gfni.inc"
%if AS_FEATURE_LEVEL >= 10
%ifidn __OUTPUT_FORMAT__, elf64
%define arg0 rdi
%define arg1 rsi
@ -186,4 +184,3 @@ func(gf_2vect_mad_avx512_gfni)
ret
endproc_frame
%endif ; if AS_FEATURE_LEVEL >= 10

3
erasure_code/gf_3vect_dot_prod_avx2_gfni.asm
View File

@ -35,8 +35,6 @@
%include "gf_vect_gfni.inc"
%include "memcpy.asm"
%if AS_FEATURE_LEVEL >= 10
%ifidn __OUTPUT_FORMAT__, elf64
%define arg0 rdi
%define arg1 rsi
@ -332,4 +330,3 @@ func(gf_3vect_dot_prod_avx2_gfni)
ret
endproc_frame
%endif ; if AS_FEATURE_LEVEL >= 10

9
erasure_code/gf_3vect_dot_prod_avx512.asm
View File

@ -33,8 +33,6 @@
%include "reg_sizes.asm"
%ifdef HAVE_AS_KNOWS_AVX512
%ifidn __OUTPUT_FORMAT__, elf64
%define arg0 rdi
%define arg1 rsi
@ -251,10 +249,3 @@ func(gf_3vect_dot_prod_avx512)
ret
endproc_frame
%else
%ifidn __OUTPUT_FORMAT__, win64
global no_gf_3vect_dot_prod_avx512
no_gf_3vect_dot_prod_avx512:
%endif
%endif ; ifdef HAVE_AS_KNOWS_AVX512

3
erasure_code/gf_3vect_dot_prod_avx512_gfni.asm
View File

@ -34,8 +34,6 @@
%include "reg_sizes.asm"
%include "gf_vect_gfni.inc"
%if AS_FEATURE_LEVEL >= 10
%ifidn __OUTPUT_FORMAT__, elf64
%define arg0 rdi
%define arg1 rsi
@ -222,4 +220,3 @@ func(gf_3vect_dot_prod_avx512_gfni)
ret
endproc_frame
%endif ; if AS_FEATURE_LEVEL >= 10

5
erasure_code/gf_3vect_mad_avx2_gfni.asm
View File

@ -1,5 +1,3 @@
;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
; Copyright(c) 2023 Intel Corporation All rights reserved.
;
; Redistribution and use in source and binary forms, with or without
; modification, are permitted provided that the following conditions
@ -35,8 +33,6 @@
%include "gf_vect_gfni.inc"
%include "memcpy.asm"
%if AS_FEATURE_LEVEL >= 10
%ifidn __OUTPUT_FORMAT__, elf64
%define arg0 rdi
%define arg1 rsi
@ -273,4 +269,3 @@ func(gf_3vect_mad_avx2_gfni)
ret
endproc_frame
%endif ; if AS_FEATURE_LEVEL >= 10

9
erasure_code/gf_3vect_mad_avx512.asm
View File

@ -33,8 +33,6 @@
%include "reg_sizes.asm"
%ifdef HAVE_AS_KNOWS_AVX512
%ifidn __OUTPUT_FORMAT__, elf64
%define arg0 rdi
%define arg1 rsi
@ -238,10 +236,3 @@ func(gf_3vect_mad_avx512)
ret
endproc_frame
%else
%ifidn __OUTPUT_FORMAT__, win64
global no_gf_3vect_mad_avx512
no_gf_3vect_mad_avx512:
%endif
%endif ; ifdef HAVE_AS_KNOWS_AVX512

3
erasure_code/gf_3vect_mad_avx512_gfni.asm
View File

@ -34,8 +34,6 @@
%include "reg_sizes.asm"
%include "gf_vect_gfni.inc"
%if AS_FEATURE_LEVEL >= 10
%ifidn __OUTPUT_FORMAT__, elf64
%define arg0 rdi
%define arg1 rsi
@ -201,4 +199,3 @@ func(gf_3vect_mad_avx512_gfni)
ret
endproc_frame
%endif ; if AS_FEATURE_LEVEL >= 10

9
erasure_code/gf_4vect_dot_prod_avx512.asm
View File

@ -33,8 +33,6 @@
%include "reg_sizes.asm"
%ifdef HAVE_AS_KNOWS_AVX512
%ifidn __OUTPUT_FORMAT__, elf64
%define arg0 rdi
%define arg1 rsi
@ -291,10 +289,3 @@ func(gf_4vect_dot_prod_avx512)
ret
endproc_frame
%else
%ifidn __OUTPUT_FORMAT__, win64
global no_gf_4vect_dot_prod_avx512
no_gf_4vect_dot_prod_avx512:
%endif
%endif ; ifdef HAVE_AS_KNOWS_AVX512

3
erasure_code/gf_4vect_dot_prod_avx512_gfni.asm
View File

@ -34,8 +34,6 @@
%include "reg_sizes.asm"
%include "gf_vect_gfni.inc"
%if AS_FEATURE_LEVEL >= 10
%ifidn __OUTPUT_FORMAT__, elf64
%define arg0 rdi
%define arg1 rsi
@ -250,4 +248,3 @@ func(gf_4vect_dot_prod_avx512_gfni)
ret
endproc_frame
%endif ; if AS_FEATURE_LEVEL >= 10

3
erasure_code/gf_4vect_mad_avx2_gfni.asm
View File

@ -35,8 +35,6 @@
%include "gf_vect_gfni.inc"
%include "memcpy.asm"
%if AS_FEATURE_LEVEL >= 10
%ifidn __OUTPUT_FORMAT__, elf64
%define arg0 rdi
%define arg1 rsi
@ -236,4 +234,3 @@ func(gf_4vect_mad_avx2_gfni)
ret
endproc_frame
%endif ; if AS_FEATURE_LEVEL >= 10

9
erasure_code/gf_4vect_mad_avx512.asm
View File

@ -33,8 +33,6 @@
%include "reg_sizes.asm"
%ifdef HAVE_AS_KNOWS_AVX512
%ifidn __OUTPUT_FORMAT__, elf64
%define arg0 rdi
%define arg1 rsi
@ -258,10 +256,3 @@ func(gf_4vect_mad_avx512)
ret
endproc_frame
%else
%ifidn __OUTPUT_FORMAT__, win64
global no_gf_4vect_mad_avx512
no_gf_4vect_mad_avx512:
%endif
%endif ; ifdef HAVE_AS_KNOWS_AVX512

3
erasure_code/gf_4vect_mad_avx512_gfni.asm
View File

@ -34,8 +34,6 @@
%include "reg_sizes.asm"
%include "gf_vect_gfni.inc"
%if AS_FEATURE_LEVEL >= 10
%ifidn __OUTPUT_FORMAT__, elf64
%define arg0 rdi
%define arg1 rsi
@ -220,4 +218,3 @@ func(gf_4vect_mad_avx512_gfni)
ret
endproc_frame
%endif ; if AS_FEATURE_LEVEL >= 10

9
erasure_code/gf_5vect_dot_prod_avx512.asm
View File

@ -33,8 +33,6 @@
%include "reg_sizes.asm"
%ifdef HAVE_AS_KNOWS_AVX512
%ifidn __OUTPUT_FORMAT__, elf64
%define arg0 rdi
%define arg1 rsi
@ -325,10 +323,3 @@ func(gf_5vect_dot_prod_avx512)
ret
endproc_frame
%else
%ifidn __OUTPUT_FORMAT__, win64
global no_gf_5vect_dot_prod_avx512
no_gf_5vect_dot_prod_avx512:
%endif
%endif ; ifdef HAVE_AS_KNOWS_AVX512

3
erasure_code/gf_5vect_dot_prod_avx512_gfni.asm
View File

@ -34,8 +34,6 @@
%include "reg_sizes.asm"
%include "gf_vect_gfni.inc"
%if AS_FEATURE_LEVEL >= 10
%ifidn __OUTPUT_FORMAT__, elf64
%define arg0 rdi
%define arg1 rsi
@ -272,4 +270,3 @@ func(gf_5vect_dot_prod_avx512_gfni)
ret
endproc_frame
%endif ; if AS_FEATURE_LEVEL >= 10

3
erasure_code/gf_5vect_mad_avx2_gfni.asm
View File

@ -35,8 +35,6 @@
%include "gf_vect_gfni.inc"
%include "memcpy.asm"
%if AS_FEATURE_LEVEL >= 10
%ifidn __OUTPUT_FORMAT__, elf64
%define arg0 rdi
%define arg1 rsi
@ -262,4 +260,3 @@ func(gf_5vect_mad_avx2_gfni)
ret
endproc_frame
%endif ; if AS_FEATURE_LEVEL >= 10

9
erasure_code/gf_5vect_mad_avx512.asm
View File

@ -33,8 +33,6 @@
%include "reg_sizes.asm"
%ifdef HAVE_AS_KNOWS_AVX512
%ifidn __OUTPUT_FORMAT__, elf64
%define arg0 rdi
%define arg1 rsi
@ -278,10 +276,3 @@ func(gf_5vect_mad_avx512)
ret
endproc_frame
%else
%ifidn __OUTPUT_FORMAT__, win64
global no_gf_5vect_mad_avx512
no_gf_5vect_mad_avx512:
%endif
%endif ; ifdef HAVE_AS_KNOWS_AVX512

3
erasure_code/gf_5vect_mad_avx512_gfni.asm
View File

@ -34,8 +34,6 @@
%include "reg_sizes.asm"
%include "gf_vect_gfni.inc"
%if AS_FEATURE_LEVEL >= 10
%ifidn __OUTPUT_FORMAT__, elf64
%define arg0 rdi
%define arg1 rsi
@ -237,4 +235,3 @@ func(gf_5vect_mad_avx512_gfni)
ret
endproc_frame
%endif ; if AS_FEATURE_LEVEL >= 10

9
erasure_code/gf_6vect_dot_prod_avx512.asm
View File

@ -33,8 +33,6 @@
%include "reg_sizes.asm"
%ifdef HAVE_AS_KNOWS_AVX512
%ifidn __OUTPUT_FORMAT__, elf64
%define arg0 rdi
%define arg1 rsi
@ -344,10 +342,3 @@ func(gf_6vect_dot_prod_avx512)
ret
endproc_frame
%else
%ifidn __OUTPUT_FORMAT__, win64
global no_gf_6vect_dot_prod_avx512
no_gf_6vect_dot_prod_avx512:
%endif
%endif ; ifdef HAVE_AS_KNOWS_AVX512

3
erasure_code/gf_6vect_dot_prod_avx512_gfni.asm
View File

@ -34,8 +34,6 @@
%include "reg_sizes.asm"
%include "gf_vect_gfni.inc"
%if AS_FEATURE_LEVEL >= 10
%ifidn __OUTPUT_FORMAT__, elf64
%define arg0 rdi
%define arg1 rsi
@ -289,4 +287,3 @@ func(gf_6vect_dot_prod_avx512_gfni)
ret
endproc_frame
%endif ; if AS_FEATURE_LEVEL >= 10

9
erasure_code/gf_6vect_mad_avx512.asm
View File

@ -33,8 +33,6 @@
%include "reg_sizes.asm"
%ifdef HAVE_AS_KNOWS_AVX512
%ifidn __OUTPUT_FORMAT__, elf64
%define arg0 rdi
%define arg1 rsi
@ -312,10 +310,3 @@ func(gf_6vect_mad_avx512)
ret
endproc_frame
%else
%ifidn __OUTPUT_FORMAT__, win64
global no_gf_6vect_mad_avx512
no_gf_6vect_mad_avx512:
%endif
%endif ; ifdef HAVE_AS_KNOWS_AVX512

3
erasure_code/gf_6vect_mad_avx512_gfni.asm
View File

@ -34,8 +34,6 @@
%include "reg_sizes.asm"
%include "gf_vect_gfni.inc"
%if AS_FEATURE_LEVEL >= 10
%ifidn __OUTPUT_FORMAT__, elf64
%define arg0 rdi
%define arg1 rsi
@ -256,4 +254,3 @@ func(gf_6vect_mad_avx512_gfni)
ret
endproc_frame
%endif ; if AS_FEATURE_LEVEL >= 10

3
erasure_code/gf_vect_dot_prod_avx2_gfni.asm
View File

@ -35,8 +35,6 @@
%include "gf_vect_gfni.inc"
%include "memcpy.asm"
%if AS_FEATURE_LEVEL >= 10
%ifidn __OUTPUT_FORMAT__, elf64
%define arg0 rdi
%define arg1 rsi
@ -315,4 +313,3 @@ func(gf_vect_dot_prod_avx2_gfni)
ret
endproc_frame
%endif ; if AS_FEATURE_LEVEL >= 10

9
erasure_code/gf_vect_dot_prod_avx512.asm
View File

@ -33,8 +33,6 @@
%include "reg_sizes.asm"
%ifdef HAVE_AS_KNOWS_AVX512
%ifidn __OUTPUT_FORMAT__, elf64
%define arg0 rdi
%define arg1 rsi
@ -231,10 +229,3 @@ func(gf_vect_dot_prod_avx512)
ret
endproc_frame
%else
%ifidn __OUTPUT_FORMAT__, win64
global no_gf_vect_dot_prod_avx512
no_gf_vect_dot_prod_avx512:
%endif
%endif ; ifdef HAVE_AS_KNOWS_AVX512

3
erasure_code/gf_vect_dot_prod_avx512_gfni.asm
View File

@ -34,8 +34,6 @@
%include "reg_sizes.asm"
%include "gf_vect_gfni.inc"
%if AS_FEATURE_LEVEL >= 10
%ifidn __OUTPUT_FORMAT__, elf64
%define arg0 rdi
%define arg1 rsi
@ -187,4 +185,3 @@ func(gf_vect_dot_prod_avx512_gfni)
ret
endproc_frame
%endif ; if AS_FEATURE_LEVEL >= 10

3
erasure_code/gf_vect_mad_avx2_gfni.asm
View File

@ -35,8 +35,6 @@
%include "gf_vect_gfni.inc"
%include "memcpy.asm"
%if AS_FEATURE_LEVEL >= 10
%ifidn __OUTPUT_FORMAT__, elf64
%define arg0 rdi
%define arg1 rsi
@ -252,4 +250,3 @@ func(gf_vect_mad_avx2_gfni)
ret
endproc_frame
%endif ; if AS_FEATURE_LEVEL >= 10

9
erasure_code/gf_vect_mad_avx512.asm
View File

@ -33,8 +33,6 @@
%include "reg_sizes.asm"
%ifdef HAVE_AS_KNOWS_AVX512
%ifidn __OUTPUT_FORMAT__, elf64
%define arg0 rdi
%define arg1 rsi
@ -184,10 +182,3 @@ func(gf_vect_mad_avx512)
ret
endproc_frame
%else
%ifidn __OUTPUT_FORMAT__, win64
global no_gf_vect_mad_avx512
no_gf_vect_mad_avx512:
%endif
%endif ; ifdef HAVE_AS_KNOWS_AVX512

3
erasure_code/gf_vect_mad_avx512_gfni.asm
View File

@ -34,8 +34,6 @@
%include "reg_sizes.asm"
%include "gf_vect_gfni.inc"
%if AS_FEATURE_LEVEL >= 10
%ifidn __OUTPUT_FORMAT__, elf64
%define arg0 rdi
%define arg1 rsi
@ -172,4 +170,3 @@ func(gf_vect_mad_avx512_gfni)
ret
endproc_frame
%endif ; if AS_FEATURE_LEVEL >= 10

4
igzip/encode_df_06.asm
View File

@ -32,8 +32,6 @@
%include "data_struct2.asm"
%include "stdmac.asm"
%ifdef HAVE_AS_KNOWS_AVX512
%define ARCH 06
%define USE_HSWNI
@ -620,5 +618,3 @@ k_mask_2: dq 0xfffffff0
k_mask_3: dq 0xfffffffc
k_mask_4: dw 0x0101, 0x0101, 0x0101, 0x0101
k_mask_5: dq 0xfffffffe
%endif

2
igzip/igzip_gen_icf_map_lh1_06.asm
View File

@ -36,7 +36,6 @@
%define USE_HSWNI
%define ARCH 06
%ifdef HAVE_AS_KNOWS_AVX512
%ifidn __OUTPUT_FORMAT__, win64
%define arg1 rcx
%define arg2 rdx
@ -578,4 +577,3 @@ lit_len_mask:
dd LIT_LEN_MASK
shortest_matches:
dd MIN_DEF_MATCH
%endif

2
igzip/igzip_multibinary.asm
View File

@ -61,11 +61,9 @@ extern encode_deflate_icf_04
extern set_long_icf_fg_base
extern set_long_icf_fg_04
%ifdef HAVE_AS_KNOWS_AVX512
extern encode_deflate_icf_06
extern set_long_icf_fg_06
extern gen_icf_map_lh1_06
%endif
extern adler32_base
extern adler32_avx2_4

2
igzip/igzip_set_long_icf_fg_06.asm
View File

@ -33,7 +33,6 @@
%include "igzip_compare_types.asm"
%define NEQ 4
%ifdef HAVE_AS_KNOWS_AVX512
%ifidn __OUTPUT_FORMAT__, win64
%define arg1 rcx
%define arg2 rdx
@ -369,4 +368,3 @@ twosixtytwo:
dd 0x106
nlen_mask:
dd 0xfffffc00
%endif

22
include/multibinary.asm
View File

@ -50,10 +50,6 @@
%define mbin_rdx rdx
%endif
%ifndef AS_FEATURE_LEVEL
%define AS_FEATURE_LEVEL 4
%endif
;;;;
; multibinary macro:
; creates the visible entry point that uses HW optimized call pointer
@ -191,7 +187,6 @@
je _%1_init_done
lea mbin_rsi, [%4 WRT_OPT] ; AVX/02 opt
%if AS_FEATURE_LEVEL >= 10
;; Test for AVX2
xor ecx, ecx
mov eax, 7
@ -211,7 +206,6 @@
cmp ecx, FLAGS_CPUID7_ECX_AVX512_G2
lea mbin_rbx, [%5 WRT_OPT] ; AVX512/10 opt
cmove mbin_rsi, mbin_rbx
%endif
_%1_init_done:
pop mbin_rdi
pop mbin_rdx
@ -280,7 +274,6 @@
ret
%endmacro
%if AS_FEATURE_LEVEL >= 6
;;;;;
; mbin_dispatch_init6 parameters
; 1-> function name
@ -350,13 +343,6 @@
ret
%endmacro
%else
%macro mbin_dispatch_init6 6
mbin_dispatch_init5 %1, %2, %3, %4, %5
%endmacro
%endif
%if AS_FEATURE_LEVEL >= 10
;;;;;
; mbin_dispatch_init7 parameters
; 1-> function name
@ -515,13 +501,5 @@
pop mbin_rsi
ret
%endmacro
%else
%macro mbin_dispatch_init7 7
mbin_dispatch_init6 %1, %2, %3, %4, %5, %6
%endmacro
%macro mbin_dispatch_init8 8
mbin_dispatch_init6 %1, %2, %3, %4, %5, %6
%endmacro
%endif
%endif ; ifndef _MULTIBINARY_ASM_

6
include/reg_sizes.asm
View File

@ -30,10 +30,6 @@
%ifndef _REG_SIZES_ASM_
%define _REG_SIZES_ASM_
%ifndef AS_FEATURE_LEVEL
%define AS_FEATURE_LEVEL 4
%endif
%define EFLAGS_HAS_CPUID (1<<21)
%define FLAG_CPUID1_ECX_CLMUL (1<<1)
%define FLAG_CPUID1_EDX_SSE2 (1<<26)
@ -198,7 +194,6 @@
%ifdef INTEL_CET_ENABLED
%ifdef __NASM_VER__
%if AS_FEATURE_LEVEL >= 10
%ifidn __OUTPUT_FORMAT__,elf32
section .note.gnu.property note alloc noexec align=4
DD 0x00000004,0x0000000c,0x00000005,0x00554e47
@ -209,7 +204,6 @@ section .note.gnu.property note alloc noexec align=8
DD 0x00000004,0x00000010,0x00000005,0x00554e47
DD 0xc0000002,0x00000004,0x00000003,0x00000000
%endif
%endif
%endif
%endif

20
make.inc
View File

@ -179,26 +179,6 @@ $(all_llvm_fuzz_tests): % : %.o $(lib_name)
$(CXX) $(CXXFLAGS) $^ $(LDLIBS) $(FUZZLINK) -o $@
# Check for modern as
test-as = $(shell hash printf && printf $(3) > $(2) && $(AS) $(ASFLAGS) ${tmpf} -o /dev/null 2> /dev/null && echo $(1) || echo $(4))
as_4 := "pblendvb xmm2, xmm1;"
as_6 := "vinserti32x8 zmm0, ymm1, 1;"
as_10 := "vpcompressb zmm0 {k1}, zmm1;"
tmpf := $(shell mktemp)
as_feature_level := $(call test-as, 4, $(tmpf), $(as_4), $(as_feature_level))
as_feature_level := $(call test-as, 6, $(tmpf), $(as_6), $(as_feature_level))
as_feature_level := $(call test-as, 10, $(tmpf), $(as_10), $(as_feature_level))
tmpf := $(shell rm ${tmpf})
ifneq ($(findstring $(as_feature_level),6 10),)
D_HAVE_AS_KNOWS_AVX512_y := -DHAVE_AS_KNOWS_AVX512
endif
CFLAGS += -DAS_FEATURE_LEVEL=$(as_feature_level) $(D_HAVE_AS_KNOWS_AVX512_y)
ASFLAGS += -DAS_FEATURE_LEVEL=$(as_feature_level) $(D_HAVE_AS_KNOWS_AVX512_y)
# Check for pthreads
ifeq ($(arch),mingw)
have_threads ?= y

4
mem/mem_multibinary.asm
View File

@ -33,9 +33,7 @@
default rel
[bits 64]
%ifdef HAVE_AS_KNOWS_AVX512
extern mem_zero_detect_avx512
%endif
extern mem_zero_detect_avx512
extern mem_zero_detect_avx2
extern mem_zero_detect_avx
extern mem_zero_detect_sse

3
mem/mem_zero_detect_avx2.asm
View File

@ -67,11 +67,8 @@
%define tmp0 arg2
%define tmp1 arg3
; Workaround for YASM
%ifdef HAVE_AS_KNOWS_AVX512
%use smartalign
ALIGNMODE P6
%endif
default rel

4
mem/mem_zero_detect_avx512.asm
View File

@ -29,8 +29,6 @@
%include "reg_sizes.asm"
%ifdef HAVE_AS_KNOWS_AVX512
%ifidn __OUTPUT_FORMAT__, elf64
%define arg0 rdi
%define arg1 rsi
@ -142,5 +140,3 @@ align 16
endproc_frame
%endif ; ifdef HAVE_AS_KNOWS_AVX512

4
raid/pq_gen_avx2_gfni.asm
View File

@ -37,8 +37,6 @@
%include "reg_sizes.asm"
%ifdef HAVE_AS_KNOWS_AVX512
%ifidn __OUTPUT_FORMAT__, elf64
%define arg0 rdi
%define arg1 rsi
@ -230,5 +228,3 @@ return_fail:
ret
endproc_frame
%endif ; ifdef HAVE_AS_KNOWS_AVX512

4
raid/pq_gen_avx512.asm
View File

@ -37,8 +37,6 @@
%include "reg_sizes.asm"
%ifdef HAVE_AS_KNOWS_AVX512
%ifidn __OUTPUT_FORMAT__, elf64
%define arg0 rdi
%define arg1 rsi
@ -231,5 +229,3 @@ return_fail:
ret
endproc_frame
%endif ; ifdef HAVE_AS_KNOWS_AVX512

4
raid/pq_gen_avx512_gfni.asm
View File

@ -37,8 +37,6 @@
%include "reg_sizes.asm"
%ifdef HAVE_AS_KNOWS_AVX512
%ifidn __OUTPUT_FORMAT__, elf64
%define arg0 rdi
%define arg1 rsi
@ -234,5 +232,3 @@ return_fail:
ret
endproc_frame
%endif ; ifdef HAVE_AS_KNOWS_AVX512

12
raid/raid_multibinary.asm
View File

@ -48,15 +48,11 @@ extern pq_check_sse
extern xor_check_base
extern xor_check_sse
%ifdef HAVE_AS_KNOWS_AVX512
extern xor_gen_avx512
extern pq_gen_avx512
%endif
extern xor_gen_avx512
extern pq_gen_avx512
%if (AS_FEATURE_LEVEL) >= 10
extern pq_gen_avx512_gfni
extern pq_gen_avx2_gfni
%endif
extern pq_gen_avx512_gfni
extern pq_gen_avx2_gfni
mbin_interface xor_gen
mbin_interface pq_gen

4
raid/xor_gen_avx512.asm
View File

@ -36,8 +36,6 @@
%include "reg_sizes.asm"
%ifdef HAVE_AS_KNOWS_AVX512
%ifidn __OUTPUT_FORMAT__, elf64
%define arg0 rdi
%define arg1 rsi
@ -213,5 +211,3 @@ return_fail:
ret
endproc_frame
%endif ; ifdef HAVE_AS_KNOWS_AVX512

6
tools/gen_nmake.mk
View File

@ -19,13 +19,11 @@ Makefile.nmake tst.nmake: FORCE
@echo '' >> $@
@echo '' >> $@
@echo 'INCLUDES = $(INCLUDE)' >> $@
@echo '# Modern asm feature level, consider upgrading nasm before decreasing feature_level' >> $@
@echo 'FEAT_FLAGS = -DHAVE_AS_KNOWS_AVX512 -DAS_FEATURE_LEVEL=10' >> $@
@echo 'CFLAGS_REL = -O2 -DNDEBUG /Z7 /Gy' >> $@
@echo 'CFLAGS_DBG = -Od -DDEBUG /Z7' >> $@
@echo 'LINKFLAGS = -nologo -incremental:no -debug' >> $@
@echo 'CFLAGS = $$(CFLAGS_REL) -nologo -D_USE_MATH_DEFINES $$(FEAT_FLAGS) $$(INCLUDES) $$(D)' >> $@
@echo 'AFLAGS = -f win64 $$(FEAT_FLAGS) $$(INCLUDES) $$(D)' >> $@
@echo 'CFLAGS = $$(CFLAGS_REL) -nologo -D_USE_MATH_DEFINES $$(INCLUDES) $$(D)' >> $@
@echo 'AFLAGS = -f win64 $$(INCLUDES) $$(D)' >> $@
@echo 'CC = cl' >> $@
@echo '# or CC = icl -Qstd=c99' >> $@
@echo 'AS = nasm' >> $@