mirror of
https://github.com/intel/isa-l.git
synced 2025-12-10 09:44:33 +01:00
@@ -26,6 +26,7 @@
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(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
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OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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**********************************************************************/
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#if HAVE_RVV
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.option arch, +v
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.global adler32_rvv
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.type adler32_rvv, %function
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@@ -74,3 +75,4 @@ adler32_rvv:
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add a0, t2, t3 // a0 = A + B
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ret
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#endif
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@@ -29,7 +29,11 @@
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#include "riscv64_multibinary.h"
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mbin_interface isal_adler32
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#if HAVE_RVV
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mbin_interface isal_adler32
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#else
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mbin_interface_base isal_adler32, adler32_base
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#endif
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mbin_interface_base gen_icf_map_lh1, gen_icf_map_h1_base
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mbin_interface_base decode_huffman_code_block_stateless, decode_huffman_code_block_stateless_base
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@@ -30,9 +30,11 @@
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DEFINE_INTERFACE_DISPATCHER(isal_adler32)
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{
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#if HAVE_RVV
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const unsigned long hwcap = getauxval(AT_HWCAP);
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if (hwcap & HWCAP_RV('V'))
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return PROVIDER_INFO(adler32_rvv);
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else
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#endif
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return PROVIDER_BASIC(adler32);
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}
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