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Reduce the number of registers used in MIPS optimizations.

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This change is needed by ChromeOS as it introduces -fno-omit-frame-pointer
flag (see code.google.com/p/chromium/issues/detail?id=477749). This causes
compile error for MIPS, as some MIPS optimization blocks use maximum possible
number of available registers.
Also, this change contains minor GN build fix for MIPS platform regarding the
pitch_filter_mips.c / pitch_filter_c.c file inclusion.

BUG=477749
R=andrew@webrtc.org, djordje.pesut@imgtec.com, tina.legrand@webrtc.org

Review URL: https://webrtc-codereview.appspot.com/48139004

Patch from Ljubomir Papuga <lpapuga@mips.com>.

Cr-Commit-Position: refs/heads/master@{#9047}
This commit is contained in:
Ljubomir Papuga
2015-04-21 16:52:45 -07:00
committed by Andrew MacDonald
parent bbf7c864ad
commit 8f85dbcce4
2 changed files with 33 additions and 22 deletions
Download Patch File Download Diff File Expand all files Collapse all files

21
webrtc/modules/audio_coding/BUILD.gn
View File

@@ -498,7 +498,9 @@ source_set("isacfix") {
"codecs/isac/fix/source/lpc_tables.h",
"codecs/isac/fix/source/pitch_estimator.c",
"codecs/isac/fix/source/pitch_estimator.h",
"codecs/isac/fix/source/pitch_estimator_c.c",
"codecs/isac/fix/source/pitch_filter.c",
"codecs/isac/fix/source/pitch_filter_c.c",
"codecs/isac/fix/source/pitch_gain_tables.c",
"codecs/isac/fix/source/pitch_gain_tables.h",
"codecs/isac/fix/source/pitch_lag_tables.c",
@@ -546,8 +548,9 @@ source_set("isacfix") {
"codecs/isac/fix/source/lattice_armv7.S",
"codecs/isac/fix/source/pitch_filter_armv6.S",
]
} else {
sources += [ "codecs/isac/fix/source/pitch_filter_c.c" ]
sources -= [
"codecs/isac/fix/source/pitch_filter_c.c",
]
}
if (current_cpu == "mipsel") {
@@ -558,19 +561,23 @@ source_set("isacfix") {
"codecs/isac/fix/source/pitch_estimator_mips.c",
"codecs/isac/fix/source/transform_mips.c",
]
sources -= [
"codecs/isac/fix/source/pitch_estimator_c.c"
]
if (mips_dsp_rev > 0) {
sources += [ "codecs/isac/fix/source/filterbanks_mips.c" ]
sources += [
"codecs/isac/fix/source/filterbanks_mips.c"
]
}
if (mips_dsp_rev > 1) {
sources += [
"codecs/isac/fix/source/lpc_masking_model_mips.c",
"codecs/isac/fix/source/pitch_filter_mips.c",
]
} else {
sources += [ "codecs/isac/fix/source/pitch_filter_c.c" ]
sources -= [
"codecs/isac/fix/source/pitch_filter_c.c"
]
}
} else {
sources += [ "codecs/isac/fix/source/pitch_estimator_c.c" ]
}
if (!rtc_build_armv7_neon && current_cpu != "mipsel") {

34
webrtc/modules/audio_coding/codecs/isac/fix/source/transform_mips.c
View File

@@ -606,7 +606,7 @@ void WebRtcIsacfix_Spec2TimeMIPS(int16_t *inreQ7,
int32_t* outre2;
int16_t* cosptr = (int16_t*)WebRtcIsacfix_kCosTab2;
int16_t* sinptr = (int16_t*)WebRtcIsacfix_kSinTab2;
int32_t r0, r1, r2, r3, r4, r5, r6, r7, r8, r9, r10, max, max1;
int32_t r0, r1, r2, r3, r4, r5, r6, r7, r8, r9, max, max1;
#if defined(MIPS_DSP_R1_LE)
int32_t offset = FRAMESAMPLES - 4;
#else // #if defined(MIPS_DSP_R1_LE)
@@ -658,14 +658,14 @@ void WebRtcIsacfix_Spec2TimeMIPS(int16_t *inreQ7,
"subu %[r9], %[r9], %[r8] \n\t"
"subu %[r7], %[r6], %[r9] \n\t"
"addu %[r6], %[r6], %[r9] \n\t"
"sll %[r10], %[offset], 1 \n\t"
"addu %[r10], %[outre1], %[r10] \n\t"
"sw %[r7], 0(%[outre1]) \n\t"
"absq_s.w %[r7], %[r7] \n\t"
"sw %[r6], 4(%[r10]) \n\t"
"absq_s.w %[r6], %[r6] \n\t"
"slt %[r8], %[max], %[r7] \n\t"
"movn %[max], %[r7], %[r8] \n\t"
"sll %[r7], %[offset], 1 \n\t"
"addu %[r7], %[outre1], %[r7] \n\t"
"sw %[r6], 4(%[r7]) \n\t"
"absq_s.w %[r6], %[r6] \n\t"
"slt %[r8], %[max], %[r6] \n\t"
"movn %[max], %[r6], %[r8] \n\t"
"muleq_s.w.phl %[r6], %[r0], %[r2] \n\t"
@@ -682,10 +682,12 @@ void WebRtcIsacfix_Spec2TimeMIPS(int16_t *inreQ7,
"addu %[r6], %[r6], %[r9] \n\t"
"sw %[r7], 4(%[outre1]) \n\t"
"absq_s.w %[r7], %[r7] \n\t"
"sw %[r6], 0(%[r10]) \n\t"
"absq_s.w %[r6], %[r6] \n\t"
"slt %[r8], %[max], %[r7] \n\t"
"movn %[max], %[r7], %[r8] \n\t"
"sll %[r7], %[offset], 1 \n\t"
"addu %[r7], %[outre1], %[r7] \n\t"
"sw %[r6], 0(%[r7]) \n\t"
"absq_s.w %[r6], %[r6] \n\t"
"slt %[r8], %[max], %[r6] \n\t"
"movn %[max], %[r6], %[r8] \n\t"
"muleq_s.w.phr %[r6], %[r1], %[r2] \n\t"
@@ -702,14 +704,14 @@ void WebRtcIsacfix_Spec2TimeMIPS(int16_t *inreQ7,
"subu %[r7], %[r6], %[r9] \n\t"
"addu %[r6], %[r9], %[r6] \n\t"
"negu %[r6], %[r6] \n\t"
"sll %[r10], %[offset], 1 \n\t"
"addu %[r10], %[outre2], %[r10] \n\t"
"sw %[r7], 0(%[outre2]) \n\t"
"absq_s.w %[r7], %[r7] \n\t"
"sw %[r6], 4(%[r10]) \n\t"
"absq_s.w %[r6], %[r6] \n\t"
"slt %[r8], %[max], %[r7] \n\t"
"movn %[max], %[r7], %[r8] \n\t"
"sll %[r7], %[offset], 1 \n\t"
"addu %[r7], %[outre2], %[r7] \n\t"
"sw %[r6], 4(%[r7]) \n\t"
"absq_s.w %[r6], %[r6] \n\t"
"slt %[r8], %[max], %[r6] \n\t"
"movn %[max], %[r6], %[r8] \n\t"
"muleq_s.w.phl %[r6], %[r1], %[r2] \n\t"
@@ -728,10 +730,12 @@ void WebRtcIsacfix_Spec2TimeMIPS(int16_t *inreQ7,
"negu %[r6], %[r6] \n\t"
"sw %[r7], 4(%[outre2]) \n\t"
"absq_s.w %[r7], %[r7] \n\t"
"sw %[r6], 0(%[r10]) \n\t"
"absq_s.w %[r6], %[r6] \n\t"
"slt %[r8], %[max], %[r7] \n\t"
"movn %[max], %[r7], %[r8] \n\t"
"sll %[r7], %[offset], 1 \n\t"
"addu %[r7], %[outre2], %[r7] \n\t"
"sw %[r6], 0(%[r7]) \n\t"
"absq_s.w %[r6], %[r6] \n\t"
"slt %[r8], %[max], %[r6] \n\t"
"movn %[max], %[r6], %[r8] \n\t"
"bgtz %[k], 1b \n\t"
@@ -824,8 +828,8 @@ void WebRtcIsacfix_Spec2TimeMIPS(int16_t *inreQ7,
[offset] "+r" (offset), [k] "+r" (k), [r0] "=&r" (r0),
[r1] "=&r" (r1), [r2] "=&r" (r2), [r3] "=&r" (r3),
[r4] "=&r" (r4), [r5] "=&r" (r5), [r6] "=&r" (r6),
[r7] "=&r" (r7), [r10] "=&r" (r10),
[r8] "=&r" (r8), [r9] "=&r" (r9), [max] "=&r" (max)
[r7] "=&r" (r7), [r8] "=&r" (r8), [r9] "=&r" (r9),
[max] "=&r" (max)
: [inreQ7] "r" (inreQ7), [inimQ7] "r" (inimQ7),
[cosptr] "r" (cosptr), [sinptr] "r" (sinptr),
[outre1Q16] "r" (outre1Q16), [outre2Q16] "r" (outre2Q16)