Commit Graph

1374 Commits

Author SHA1 Message Date
James Zern
f74e04cc62 fdct8x8_test:: quiet unused-function warning
in non-x86 builds

Change-Id: I9f6fa40d27f95a4afe92444f71c23dc9a15db466
2016-02-03 23:04:42 -08:00
James Zern
81c165973e dct16x16_test: quiet unused-function warning
in non-x86 builds

Change-Id: I1171e9c7e7ea5bcdea70bf5e3d28b07d6bb5578f
2016-02-02 19:42:19 -08:00
James Zern
b0549839f6 dct32x32_test: remove unused function
idct32x32_8

Change-Id: I1678ab48639cc54be4c9294479de01beced9e1e9
2016-02-02 19:37:22 -08:00
James Zern
51906ad6e3 tests: quiet some warnings w/--disable-webm-io
unused-functions/variables

Change-Id: Id7a2c345442129d84ec1482e38fcdc4bc9eaad7d
2016-02-02 19:32:25 -08:00
Yaowu Xu
8fdab8a4a4 Merge "Add a vp9 test vector" 2016-01-29 01:28:43 +00:00
Yaowu Xu
a643964a5f Add a vp9 test vector
This test vector exercises various idct32x32 functions in decoder.

Change-Id: Ic9453f50ef4723bdaace9bd80f32540d061ef2a1
2016-01-28 14:36:19 -08:00
James Zern
4f780e94a1 vp9/10: fix encoder crash on flush
the lookahead buffer allocation is deferred to receipt of the first
frame to allow profile changes. if the encoder was flushed before
supplying any frames the encoder would crash trying to dereference the
NULL buffer. vp8 is unaffected.

fixes mozilla bug:
https://bugzilla.mozilla.org/show_bug.cgi?id=1237848

Change-Id: Icee4b64de760476eee0d33b568f0a1010335ff13
2016-01-28 12:53:41 -08:00
James Zern
3a2ad10de2 Merge "Code clean of sad4xNx4D_sse" 2016-01-25 20:57:15 +00:00
Marco
f5c07b6803 vp9-svc: Allow frame-dropping in svc datarate control tests.
Remove comment(s) and enable frame-dropper for tests.
Frame dropper for 1 pass svc was fixed a while ago:
https://chromium-review.googlesource.com/#/c/309230/

Change-Id: I5fd3192825b22e562db9210d3dc7b246a1799d8d
2016-01-20 14:00:42 -08:00
Alex Converse
ed3df445d9 Revert "Merge "Change highbd variance rounding to prevent negative variance.""
This reverts commit ea48370a50, reversing
changes made to 15939cb2d7.

The commit was insufficiently tested and causes failures.

Change-Id: I623d6fc2cd3ae6fd42d0abab1f8eada465ae57a7
2016-01-13 11:19:06 -08:00
Alex Converse
ea48370a50 Merge "Change highbd variance rounding to prevent negative variance." 2016-01-13 00:25:54 +00:00
Jian Zhou
26a6ce4c6d Code clean of highbd_tm_predictor_32x32
Remove the ARCH_X86_64 constraint. No performance hit on both
big core and small core.

Change-Id: I39860b62b7a0ae4acaafdca7d68f3e5820133a81
2015-12-22 16:51:57 -08:00
Jian Zhou
355bfa2193 Code clean of highbd_tm_predictor_16x16
Remove the ARCH_X86_64 constraint.

Change-Id: I0139f8e998cc5525df55161c2054008d21ac24d4
2015-12-22 16:34:40 -08:00
Jian Zhou
a4c265f1b7 Code clean of highbd_dc_predictor_32x32
Remove the ARCH_X86_64 constraint.

Change-Id: I7d2545fc4f24eb352cf3e03082fc4d48d46fbb09
2015-12-22 16:06:54 -08:00
James Zern
cedb1db594 Merge "Code clean of highbd_tm_predictor_4x4" 2015-12-22 16:45:01 +00:00
James Zern
a097963f80 Merge "Code clean of highbd_dc_predictor_4x4" 2015-12-22 16:30:37 +00:00
Jian Zhou
db11307502 Code clean of highbd_tm_predictor_4x4
Replace MMX with SSE2, reduce mem access to left neighbor,
loop unrolled.

Change-Id: I941be915af809025f121ecc6c6443f73c9903e70
2015-12-18 18:43:41 -08:00
Jian Zhou
c91dd55eda Code clean of highbd_v_predictor_4x4
MMX replaced with SSE2, same performance.

Change-Id: I2ab8f30a71e5fadbbc172fb385093dec1e11a696
2015-12-18 15:25:27 -08:00
Jian Zhou
8366b414dd Code clean of highbd_dc_predictor_4x4
MMX replaced with SSE2, same performance.

Change-Id: Ic57855254e26757191933c948fac6aa047fadafc
2015-12-18 12:45:23 -08:00
Jian Zhou
789dbb3131 Code clean of sad4xNx4D_sse
Replace MMX with SSE2.

Change-Id: I948ca1be6ed9b8e67f16555e226f1203726b7da6
2015-12-17 17:43:46 -08:00
Jian Zhou
b158d9a649 Code clean of sad4xN(_avg)_sse
Replace MMX with SSE2, reduce psadbw ops which may help Silvermont.

Change-Id: Ic7aec15245c9e5b2f3903dc7631f38e60be7c93d
2015-12-17 11:10:42 -08:00
James Zern
b81f04a0cc Merge "move vp9_avg to vpx_dsp" 2015-12-15 03:41:22 +00:00
James Zern
d36659cec7 move vp9_avg to vpx_dsp
Change-Id: I7bc991abea383db1f86c1bb0f2e849837b54d90f
2015-12-14 14:42:12 -08:00
Jian Zhou
88120481a4 Code clean of tm_predictor_32x32
Reallocate the xmm register usage so that no ARCH_X86_64 required.
Reduce memory access to the left neighbor by half.
Speed up by single digit on big core machine.

Change-Id: I392515ed8e8aeb02e6a717b3966b1ba13f5be990
2015-12-11 10:32:08 -08:00
Jian Zhou
c90a8a1a43 SSE2 based h_predictor_32x32
Relocate the function from SSSE3 to SSE2, Unroll loop from 16 to 8,
and reduce mem access to left.
Speed up by single digit in ./test_intra_pred_speed on big core
machines.

Change-Id: I2b7fc95ffc0c42145be2baca4dc77116dff1c960
2015-12-10 10:09:58 -08:00
Jacky Chen
d9bba21306 Merge "Add vp9_avg_4x4_neon and the unit test." 2015-12-09 06:09:33 +00:00
James Zern
3dc19feb29 Merge changes Id3c6cf5c,I7970575e,If3253a87
* changes:
  test.mk: simplify vp8/9 checks
  test.mk: regroup white box tests
  test.mk: enable test_intra_pred_speed unconditionally
2015-12-09 01:39:45 +00:00
jackychen
303f144eef Add vp9_avg_4x4_neon and the unit test.
Change-Id: I3ef9a9648841374ed3cc865a02053c14ad821a20
2015-12-08 17:23:36 -08:00
Jian Zhou
aa5b517a39 Re-enable SSE2 based intra 4x4 prediction
4x4 Intra predictor implemented with MMX is replaced with SSE2.
Segfault in change 315561 when decoding vp8 is taken care of.

Change-Id: I083a7cb4eb8982954c20865160f91ebec777ec76
2015-12-07 18:50:37 -08:00
James Zern
79a9add666 Revert "MMX in intra 4x4 prediction replaced with SSE2"
This reverts commit 89a1efa4c4.

This causes a segfault when decoding vp8, in both 32 and 64-bit

Change-Id: Idbb9bb28ab897e1d055340497c47b49a12231367
2015-12-05 10:20:39 -08:00
James Zern
a046ba21d8 test.mk: simplify vp8/9 checks
use CONFIG_VP[89] to protect white-box tests and drop redundant
uses of CONFIG_VP9 in variable assignments within that block

Change-Id: Id3c6cf5c7822aa161b19768b295f58829a1c6447
2015-12-04 18:44:45 -08:00
James Zern
2c9c2e0b8b test.mk: regroup white box tests
vp8/9/10/multi-config/unconditional

Change-Id: I7970575e997da0b68c6c54741a221fbba5ad0b08
2015-12-04 18:44:34 -08:00
Jian Zhou
e86c7c863e Speed up h_predictor_16x16
Relocate the function from SSSE3 to SSE2, Unroll loop from 8 to 4,
and reduce mem access to left.
Speed up by >20% in ./test_intra_pred_speed.

Change-Id: Ie48229c2e32404706b722442942c84983bda74cc
2015-12-04 12:12:55 -08:00
Jian Zhou
da3f08fac3 Speed up h_predictor_8x8
Relocate the function from SSSE3 to SSE2, Unroll loop from 4 to 2,
and reduce mem access to left.
Speed up by >20% in ./test_intra_pred_speed.

Change-Id: Ib9f1846819783b6e05e2a310c930eb844b2b4d2e
2015-12-04 11:36:44 -08:00
Jian Zhou
aa2764abdd MMX in intra 8x8 prediction replaced with SSE2
8x8 Intra predictor implemented with MMX is replaced with SSE2.

Change-Id: I0c90e7c1e1e6942489ac2bfe58903b728aac7a52
2015-12-03 18:11:06 -08:00
Jian Zhou
89a1efa4c4 MMX in intra 4x4 prediction replaced with SSE2
4x4 Intra predictor implemented with MMX is replaced with SSE2.

Change-Id: Id57da2a7c38832d0356bc998790fc1989d39eafc
2015-12-03 16:40:23 -08:00
Jian Zhou
623e988add Merge "SSE2 speed up of h_predictor_4x4" 2015-12-02 18:49:00 +00:00
Jian Zhou
9d29d76280 SSE2 speed up of h_predictor_4x4
Relocate h_predictor_4x4 from SSSE3 to SSE2 with XMM registers.
Speed up by ~25% in ./test_intra_pred_speed.

Change-Id: I64e14c13b482a471449be3559bfb0da45cf88d9d
2015-11-30 10:08:05 -08:00
James Zern
1138b986c9 test.mk: enable test_intra_pred_speed unconditionally
vpx_dsp is currently included in all configurations

Change-Id: If3253a87d27f3e1abc94fbfe76f978c1172f3762
2015-11-24 22:29:12 -08:00
James Zern
fd51d90159 Merge changes Iaf8cbe95,I6748183d,I2a49811d
* changes:
  add vp9_satd_neon
  fix vp9_satd_sse2
  vp9_satd: return an int
2015-11-25 01:48:53 +00:00
Alex Converse
022c848b4d Change highbd variance rounding to prevent negative variance.
Always round sum error and sum square error toward zero in variance
calculations. This prevents variance from becoming negative.
Avoiding rounding variance at all might be better but would be far
more invasive.

Change-Id: Icf24e0e75ff94952fc026ba6a4d26adf8d373f1c
2015-11-24 16:32:01 -08:00
James Zern
eb1d0f8d60 add vp9_satd_neon
~60-65% faster at the function level across block sizes

Change-Id: Iaf8cbe95731c43fdcbf68256e44284ba51a93893
2015-11-24 16:09:10 -08:00
Marco
b0027b96ae vp9-svc: Fix to allow setting qp-max/min per spatial and temporal layer.
Change-Id: Ic0ec32c1d7f7c08c9f956592dccbfd9060b1f624
2015-11-23 10:46:34 -08:00
James Zern
60760f710f fix vp9_satd_sse2
accumulate satd in 32-bits
+ add unit test

Change-Id: I6748183df3662ddb9d635f9641f9586f2fd38ad5
2015-11-20 14:35:46 -08:00
James Zern
3e0138edb7 vp9_satd: return an int
the final sum may use up to 26 bits

+ add a unit test
+ disable the sse2 as the result will rollover; this will be fixed in a
future commit

Change-Id: I2a49811dfaa06abfd9fa1e1e65ed7cd68e4c97ce
2015-11-20 14:35:38 -08:00
Jian Zhou
4993158ee5 Merge "Speed up tm_predictor_4x4" 2015-11-19 02:32:48 +00:00
Jian Zhou
79b68626ae Speed up tm_predictor_4x4
tm_predictor_4x4 is implemented with SSE2 using XMM registers.
Speed up by ~25% in ./test_intra_pred_speed.

Change-Id: I25074b78d476a2cb17f81cf654bdfd80df2070e0
2015-11-18 16:44:25 -08:00
jackychen
204cde580a Enable resize test(down&up) by changing the bitrate.
Change-Id: I5a4f1f7b9de20fbfc28cb743dcd29c0eeca736f8
2015-11-13 16:46:00 -08:00
Marco
006fd19246 Fix resize internal test.
Temporary fix to make sure it always passes.

Change-Id: I56a0529986ad7049b6090f871c14e9e06d573d5f
2015-11-13 06:22:27 -08:00
Marco
419da5c734 Adjust variance threshold for 16x16 split at low resolutions.
Change-Id: I635e37f81237e9703d7d9a11ed76a043f4ec6eb0
2015-11-12 17:58:31 -08:00