408 Commits

Author SHA1 Message Date
James Zern
5171857329 vpx_highbd_lpf_horizontal_8: remove unused count param
Change-Id: Iaca71ea3796115d4c2d43563b4e6f3914e21f1bf
2016-02-16 22:57:44 -08:00
James Zern
3c1019e49d vpx_highbd_lpf_vertical_4: remove unused count param
Change-Id: Ic6da723c5cf3cd8127db1f476c3e46ea134cb774
2016-02-16 22:57:44 -08:00
James Zern
72a9f06ac2 vpx_highbd_lpf_vertical_8: remove unused count param
Change-Id: Id16f7259897654831d31642c2d5e0bbe5e13416c
2016-02-16 22:57:44 -08:00
James Zern
b1e97c6a25 vpx_lpf_horizontal_4: remove unused count param
Change-Id: Iec7d8eda343991f7d7d46931dca17af23c821d11
2016-02-16 22:57:27 -08:00
James Zern
bd5a5bb561 vpx_lpf_horizontal_8: remove unused count param
Change-Id: I48741e167a7b09b7c9ad3bfc1c4b88ef1029ae46
2016-02-16 22:54:40 -08:00
James Zern
109a47b342 vpx_lpf_vertical_4: remove unused count param
Change-Id: I43a191cb3d42e51e7bca266adfa11c6239a8064c
2016-02-16 14:59:00 -08:00
James Zern
37225744db vpx_lpf_vertical_8: remove unused count param
Change-Id: Ic69406da00afb0f06588e8c0deb2b043952b078c
2016-02-16 14:59:00 -08:00
Geza Lore
abd00505d1 Add optimized vpx_sum_squares_2d_i16 for vp10.
Using this we can eliminate large numbers of calls to predict intra,
and is also faster than most of the variance functions it replaces.
This is an equivalence transform so coding performance is unaffected.

Encoder speedup is approx 7% when var_tx, super_tx and ext_tx are all
enabled.

Change-Id: I0d4c83afc4a97a1826f3abd864bd68e41bb504fb
2016-02-15 16:54:52 +00:00
Yaowu Xu
18b6e9a36f Merge branch 'masterbase' into nextgenv2
Conflicts:
	vp10/encoder/rdopt.c

Change-Id: If720e7f9810378d24bf9fd51a95fd29c3bc5d774
2016-02-12 09:19:30 -08:00
Yaowu Xu
1a69cb286f Refactor internal stats code
Also removed the use of postprocessing in computing internal stats.

Change-Id: Ib8fdbdfe7b7ca05cd1a034a373aa7762fa44323c
2016-02-12 07:31:29 -08:00
James Zern
26c6fbdcda vpx_ve_predictor_4x4_c: quiet unused param warning
Change-Id: I62234260e2d2de94d602c6d8095c8f8124334052
2016-02-11 19:22:29 -08:00
Yaowu Xu
bb8ca08816 Enable computing PSNRHVS for hbd build
This commit adds computation of PSNRHVS for highbitdepth build, it
also adds tests to make sure the calculation of psnrhvs metric for
10 and 12 bit correct.

Change-Id: Iac8a8073d2b3e3ba5d368829d770793212fa63b6
2016-02-11 13:17:59 -08:00
Yaowu Xu
c0874f2441 Enable computing of FastSSIM for HBD build
This commit adds the computation of fastSSIM for highbitdepth build,
it also modifies the hbdmetric test to be more generic and applicable
for fastSSIM.

The 255 used for calculating ssim constants c1 and c2 is not exactly
scaled by 4x and 16x to 1023 and 4095, therefore requries the metric
test to have a thresold more tolerant than 0, currently at 0.03dB.

Change-Id: I631829da7773de400e77fc36004156e5e126c7e0
2016-02-10 17:11:58 -08:00
Yaowu Xu
204e77e059 Remove a flavor of SSIM that is never really used.
Change-Id: I61ea7f63acbcfeecd3f7dba5a5a38b980efc802b
2016-02-08 11:22:08 -08:00
Yaowu Xu
efe1b1dbf7 Set a max dB value for PSNR_HVS and FAST_SSIM
Now set at 100.0 instead of infinite

Change-Id: I41bae0c4bd95a26f9819584e7311b7945df1271a
2016-02-08 10:55:25 -08:00
Yaowu Xu
3c28b4a8ff Fix msvc compiler warnings
There were a number of compiler warnings:
1. int16_t to uint8_t in recon_intra.c;
2. double to float conversions in psnrhvs.c
3. intptr_t to int in quantize.c
4. size_t to int32_t in decoder.c

Change-Id: Id95423b17779dcfa6cf39d9a90fe8cb8b910f5df
2016-02-08 10:14:08 -08:00
Yaowu Xu
ac898d221f Normalize fdct8x8 in psnrhvs computation
This is to match the scale to the fdct8x8 used in original daala
psnrhvs computation.

Change-Id: Ic30b50747ba9c340bcb679f7439640046c69f90a
2016-02-08 17:13:18 +00:00
James Zern
05437805f7 intrapred/d135: flatten border results before storing
the results along the top and left border are then stored with a moving
window into the vector.
~40-67% faster on ARM, ~40-77+% on x86 depending on the block size.

Change-Id: Iab369aa2946a3ae4eb7290d512868fe5db92dbc8
2016-02-05 12:31:48 -08:00
Yaowu Xu
105da4128d Fix bad merge artifacts
Temporaly disable warning for unused function for vp10, needs clean
out the warnings before re-enable the flag for vp10.

Change-Id: I5636f8cd607423f6ea6963db9c2cbd688e30b495
2016-02-05 09:04:41 -08:00
Yaowu Xu
48b2713553 Merge branch 'master' into nextgenv2 2016-02-05 05:00:06 -08:00
James Zern
cdf1077d5a intrapred: protect functions w/CONFIG check x2
high-bitdepth version
d207e, d63e, d45e are only used with CONFIG_MISC_FIXES

Change-Id: I77292e11f51fd76d4127fd0027f876866bcf8675
2016-02-02 19:38:37 -08:00
Yaowu Xu
9568a284ab Fix automerge errors
Change-Id: I24d415bafe617eac894427088d7b2fbe0b7e04d7
2016-02-01 14:03:49 -08:00
Yaowu Xu
8678ecd1ef Merge branch 'master' into nextgenv2 2016-01-31 05:00:05 -08:00
Yaowu Xu
6a94d6ad8e Merge "Enable sse2 version of inverse wht for hbd build" 2016-01-31 04:38:39 +00:00
Yaowu Xu
8dc6f3f5c2 Merge branch 'master' into nextgenv2 2016-01-30 05:00:05 -08:00
James Zern
8faccb709a Merge changes If13946e4,I61a1814d,I2ca9aa3c,I44d91eaa
* changes:
  intrapred: protect functions w/CONFIG check
  vp9_noise_estimate: protect copy_frame w/CONFIG check
  vp8_cx_iface: delete 3 unused functions
  vp8: mark intra_prediction_down_copy inline
2016-01-30 00:17:16 +00:00
Yaowu Xu
0aef1bc898 Enable sse2 version of inverse wht for hbd build
Change-Id: If8f5efd701a11c8a7ad3078d10ec3cd0fe27667e
2016-01-29 14:47:56 -08:00
Yaowu Xu
b229710811 SSSE3 idct8x8 functions for highbitdpeth build
This commit changes SSSE3 optimized idct8x8 functions to work with
highbitdepth build.

With this commit and the previous one that enabled SSSE3 idct32x32
functions, tests showed virtually no difference on decoding speed for
file fdJc1_IBKJA.248.webm for the build with -enable-vp9-highbitdpeth
option and the build without the option.

Change-Id: Ibe0634149ec70e8b921e6b30171664b8690a9c45
2016-01-29 12:36:53 -08:00
Yaowu Xu
aac1ef7f80 Enable hbd_build to use SSSE3optimized functions
This commit changes the SSSE3 assembly functions for idct32x32 to
support highbitdepth build.

On test clip fdJc1_IBKJA.248.webm, this cuts the speed difference
between hbd and lbd build from between 3-4% to 1-2%.

Change-Id: Ic3390e0113bc1ca5bba8ec80d1795ad31b484fca
2016-01-29 01:30:43 +00:00
James Zern
fea27ccca0 intrapred: protect functions w/CONFIG check
d207e, d63e, d45e are only used with CONFIG_MISC_FIXES

Change-Id: If13946e483c4d0ccaa3e1d60dc14216c06d5a219
2016-01-26 20:13:57 -08:00
Yaowu Xu
f512a311f2 Merge branch 'master' into nextgenv2 2016-01-26 05:00:05 -08:00
James Zern
3a2ad10de2 Merge "Code clean of sad4xNx4D_sse" 2016-01-25 20:57:15 +00:00
Alex Converse
ed3df445d9 Revert "Merge "Change highbd variance rounding to prevent negative variance.""
This reverts commit ea48370a500537906d62544ca4ed75301d79e772, reversing
changes made to 15939cb2d76c773950cda40988ede89e111872ea.

The commit was insufficiently tested and causes failures.

Change-Id: I623d6fc2cd3ae6fd42d0abab1f8eada465ae57a7
2016-01-13 11:19:06 -08:00
Alex Converse
ea48370a50 Merge "Change highbd variance rounding to prevent negative variance." 2016-01-13 00:25:54 +00:00
Yaowu Xu
250213ac7e Merge branch 'master' into nextgenv2 2015-12-29 05:00:05 -08:00
Yaowu Xu
14b0443792 Merge branch 'master' into nextgenv2 2015-12-23 05:00:05 -08:00
Jian Zhou
26a6ce4c6d Code clean of highbd_tm_predictor_32x32
Remove the ARCH_X86_64 constraint. No performance hit on both
big core and small core.

Change-Id: I39860b62b7a0ae4acaafdca7d68f3e5820133a81
2015-12-22 16:51:57 -08:00
Jian Zhou
355bfa2193 Code clean of highbd_tm_predictor_16x16
Remove the ARCH_X86_64 constraint.

Change-Id: I0139f8e998cc5525df55161c2054008d21ac24d4
2015-12-22 16:34:40 -08:00
Jian Zhou
a4c265f1b7 Code clean of highbd_dc_predictor_32x32
Remove the ARCH_X86_64 constraint.

Change-Id: I7d2545fc4f24eb352cf3e03082fc4d48d46fbb09
2015-12-22 16:06:54 -08:00
James Zern
cedb1db594 Merge "Code clean of highbd_tm_predictor_4x4" 2015-12-22 16:45:01 +00:00
James Zern
a097963f80 Merge "Code clean of highbd_dc_predictor_4x4" 2015-12-22 16:30:37 +00:00
Yaowu Xu
7c6144bc4a Merge branch 'master' into nextgenv2 2015-12-22 05:00:05 -08:00
Jian Zhou
52e7f4153b Merge "Code clean of highbd_v_predictor_4x4" 2015-12-21 18:07:48 +00:00
Yaowu Xu
f73feedb9e Merge branch 'master' into nextgenv2 2015-12-19 05:00:06 -08:00
Yunqing Wang
b597e3e188 Merge "Fix for issue 1114 compile error" 2015-12-19 04:29:39 +00:00
James Zern
8b2ddbc728 sad_sse2: fix sad4xN(_avg) on windows
reduce the register count by 1 to avoid xmm6 and unnecessarily
penalizing the other users of the base macro

Change-Id: I59605c9a41a31c1b74f67ec06a40d1a7f92c4699
2015-12-18 19:19:32 -08:00
Jian Zhou
db11307502 Code clean of highbd_tm_predictor_4x4
Replace MMX with SSE2, reduce mem access to left neighbor,
loop unrolled.

Change-Id: I941be915af809025f121ecc6c6443f73c9903e70
2015-12-18 18:43:41 -08:00
Jian Zhou
c91dd55eda Code clean of highbd_v_predictor_4x4
MMX replaced with SSE2, same performance.

Change-Id: I2ab8f30a71e5fadbbc172fb385093dec1e11a696
2015-12-18 15:25:27 -08:00
Jian Zhou
8366b414dd Code clean of highbd_dc_predictor_4x4
MMX replaced with SSE2, same performance.

Change-Id: Ic57855254e26757191933c948fac6aa047fadafc
2015-12-18 12:45:23 -08:00
Yaowu Xu
7330108009 Merge branch 'master' into nextgenv2 2015-12-18 05:00:05 -08:00