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Some CPUs report "illegal instruction" error for the crc test because they do not support the relevant optional feature . This can be fixed by introducing CPU feature detection for AArch64 . The difference with the x86 implementation is the dispatcher . It is based on the glibc function `getauxval(AT_HWCAP)` and `getauxval(AT_HWCAP2)` , not registers or instructions . On a heterogeneous system (big.LITTLE) , it is dangerous to detect CPU features using identification registers . And while it is possible to use architectural feature registers from userspace on recent kernels, this won't necessarily work with older platforms . Thus we use the HW_CAPs exported from the kernel (and visible in getauxval) as the solution. - According to kernel suggestion , getauxval should be used for this purpose . - [CPU Feature detection](https://github.com/torvalds/linux/blob/master/Documentation/arm64/cpu-feature-registers.rst) - According to AAPCS result/paramter registers should be saved/restore for function call - [AAPCS](http://infocenter.arm.com/help/topic/com.arm.doc.ihi0055b/IHI0055B_aapcs64.pdf) - [GLibc](https://sourceware.org/git/gitweb.cgi?p=glibc.git;a=blob;f=sysdeps/aarch64/dl-trampoline.S) Signed-off-by: Jerry Yu <jerry.h.yu@arm.com> Change-Id: Ic9abe0d2268ac95537e1abf10acc642fc58a5054 |
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| .. | ||
| Makefile.am | ||
| pq_check_neon.S | ||
| pq_gen_neon.S | ||
| raid_aarch64_dispatcher.c | ||
| raid_multibinary_arm.S | ||
| xor_check_neon.S | ||
| xor_gen_neon.S | ||