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Some CPUs report "illegal instruction" error for the crc test because they do not support the relevant optional feature . This can be fixed by introducing CPU feature detection for AArch64 . The difference with the x86 implementation is the dispatcher . It is based on the glibc function `getauxval(AT_HWCAP)` and `getauxval(AT_HWCAP2)` , not registers or instructions . On a heterogeneous system (big.LITTLE) , it is dangerous to detect CPU features using identification registers . And while it is possible to use architectural feature registers from userspace on recent kernels, this won't necessarily work with older platforms . Thus we use the HW_CAPs exported from the kernel (and visible in getauxval) as the solution. - According to kernel suggestion , getauxval should be used for this purpose . - [CPU Feature detection](https://github.com/torvalds/linux/blob/master/Documentation/arm64/cpu-feature-registers.rst) - According to AAPCS result/paramter registers should be saved/restore for function call - [AAPCS](http://infocenter.arm.com/help/topic/com.arm.doc.ihi0055b/IHI0055B_aapcs64.pdf) - [GLibc](https://sourceware.org/git/gitweb.cgi?p=glibc.git;a=blob;f=sysdeps/aarch64/dl-trampoline.S) Signed-off-by: Jerry Yu <jerry.h.yu@arm.com> Change-Id: Ic9abe0d2268ac95537e1abf10acc642fc58a5054 |
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| crc | ||
| erasure_code | ||
| examples/ec | ||
| igzip | ||
| include | ||
| mem | ||
| programs | ||
| raid | ||
| tests/fuzz | ||
| tools | ||
| .drone.yml | ||
| .gitignore | ||
| .travis.yml | ||
| autogen.sh | ||
| configure.ac | ||
| CONTRIBUTING.md | ||
| Doxyfile | ||
| isa-l.def | ||
| libisal.pc.in | ||
| LICENSE | ||
| make.inc | ||
| Makefile.am | ||
| Makefile.nmake | ||
| Makefile.unx | ||
| README.md | ||
| Release_notes.txt | ||
Intel(R) Intelligent Storage Acceleration Library
ISA-L is a collection of optimized low-level functions targeting storage applications. ISA-L includes:
- Erasure codes - Fast block Reed-Solomon type erasure codes for any encode/decode matrix in GF(2^8).
- CRC - Fast implementations of cyclic redundancy check. Six different
polynomials supported.
- iscsi32, ieee32, t10dif, ecma64, iso64, jones64.
- Raid - calculate and operate on XOR and P+Q parity found in common RAID implementations.
- Compression - Fast deflate-compatible data compression.
- De-compression - Fast inflate-compatible data compression.
Also see:
- ISA-L for updates.
- For crypto functions see isa-l_crypto on github.
- The github wiki including a list of distros/ports offering binary packages.
- ISA-L mailing list.
- Contributing.
Building ISA-L
Prerequisites
- Assembler: nasm v2.11.01 or later (nasm v2.13 or better suggested for building in AVX512 support) or yasm version 1.2.0 or later.
- Compiler: gcc, clang, icc or VC compiler.
- Make: GNU 'make' or 'nmake' (Windows).
- Optional: Building with autotools requires autoconf/automake packages.
Autotools
To build and install the library with autotools it is usually sufficient to run:
./autogen.sh
./configure
make
sudo make install
Makefile
To use a standard makefile run:
make -f Makefile.unx
Windows
On Windows use nmake to build dll and static lib:
nmake -f Makefile.nmake
Other make targets
Other targets include:
make check: create and run testsmake tests: create additional unit testsmake perfs: create included performance testsmake ex: build examplesmake other: build other utilities such as compression file testsmake doc: build API manual