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multibinary: Add run-time cpu feature detect for aarch64
Some CPUs report "illegal instruction" error for the crc test because they do not support the relevant optional feature . This can be fixed by introducing CPU feature detection for AArch64 . The difference with the x86 implementation is the dispatcher . It is based on the glibc function `getauxval(AT_HWCAP)` and `getauxval(AT_HWCAP2)` , not registers or instructions . On a heterogeneous system (big.LITTLE) , it is dangerous to detect CPU features using identification registers . And while it is possible to use architectural feature registers from userspace on recent kernels, this won't necessarily work with older platforms . Thus we use the HW_CAPs exported from the kernel (and visible in getauxval) as the solution. - According to kernel suggestion , getauxval should be used for this purpose . - [CPU Feature detection](https://github.com/torvalds/linux/blob/master/Documentation/arm64/cpu-feature-registers.rst) - According to AAPCS result/paramter registers should be saved/restore for function call - [AAPCS](http://infocenter.arm.com/help/topic/com.arm.doc.ihi0055b/IHI0055B_aapcs64.pdf) - [GLibc](https://sourceware.org/git/gitweb.cgi?p=glibc.git;a=blob;f=sysdeps/aarch64/dl-trampoline.S) Signed-off-by: Jerry Yu <jerry.h.yu@arm.com> Change-Id: Ic9abe0d2268ac95537e1abf10acc642fc58a5054
This commit is contained in:
Jerry Yu
parent
0c22fcd3e2
commit
183385f02f
@ -117,7 +117,7 @@ if USE_NASM
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as_filter = ${srcdir}/tools/nasm-filter.sh
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endif
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if CPU_AARCH64
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as_filter = gcc
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as_filter = gcc -D__ASSEMBLY__
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endif
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CCAS = $(as_filter)
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@ -28,7 +28,8 @@
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#########################################################################
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lsrc_aarch64 += \
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crc/aarch64/crc_multibinary_arm.S
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crc/aarch64/crc_multibinary_arm.S \
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crc/aarch64/crc_aarch64_dispatcher.c
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lsrc_aarch64 += \
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crc/aarch64/crc16_t10dif_pmull.S \
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145
crc/aarch64/crc_aarch64_dispatcher.c
Normal file
145
crc/aarch64/crc_aarch64_dispatcher.c
Normal file
@ -0,0 +1,145 @@
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/**********************************************************************
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Copyright(c) 2019 Arm Corporation All rights reserved.
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Redistribution and use in source and binary forms, with or without
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modification, are permitted provided that the following conditions
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are met:
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* Redistributions of source code must retain the above copyright
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notice, this list of conditions and the following disclaimer.
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* Redistributions in binary form must reproduce the above copyright
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notice, this list of conditions and the following disclaimer in
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the documentation and/or other materials provided with the
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distribution.
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* Neither the name of Arm Corporation nor the names of its
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contributors may be used to endorse or promote products derived
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from this software without specific prior written permission.
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THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
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"AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
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||||
LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
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||||
A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
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OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
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SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
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||||
LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
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DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
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THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
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OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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**********************************************************************/
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#include <aarch64_multibinary.h>
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DEFINE_INTERFACE_DISPATCHER(crc16_t10dif)
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{
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unsigned long auxval = getauxval(AT_HWCAP);
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if (auxval & HWCAP_PMULL)
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return PROVIDER_INFO(crc16_t10dif_pmull);
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return PROVIDER_BASIC(crc16_t10dif);
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}
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DEFINE_INTERFACE_DISPATCHER(crc16_t10dif_copy)
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{
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unsigned long auxval = getauxval(AT_HWCAP);
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if (auxval & HWCAP_PMULL)
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return PROVIDER_INFO(crc16_t10dif_copy_pmull);
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return PROVIDER_BASIC(crc16_t10dif_copy);
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}
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DEFINE_INTERFACE_DISPATCHER(crc32_ieee)
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{
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unsigned long auxval = getauxval(AT_HWCAP);
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if (auxval & HWCAP_PMULL) {
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return PROVIDER_INFO(crc32_ieee_norm_pmull);
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}
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return PROVIDER_BASIC(crc32_ieee);
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}
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DEFINE_INTERFACE_DISPATCHER(crc32_iscsi)
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{
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unsigned long auxval = getauxval(AT_HWCAP);
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if (auxval & HWCAP_CRC32)
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return PROVIDER_INFO(crc32_iscsi_refl_hw_fold);
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if (auxval & HWCAP_PMULL) {
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return PROVIDER_INFO(crc32_iscsi_refl_pmull);
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}
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return PROVIDER_BASIC(crc32_iscsi);
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}
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DEFINE_INTERFACE_DISPATCHER(crc32_gzip_refl)
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{
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unsigned long auxval = getauxval(AT_HWCAP);
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if (auxval & HWCAP_CRC32)
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return PROVIDER_INFO(crc32_gzip_refl_hw_fold);
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if (auxval & HWCAP_PMULL)
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return PROVIDER_INFO(crc32_gzip_refl_pmull);
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return PROVIDER_BASIC(crc32_gzip_refl);
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}
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DEFINE_INTERFACE_DISPATCHER(crc64_ecma_refl)
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{
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unsigned long auxval = getauxval(AT_HWCAP);
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if (auxval & HWCAP_PMULL)
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return PROVIDER_INFO(crc64_ecma_refl_pmull);
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return PROVIDER_BASIC(crc64_ecma_refl);
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}
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DEFINE_INTERFACE_DISPATCHER(crc64_ecma_norm)
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{
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unsigned long auxval = getauxval(AT_HWCAP);
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if (auxval & HWCAP_PMULL)
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return PROVIDER_INFO(crc64_ecma_norm_pmull);
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return PROVIDER_BASIC(crc64_ecma_norm);
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}
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DEFINE_INTERFACE_DISPATCHER(crc64_iso_refl)
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{
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unsigned long auxval = getauxval(AT_HWCAP);
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if (auxval & HWCAP_PMULL)
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return PROVIDER_INFO(crc64_iso_refl_pmull);
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return PROVIDER_BASIC(crc64_iso_refl);
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}
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DEFINE_INTERFACE_DISPATCHER(crc64_iso_norm)
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{
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unsigned long auxval = getauxval(AT_HWCAP);
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if (auxval & HWCAP_PMULL)
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return PROVIDER_INFO(crc64_iso_norm_pmull);
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return PROVIDER_BASIC(crc64_iso_norm);
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}
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DEFINE_INTERFACE_DISPATCHER(crc64_jones_refl)
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{
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unsigned long auxval = getauxval(AT_HWCAP);
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if (auxval & HWCAP_PMULL)
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return PROVIDER_INFO(crc64_jones_refl_pmull);
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return PROVIDER_BASIC(crc64_jones_refl);
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}
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DEFINE_INTERFACE_DISPATCHER(crc64_jones_norm)
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{
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unsigned long auxval = getauxval(AT_HWCAP);
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if (auxval & HWCAP_PMULL)
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return PROVIDER_INFO(crc64_jones_norm_pmull);
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return PROVIDER_BASIC(crc64_jones_norm);
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}
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@ -26,17 +26,17 @@
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# (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
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# OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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#########################################################################
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#include <aarch64_multibinary.h>
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#include "multibinary_arm.h"
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mbin_dispatch crc32_iscsi crc32_iscsi_base
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mbin_dispatch crc16_t10dif crc16_t10dif_base
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mbin_dispatch crc16_t10dif_copy crc16_t10dif_copy_base
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mbin_dispatch crc32_ieee crc32_ieee_base
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mbin_dispatch crc32_gzip_refl crc32_gzip_refl_base
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mbin_dispatch crc64_ecma_refl crc64_ecma_refl_base
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mbin_dispatch crc64_ecma_norm crc64_ecma_norm_base
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mbin_dispatch crc64_iso_refl crc64_iso_refl_base
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mbin_dispatch crc64_iso_norm crc64_iso_norm_base
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mbin_dispatch crc64_jones_refl crc64_jones_refl_base
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mbin_dispatch crc64_jones_norm crc64_jones_norm_base
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mbin_interface crc32_iscsi
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mbin_interface crc16_t10dif
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mbin_interface crc16_t10dif_copy
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mbin_interface crc32_ieee
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mbin_interface crc32_gzip_refl
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mbin_interface crc64_ecma_refl
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mbin_interface crc64_ecma_norm
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mbin_interface crc64_iso_refl
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mbin_interface crc64_iso_norm
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mbin_interface crc64_jones_refl
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mbin_interface crc64_jones_norm
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193
include/aarch64_multibinary.h
Normal file
193
include/aarch64_multibinary.h
Normal file
@ -0,0 +1,193 @@
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/**********************************************************************
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Copyright(c) 2019 Arm Corporation All rights reserved.
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Redistribution and use in source and binary forms, with or without
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modification, are permitted provided that the following conditions
|
||||
are met:
|
||||
* Redistributions of source code must retain the above copyright
|
||||
notice, this list of conditions and the following disclaimer.
|
||||
* Redistributions in binary form must reproduce the above copyright
|
||||
notice, this list of conditions and the following disclaimer in
|
||||
the documentation and/or other materials provided with the
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distribution.
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* Neither the name of Arm Corporation nor the names of its
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contributors may be used to endorse or promote products derived
|
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from this software without specific prior written permission.
|
||||
|
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THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
|
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"AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
|
||||
LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
|
||||
A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
|
||||
OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
|
||||
SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
|
||||
LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
|
||||
DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
|
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THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
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OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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**********************************************************************/
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#ifndef __AARCH64_MULTIBINARY_H__
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#define __AARCH64_MULTIBINARY_H__
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#ifndef __aarch64__
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#error "This file is for aarch64 only"
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#endif
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#include <asm/hwcap.h>
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#ifdef __ASSEMBLY__
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/**
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* # mbin_interface : the wrapper layer for isal-l api
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*
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* ## references:
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* * https://sourceware.org/git/gitweb.cgi?p=glibc.git;a=blob;f=sysdeps/aarch64/dl-trampoline.S
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* * http://infocenter.arm.com/help/topic/com.arm.doc.ihi0055b/IHI0055B_aapcs64.pdf
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* * https://static.docs.arm.com/ihi0057/b/IHI0057B_aadwarf64.pdf?_ga=2.80574487.1870739014.1564969896-1634778941.1548729310
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*
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* ## Usage:
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* 1. Define dispather function
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* 2. name must be \name\()_dispatcher
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* 3. Prototype should be *"void * \name\()_dispatcher"*
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* 4. The dispather should return the right function pointer , revision and a string information .
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**/
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.macro mbin_interface name:req
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.extern \name\()_dispatcher
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.section .data
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.balign 8
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.global \name\()_dispatcher_info
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.type \name\()_dispatcher_info,%object
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\name\()_dispatcher_info:
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.quad \name\()_mbinit //func_entry
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.size \name\()_dispatcher_info,. - \name\()_dispatcher_info
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.balign 8
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.text
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\name\()_mbinit:
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//save lp fp, sub sp
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.cfi_startproc
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stp x29, x30, [sp, -224]!
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//add cfi directive to avoid GDB bt cmds error
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//set cfi(Call Frame Information)
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.cfi_def_cfa_offset 224
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.cfi_offset 29, -224
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.cfi_offset 30, -216
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//save parameter/result/indirect result registers
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stp x8, x9, [sp, 16]
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.cfi_offset 8, -208
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.cfi_offset 9, -200
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stp x0, x1, [sp, 32]
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.cfi_offset 0, -192
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.cfi_offset 1, -184
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stp x2, x3, [sp, 48]
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.cfi_offset 2, -176
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.cfi_offset 3, -168
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stp x4, x5, [sp, 64]
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.cfi_offset 4, -160
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.cfi_offset 5, -152
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stp x6, x7, [sp, 80]
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.cfi_offset 6, -144
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.cfi_offset 7, -136
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stp q0, q1, [sp, 96]
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.cfi_offset 64, -128
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.cfi_offset 65, -112
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stp q2, q3, [sp, 128]
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.cfi_offset 66, -96
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.cfi_offset 67, -80
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stp q4, q5, [sp, 160]
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.cfi_offset 68, -64
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.cfi_offset 69, -48
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stp q6, q7, [sp, 192]
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.cfi_offset 70, -32
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.cfi_offset 71, -16
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/**
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* The dispatcher functions have the following prototype:
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* void * function_dispatcher(void)
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* As the dispatcher is returning a struct, by the AAPCS,
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*/
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bl \name\()_dispatcher
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//restore temp/indirect result registers
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ldp x8, x9, [sp, 16]
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.cfi_restore 8
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.cfi_restore 9
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// save function entry
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str x0, [x9]
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//restore parameter/result registers
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ldp x0, x1, [sp, 32]
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.cfi_restore 0
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.cfi_restore 1
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ldp x2, x3, [sp, 48]
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.cfi_restore 2
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.cfi_restore 3
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ldp x4, x5, [sp, 64]
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.cfi_restore 4
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.cfi_restore 5
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ldp x6, x7, [sp, 80]
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.cfi_restore 6
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.cfi_restore 7
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ldp q0, q1, [sp, 96]
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.cfi_restore 64
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.cfi_restore 65
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ldp q2, q3, [sp, 128]
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.cfi_restore 66
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.cfi_restore 67
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ldp q4, q5, [sp, 160]
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.cfi_restore 68
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.cfi_restore 69
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ldp q6, q7, [sp, 192]
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.cfi_restore 70
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.cfi_restore 71
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//save lp fp and sp
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ldp x29, x30, [sp], 224
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//restore cfi setting
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.cfi_restore 30
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.cfi_restore 29
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.cfi_def_cfa_offset 0
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.cfi_endproc
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.global \name
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.type \name,%function
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.align 2
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\name\():
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adrp x9, :got:\name\()_dispatcher_info
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ldr x9, [x9, #:got_lo12:\name\()_dispatcher_info]
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ldr x10,[x9]
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br x10
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.size \name,. - \name
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.endm
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#else /* __ASSEMBLY__ */
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#include <sys/auxv.h>
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#define DEFINE_INTERFACE_DISPATCHER(name) \
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void * name##_dispatcher(void)
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|
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#define PROVIDER_BASIC(name) \
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PROVIDER_INFO(name##_base)
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#define DO_DIGNOSTIC(x) _Pragma GCC diagnostic ignored "-W"#x
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#define DO_PRAGMA(x) _Pragma (#x)
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#define DIGNOSTIC_IGNORE(x) DO_PRAGMA(GCC diagnostic ignored #x)
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#define DIGNOSTIC_PUSH() DO_PRAGMA(GCC diagnostic push)
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#define DIGNOSTIC_POP() DO_PRAGMA(GCC diagnostic pop)
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#define PROVIDER_INFO(_func_entry) \
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({ DIGNOSTIC_PUSH() \
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DIGNOSTIC_IGNORE(-Wnested-externs) \
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extern void _func_entry(); \
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DIGNOSTIC_POP() \
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_func_entry; \
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})
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#endif /* __ASSEMBLY__ */
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#endif
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@ -1,76 +0,0 @@
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########################################################################
|
||||
# Copyright(c) 2019 Arm Corporation All rights reserved.
|
||||
#
|
||||
# Redistribution and use in source and binary forms, with or without
|
||||
# modification, are permitted provided that the following conditions
|
||||
# are met:
|
||||
# * Redistributions of source code must retain the above copyright
|
||||
# notice, this list of conditions and the following disclaimer.
|
||||
# * Redistributions in binary form must reproduce the above copyright
|
||||
# notice, this list of conditions and the following disclaimer in
|
||||
# the documentation and/or other materials provided with the
|
||||
# distribution.
|
||||
# * Neither the name of Arm Corporation nor the names of its
|
||||
# contributors may be used to endorse or promote products derived
|
||||
# from this software without specific prior written permission.
|
||||
#
|
||||
# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
|
||||
# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
|
||||
# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
|
||||
# A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
|
||||
# OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
|
||||
# SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
|
||||
# LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
|
||||
# DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
|
||||
# THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
|
||||
# (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
|
||||
# OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
|
||||
#########################################################################
|
||||
|
||||
/* TODO: support SVE */
|
||||
.macro mbin_dispatch name:req, func_neon:req, func_sve
|
||||
.section .data
|
||||
.balign 8
|
||||
\name\()_dispatched:
|
||||
.quad \name\()_dispatch_init
|
||||
|
||||
.text
|
||||
.global \name
|
||||
.type \name, %function
|
||||
|
||||
\name\():
|
||||
adrp x9, \name\()_dispatched
|
||||
ldr x10, [x9, :lo12:\name\()_dispatched]
|
||||
br x10
|
||||
\name\()_dispatch_init:
|
||||
add x9, x9, :lo12:\name\()_dispatched
|
||||
adrp x10, :got:\func_neon
|
||||
ldr x10, [x10, :got_lo12:\func_neon]
|
||||
str x10, [x9]
|
||||
br x10
|
||||
.endm
|
||||
|
||||
#if 0
|
||||
Macro expanded: mbin_dispatch xor_gen, xor_gen_neon
|
||||
|
||||
.section .data
|
||||
.balign 8
|
||||
|
||||
xor_gen_dispatched:
|
||||
.quad xor_gen_dispatch_init
|
||||
|
||||
.text
|
||||
|
||||
.global xor_gen
|
||||
xor_gen:
|
||||
adrp x9, xor_gen_dispatched
|
||||
ldr x10, [x9, :lo12:xor_gen_dispatched]
|
||||
br x10
|
||||
|
||||
xor_gen_dispatch_init:
|
||||
add x9, x9, :lo12:xor_gen_dispatched
|
||||
adrp x10, :got:xor_gen_neon
|
||||
ldr x10, [x10, :got_lo12:xor_gen_neon]
|
||||
str x10, [x9]
|
||||
br x10
|
||||
#endif
|
||||
22
make.inc
22
make.inc
@ -43,6 +43,11 @@ version ?= 2.27.0
|
||||
host_cpu ?= $(shell uname -m | sed -e 's/amd/x86_/')
|
||||
arch ?= $(shell uname | grep -v -e Linux -e BSD )
|
||||
|
||||
# aarch64 cpu arch = aarch64
|
||||
ifeq ($(host_cpu)_$(arch),aarch64_)
|
||||
arch = aarch64
|
||||
endif
|
||||
|
||||
CC = gcc
|
||||
AS = nasm
|
||||
AWK = awk
|
||||
@ -89,6 +94,14 @@ ifeq ($(arch),noarch)
|
||||
host_cpu=base_aliases
|
||||
endif
|
||||
|
||||
# arch=aarch64 build options
|
||||
ASFLAGS_aarch64 = -c
|
||||
ARFLAGS_aarch64 = cr $@
|
||||
ifeq ($(arch),aarch64)
|
||||
AS=$(CC) -D__ASSEMBLY__
|
||||
SIM=
|
||||
endif
|
||||
|
||||
ASFLAGS_Darwin = -f macho64 --prefix=_
|
||||
ARFLAGS_Darwin = -r $@
|
||||
ifeq ($(shell uname),Darwin)
|
||||
@ -201,8 +214,11 @@ $(O)/%.o: %.asm
|
||||
# gcc assembly files
|
||||
$(O)/%.o: $(host_cpu)/%.S
|
||||
@echo " ---> Building $< $(msg)"
|
||||
@$(COMPILE.c) $(OUTPUT_OPTION) $<
|
||||
@$(AS) $(ASFLAGS) -o $@ $<
|
||||
|
||||
$(O)/%.o : $(host_cpu)/%.c
|
||||
@echo " ---> Building $< $(msg)"
|
||||
@$(COMPILE.c) $(OUTPUT_OPTION) $<
|
||||
$(O)/%.o %.o: %.c
|
||||
@echo " ---> Building $< $(msg)"
|
||||
@$(COMPILE.c) $(OUTPUT_OPTION) $<
|
||||
@ -248,7 +264,9 @@ shared_objs += $(addprefix $(O)/shared_ver_,$(patsubst %.c,%.o,$(filter %.c,$(n
|
||||
$(O)/shared_ver_%.o: %.c
|
||||
@echo " ---> Building shared $< $(msg)"
|
||||
@$(COMPILE.c) $(OUTPUT_OPTION) $<
|
||||
|
||||
$(O)/shared_ver_%.o: $(host_cpu)/%.c
|
||||
@echo " ---> Building shared $< $(msg)"
|
||||
@$(COMPILE.c) $(OUTPUT_OPTION) $<
|
||||
ifneq ($(lib_debug),1)
|
||||
$(so_lib_name): DEBUG_$(AS)=
|
||||
$(so_lib_name): DEBUG=
|
||||
|
||||
@ -29,4 +29,5 @@
|
||||
|
||||
lsrc_aarch64 += \
|
||||
mem/aarch64/mem_zero_detect_neon.S \
|
||||
mem/aarch64/mem_multibinary_arm.S
|
||||
mem/aarch64/mem_multibinary_arm.S \
|
||||
mem/aarch64/mem_aarch64_dispatcher.c
|
||||
|
||||
39
mem/aarch64/mem_aarch64_dispatcher.c
Normal file
39
mem/aarch64/mem_aarch64_dispatcher.c
Normal file
@ -0,0 +1,39 @@
|
||||
/**********************************************************************
|
||||
Copyright(c) 2019 Arm Corporation All rights reserved.
|
||||
|
||||
Redistribution and use in source and binary forms, with or without
|
||||
modification, are permitted provided that the following conditions
|
||||
are met:
|
||||
* Redistributions of source code must retain the above copyright
|
||||
notice, this list of conditions and the following disclaimer.
|
||||
* Redistributions in binary form must reproduce the above copyright
|
||||
notice, this list of conditions and the following disclaimer in
|
||||
the documentation and/or other materials provided with the
|
||||
distribution.
|
||||
* Neither the name of Arm Corporation nor the names of its
|
||||
contributors may be used to endorse or promote products derived
|
||||
from this software without specific prior written permission.
|
||||
|
||||
THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
|
||||
"AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
|
||||
LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
|
||||
A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
|
||||
OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
|
||||
SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
|
||||
LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
|
||||
DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
|
||||
THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
|
||||
(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
|
||||
OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
|
||||
**********************************************************************/
|
||||
#include <aarch64_multibinary.h>
|
||||
|
||||
DEFINE_INTERFACE_DISPATCHER(isal_zero_detect)
|
||||
{
|
||||
unsigned long auxval = getauxval(AT_HWCAP);
|
||||
if (auxval & HWCAP_ASIMD)
|
||||
return PROVIDER_INFO(mem_zero_detect_neon);
|
||||
|
||||
return PROVIDER_BASIC(mem_zero_detect);
|
||||
|
||||
}
|
||||
@ -27,6 +27,7 @@
|
||||
# OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
|
||||
#########################################################################
|
||||
|
||||
#include "multibinary_arm.h"
|
||||
#include <aarch64_multibinary.h>
|
||||
|
||||
mbin_interface isal_zero_detect
|
||||
|
||||
mbin_dispatch isal_zero_detect, mem_zero_detect_neon
|
||||
|
||||
@ -32,4 +32,5 @@ lsrc_aarch64 += \
|
||||
raid/aarch64/pq_gen_neon.S \
|
||||
raid/aarch64/xor_check_neon.S \
|
||||
raid/aarch64/pq_check_neon.S \
|
||||
raid/aarch64/raid_multibinary_arm.S
|
||||
raid/aarch64/raid_multibinary_arm.S \
|
||||
raid/aarch64/raid_aarch64_dispatcher.c
|
||||
|
||||
61
raid/aarch64/raid_aarch64_dispatcher.c
Normal file
61
raid/aarch64/raid_aarch64_dispatcher.c
Normal file
@ -0,0 +1,61 @@
|
||||
/**********************************************************************
|
||||
Copyright(c) 2019 Arm Corporation All rights reserved.
|
||||
|
||||
Redistribution and use in source and binary forms, with or without
|
||||
modification, are permitted provided that the following conditions
|
||||
are met:
|
||||
* Redistributions of source code must retain the above copyright
|
||||
notice, this list of conditions and the following disclaimer.
|
||||
* Redistributions in binary form must reproduce the above copyright
|
||||
notice, this list of conditions and the following disclaimer in
|
||||
the documentation and/or other materials provided with the
|
||||
distribution.
|
||||
* Neither the name of Arm Corporation nor the names of its
|
||||
contributors may be used to endorse or promote products derived
|
||||
from this software without specific prior written permission.
|
||||
|
||||
THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
|
||||
"AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
|
||||
LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
|
||||
A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
|
||||
OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
|
||||
SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
|
||||
LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
|
||||
DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
|
||||
THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
|
||||
(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
|
||||
OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
|
||||
**********************************************************************/
|
||||
#include <aarch64_multibinary.h>
|
||||
|
||||
DEFINE_INTERFACE_DISPATCHER(xor_gen)
|
||||
{
|
||||
if (getauxval(AT_HWCAP) & HWCAP_ASIMD)
|
||||
return PROVIDER_INFO(xor_gen_neon);
|
||||
return PROVIDER_BASIC(xor_gen);
|
||||
|
||||
}
|
||||
|
||||
DEFINE_INTERFACE_DISPATCHER(xor_check)
|
||||
{
|
||||
if (getauxval(AT_HWCAP) & HWCAP_ASIMD)
|
||||
return PROVIDER_INFO(xor_check_neon);
|
||||
return PROVIDER_BASIC(xor_check);
|
||||
|
||||
}
|
||||
|
||||
DEFINE_INTERFACE_DISPATCHER(pq_gen)
|
||||
{
|
||||
if (getauxval(AT_HWCAP) & HWCAP_ASIMD)
|
||||
return PROVIDER_INFO(pq_gen_neon);
|
||||
return PROVIDER_BASIC(pq_gen);
|
||||
|
||||
}
|
||||
|
||||
DEFINE_INTERFACE_DISPATCHER(pq_check)
|
||||
{
|
||||
if (getauxval(AT_HWCAP) & HWCAP_ASIMD)
|
||||
return PROVIDER_INFO(pq_check_neon);
|
||||
return PROVIDER_BASIC(pq_check);
|
||||
|
||||
}
|
||||
@ -27,9 +27,10 @@
|
||||
# OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
|
||||
#########################################################################
|
||||
|
||||
#include "multibinary_arm.h"
|
||||
#include "aarch64_multibinary.h"
|
||||
|
||||
mbin_dispatch xor_gen, xor_gen_neon
|
||||
mbin_dispatch xor_check, xor_check_neon
|
||||
mbin_dispatch pq_gen, pq_gen_neon
|
||||
mbin_dispatch pq_check, pq_check_neon
|
||||
|
||||
mbin_interface xor_gen
|
||||
mbin_interface xor_check
|
||||
mbin_interface pq_gen
|
||||
mbin_interface pq_check
|
||||
|
||||
Loading…
Reference in New Issue
Block a user