Commit Graph

656 Commits

Author SHA1 Message Date
Greg Tucker
36502ec33b build: Bump revision to 2.28
Change-Id: I57443be6b0f6dff6129943cd6e1508d73bc1aa80
Signed-off-by: Greg Tucker <greg.b.tucker@intel.com>
2019-09-17 10:43:53 -07:00
Greg Tucker
600b6d8d99 crc: Add new ecma_norm
Change-Id: I7747bfdca24bcd604c3eb118e7f1bcd98b2b6211
Signed-off-by: Greg Tucker <greg.b.tucker@intel.com>
2019-09-16 17:01:25 -07:00
Greg Tucker
121bc635c9 crc: Add new jones_norm
Change-Id: I66118baeec2a1d63423c74edc3aa20a3e8955c6e
Signed-off-by: Greg Tucker <greg.b.tucker@intel.com>
2019-09-16 17:01:25 -07:00
Greg Tucker
ed528bb2ad crc: Add new iso_norm
Change-Id: If0b05d1a1029b02842935c5c43966d81c59fbbca
Signed-off-by: Greg Tucker <greg.b.tucker@intel.com>
2019-09-16 17:01:25 -07:00
Greg Tucker
ea4cbf0ffa crc: Add new ecma_refl
Change-Id: Ifef4f8c6ce7da328b0cc03040b17e7443febf44d
Signed-off-by: Greg Tucker <greg.b.tucker@intel.com>
2019-09-16 17:01:25 -07:00
Greg Tucker
42bbc5a37e crc: Add new jones_refl
Change-Id: Ia4837b9125bce4e38ef6bae0a8c852d02e9b0bf2
Signed-off-by: Greg Tucker <greg.b.tucker@intel.com>
2019-09-16 17:01:25 -07:00
Greg Tucker
5c546ecddf crc: Add new arch CRC
Change-Id: I31d3a7e61eeed9d13a0cadd6d1ed25b0dbb39415
Signed-off-by: Chunyang Hui <chunyang.hui@intel.com>
Signed-off-by: Greg Tucker <greg.b.tucker@intel.com>
2019-09-16 17:01:25 -07:00
Greg Tucker
7a28c83879 test: Increase size of crc tests and simplify output
Change-Id: Ia0418b7889e591a0164c335e273caff263cdf640
Signed-off-by: Greg Tucker <greg.b.tucker@intel.com>
2019-09-14 16:01:28 -07:00
Greg Tucker
ae3c91ab85 build: Set assembler feature level in std make
Also fix multibinary to try each available arch

Change-Id: Icd8496d169665bded478a33a02e739d1f8349b6f
Signed-off-by: Greg Tucker <greg.b.tucker@intel.com>
2019-09-14 16:01:28 -07:00
Roy Oursler
198b026a55 build: Add multi-binary checking for new arch
Change-Id: I8bb8d9e9ae28987ee583976871ff84ee205bdbdc
Signed-off-by: Roy Oursler <roy.j.oursler@intel.com>
2019-09-14 16:01:28 -07:00
Roy Oursler
e4b8f164ae build: Setup as_feature_level
Change-Id: I7443058c577cf8eafe10acc2b2bfdfe76e2ce264
Signed-off-by: Roy Oursler <roy.j.oursler@intel.com>
2019-09-14 16:01:28 -07:00
Roy Oursler
d3caab9c3a build: Avoid requiring AVX512 define when using dispatch functions
Change-Id: I76af2d6ab7eb61ae531bbc7427650d08737c20ab
Signed-off-by: Roy Oursler <roy.j.oursler@intel.com>
2019-09-14 16:01:28 -07:00
Greg Tucker
1ba280fa09 igzip: Fix and clarify a few code issues in the cli tool
Fixes a few scan build hits. A few are false positives such as a missed free but
better to clarify the code in this case. Others such as calling no-null
functions are made explicit.

Change-Id: Icb001a2bf7024dbaa4b4c87089eda818de830c78
Signed-off-by: Greg Tucker <greg.b.tucker@intel.com>
2019-09-04 14:39:01 -07:00
Jerry Yu
5f45f3f310 igzip: Optimize adler32 with arm neon
Change-Id: I9b8932eb02ed6bc44756f6505e7efbfad1706b46
Signed-off-by: Jerry Yu <jerry.h.yu@arm.com>
2019-08-29 10:11:06 +08:00
Jerry Yu
a2005c1fd6 igzip: enable multibinary interfaces
- Add dispatcher layer
- Alias functions with assmebly

Change-Id: I84da1be539d890db0df64e5ea989b2fd1f276949
Signed-off-by: Jerry Yu <jerry.h.yu@arm.com>
2019-08-29 10:08:58 +08:00
Jerry Yu
183385f02f multibinary: Add run-time cpu feature detect for aarch64
Some CPUs  report "illegal instruction" error for the crc test because
they do not support the relevant optional feature . This can be fixed by
introducing CPU feature detection for AArch64 .

The difference with the x86 implementation is the dispatcher . It is based
on the glibc function `getauxval(AT_HWCAP)` and `getauxval(AT_HWCAP2)` , not
registers or instructions .

On a  heterogeneous system (big.LITTLE) , it is dangerous to detect CPU
features using identification registers . And while it is possible to use
architectural feature registers from userspace on recent kernels, this
won't necessarily work with older platforms . Thus we use the HW_CAPs
exported from the kernel (and visible in getauxval) as the solution.

- According to kernel suggestion , getauxval should be used for this purpose .
  - [CPU Feature detection](https://github.com/torvalds/linux/blob/master/Documentation/arm64/cpu-feature-registers.rst)
- According to  AAPCS result/paramter registers should be saved/restore for function call
  - [AAPCS](http://infocenter.arm.com/help/topic/com.arm.doc.ihi0055b/IHI0055B_aapcs64.pdf)
  - [GLibc](https://sourceware.org/git/gitweb.cgi?p=glibc.git;a=blob;f=sysdeps/aarch64/dl-trampoline.S)

Signed-off-by: Jerry Yu <jerry.h.yu@arm.com>
Change-Id: Ic9abe0d2268ac95537e1abf10acc642fc58a5054
2019-08-26 17:58:42 +08:00
Jerry Yu
0c22fcd3e2 build: fix compile break for unsupported CPUs
Build with Makefile.unx on unsupported CPUs fail . It reports
"undefine references". Fix it with adding base aliases files
into sources list

Change-Id: I9fbdeee7cb82edc9d5d8461bee3f648be83feaa6
Signed-off-by: Jerry Yu <jerry.h.yu@arm.com>
2019-08-23 17:28:22 +08:00
Jun He
a95292aa01 ci: add drone.io for arm64 verification
Change-Id: Ib357be80e7e9d7c0ab62433ee5fda4b962592553
Signed-off-by: Jun He <jun.he@arm.com>
2019-08-19 11:21:10 -07:00
Jun He
b721db98e5 igzip: optimize convert_dist_to_dist_sym to branchless
convert_dist_to_dist_sym uses long if/else branch to get look back distance.
The distance calculation is well formed for each distance range, so it could
be optimized for a branchless version.

Change-Id: I4e1e5170f8b3238631f3048087f95acc53e4498e
Signed-off-by: Jun He <jun.he@arm.com>
2019-08-13 11:02:53 +08:00
Greg Tucker
e2997062fb igzip: Optimize routine to find msb
Change-Id: I40e7898e2139c04f261980ca10886debc917842a
Signed-off-by: Greg Tucker <greg.b.tucker@intel.com>
2019-08-12 14:28:33 -07:00
Greg Tucker
4b33238371 Update travis with more nasm builds
Change-Id: I78b48f80d22ea811a9ed2e3a537e8dfa0350c8c5
Signed-off-by: Greg Tucker <greg.b.tucker@intel.com>
2019-07-16 16:09:16 -07:00
Greg Tucker
38f4880a4e build: Set nasm as the default when using std makefile
Also test the assembler for modern instruction support and set appropriate
defines.

Change-Id: I1628abd50b3babeeb7e010b86bda7ea97de0e6fb
Signed-off-by: Greg Tucker <greg.b.tucker@intel.com>
2019-07-16 15:47:20 -07:00
Greg Tucker
4ac0e435eb ec: Fix incorrect min size stated for gf_vect_mad
Change-Id: If178913f01f0d500aa66ce0e8dd67aaba49a0871
Signed-off-by: Greg Tucker <greg.b.tucker@intel.com>
2019-07-16 15:41:34 -07:00
Zhiyuan Zhu
c80610a2bb crc: push the aarch64 crc optimization back to base functions
Some arm64 machines don't support pmull instructions, so set these
crc interface to base functions. For long-term solution, will
provide better multi-binary support with cpu features detection.

Change-Id: I02791a2a50283dc8df2f9ba124eb309912b5b4b7
Signed-off-by: Zhiyuan Zhu <zhiyuan.zhu@arm.com>
2019-07-16 07:18:54 +00:00
Greg Tucker
236fdcc28f Update travis with xenial builds and new indent
Xenial has a minimum nasm version but no longer min indent.

Change-Id: I3ec70b9d5be932e903b77fd07d23667746c6c9f8
Signed-off-by: Greg Tucker <greg.b.tucker@intel.com>
2019-07-10 13:10:20 -07:00
Greg Tucker
25374814c9 Format only changes for new indent version
Change-Id: I2b2a5caf1b31ad56665081145d5e7089fd34d0ab
Signed-off-by: Greg Tucker <greg.b.tucker@intel.com>
2019-07-03 15:17:02 -07:00
Greg Tucker
430e862a9c Change indent format for minimal changes with latest
Latest indent 2.2.12 has some changes and bug fixes including adding -sar to -kr
and recognizing size_t as a standard type.

Change-Id: Id613cfb3cebdbe8e9e8823236adb5ee6eb712229
Signed-off-by: Greg Tucker <greg.b.tucker@intel.com>
2019-07-03 15:12:50 -07:00
Greg Tucker
0111c21cbc Update release notes for v2.27 additions
Change-Id: I75416fab491ffbeb41b989e554f0c56b175d2d1f
Signed-off-by: Greg Tucker <greg.b.tucker@intel.com>
2019-06-24 13:13:07 -07:00
Greg Tucker
10906f3d3a build: Bump revision to 2.27
Change-Id: Ia0f0f872614370475a29fdab32b587480a3ff760
Signed-off-by: Greg Tucker <greg.b.tucker@intel.com>
2019-06-24 10:47:15 -07:00
Greg Tucker
0a7e3167ce igzip: Add optional threaded compression to cli tool
Change-Id: Ia29e877cfa8bef2285d8b48bb9133b2ff5b2eea0
Signed-off-by: Greg Tucker <greg.b.tucker@intel.com>
2019-06-21 16:37:17 -07:00
Zhiyuan Zhu
a46da529d9 crc: optimize crc with arm64 assembly
Change-Id: I49166ee06b3ad24babb90aeb0b834d8aacfc2d03
Signed-off-by: Zhiyuan Zhu <zhiyuan.zhu@arm.com>
2019-06-21 17:02:16 +08:00
Roy Oursler
9c91a18c6e igzip: Fix igzip_rand_test to test on a single file
Change-Id: I21cb27f6012094adee6496f811792d6e3b11a8bc
Signed-off-by: Roy Oursler <roy.j.oursler@intel.com>
2019-05-21 13:52:41 -07:00
Zhiyuan Zhu
899c647628 crc: implement table-driven crc algorithm
Change-Id: Iebfb8ae1db09bf2dc882fd87e61627d74fab4a5c
Signed-off-by: Zhiyuan Zhu <zhiyuan.zhu@arm.com>
2019-05-08 17:50:03 -07:00
Greg Tucker
2000f8a3cd doc: Update references to new github group
Change-Id: Icca8d7da1f34cc7b31cb942baf7a22026f7fcf93
Signed-off-by: Greg Tucker <greg.b.tucker@intel.com>
2019-05-01 18:27:24 -07:00
Greg Tucker
88eff26884 build: Install pkg-config files
Change-Id: I712ef6565f613b7fffa5bae02b08b2224aeb2b17
Signed-off-by: Greg Tucker <greg.b.tucker@intel.com>
2019-05-01 16:48:10 -07:00
Greg Tucker
f1252a9e79 build: Add missing files for distcheck
Change-Id: I644d59eece8a9eae9d467f42d668b13d8fae0d81
Signed-off-by: Greg Tucker <greg.b.tucker@intel.com>
2019-05-01 16:48:10 -07:00
Greg Tucker
e9e373ba3d build: Add gitignore
Change-Id: Id839000d997f565e5de5fd570e321587347474bf
Signed-off-by: Greg Tucker <greg.b.tucker@intel.com>
2019-05-01 16:48:10 -07:00
Roy Oursler
db59b1082f igzip: Remove undefined behavior in igzip.c
Remove unaligend data access in
write_deflate_header_unaligned_stateless

Change-Id: I7defa5621d8dc188edc51d22d29155ed3687c49d
Signed-off-by: Roy Oursler <roy.j.oursler@intel.com>
2019-04-29 16:22:07 -07:00
Greg Tucker
906332850d build: Add version number to dll
Change-Id: Ic3411dbd0e959c41f4085cec38e4c95a6683a092
Signed-off-by: Greg Tucker <greg.b.tucker@intel.com>
2019-04-18 15:35:12 -07:00
Greg Tucker
fc9f7493a0 igzip: Fix help message in perf test
Change-Id: I2d4fd7c0eee176570d79bebf5f6e453f3b7dbba6
Signed-off-by: Greg Tucker <greg.b.tucker@intel.com>
2019-04-18 10:59:50 -07:00
Greg Tucker
09338c2ca7 Update release notes for v2.26 additions
Change-Id: I7c6aa4a60e16aec79178c3db6282904cd7af45f6
Signed-off-by: Greg Tucker <greg.b.tucker@intel.com>
2019-03-25 17:15:05 -07:00
Greg Tucker
f30db4c6c6 build: Bump revision to 2.26
Change-Id: I97ed7ab591e8174f7379be0563d6b9f2d0f90f0a
Signed-off-by: Greg Tucker <greg.b.tucker@intel.com>
2019-03-25 12:57:17 -07:00
Greg Tucker
8f06ac6973 Add Adler32 performance test
Change-Id: I511dd34235c9a4ce2f3596d63236800cbf06703b
Signed-off-by: Greg Tucker <greg.b.tucker@intel.com>
2019-03-22 14:29:42 -07:00
Yibo Cai
57eed2f02b aarch64: Cleanup build issues
This patch addresses one build failure and fixes several build warnings
for Arm (some for x86 too).

- Fix dynamic relocation link failure of ld.bfd 2.30 on Arm
  [log] relocation R_AARCH64_ADR_PREL_PG_HI21 against symbol `xor_gen_neon' which may bind externally can not be used when making a shared object

- Add arch dependent "other_tests" to exclude x86 specific tests on Arm
  [log] isa-l/erasure_code/gf_2vect_dot_prod_sse_test.c:181: undefined reference to `gf_2vect_dot_prod_sse'

- Check "fread" return value to fix gcc warnings on Arm and x86
  [log] warning: ignoring return value of ‘fread’, declared with attribute warn_unused_result [-Wunused-result]
        fread(in_buf, 1, in_size, in_file);
        ^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~

- Fix issue of comparing "char" with "int" on Arm. "char" is unsigned
  on Arm by default, an unsigned char will never equal to EOF(-1).
  [Log] programs/igzip_cli.c:318:31: warning: comparison is always true due to limited range of data type [-Wtype-limits]
        while (tmp != '\n' && tmp != EOF)
                                  ^~

- Include <stdlib.h> to several files to fix build warnings on Arm
  [log] igzip/igzip_inflate_perf.c:339:5: warning: incompatible implicit declaration of built-in function ‘exit’
        exit(0);
        ^~~~

Change-Id: I82c1b63316b634b3d398ffba2ff815679d9051a8
Signed-off-by: Yibo Cai <yibo.cai@arm.com>
2019-03-20 10:15:40 +08:00
Greg Tucker
3c009347b1 Fix a few c99isms in unit tests
Change-Id: Iea9ba619e337d5abea7ee791ddf3dd27e0f3e60f
Signed-off-by: Greg Tucker <greg.b.tucker@intel.com>
2019-03-19 15:02:40 -07:00
Greg Tucker
e08dfab9b3 test: Fix c99 warn in perf helper functions
Change-Id: I7e116215dc95bbca96c7285b98f5b8ec4e340ef1
Signed-off-by: Greg Tucker <greg.b.tucker@intel.com>
2019-03-18 15:07:47 -07:00
Roy Oursler
31eca5035f igzip: Modify last byte retrieval method
Change-Id: I3ba7e9bd007277be543ba7a6299d5acc5c848bd2
Signed-off-by: Roy Oursler <roy.j.oursler@intel.com>
2019-03-07 09:28:04 -07:00
Roy Oursler
67c4e26580 igzip: Remove unneeded generation of k register
Change-Id: I79bfb3b3a3feeb969a0c0ec92b7ae0633f6be1b0
Signed-off-by: Roy Oursler <roy.j.oursler@intel.com>
2019-03-07 09:28:04 -07:00
Roy Oursler
28da992ad2 igzip: Reduce data used in encode_df_06.asm
Change-Id: I83dbca452840c07b0fd77faaf9d35c46065f8a08
Signed-off-by: Roy Oursler <roy.j.oursler@intel.com>
2019-03-07 09:28:04 -07:00
Roy Oursler
863e72189b igzip: Modify igzip_rand_test to optionally use getopt
Change-Id: I8ad8e7f18f292b54158f1cda2eef9aec3919d175
Signed-off-by: Roy Oursler <roy.j.oursler@intel.com>
2019-03-07 09:28:04 -07:00