1) Implement the ErasureCode function in Altivec Intrinsics
2) Coding style update
Change-Id: I2c81d035f4083e9b011dbf3b741f628813b68606
Thanks-to: Daniel Axtens <dja@axtens.net>
Signed-off-by: Hong Bo Peng <penghb@cn.ibm.com>
Replace hardcode gcc with $(CC). as_filter
will work correct in cross compile
Change-Id: I484d5074abdfc80ed5cd14fdd1358274f306bcfd
Signed-off-by: Jerry Yu <jerry.h.yu@arm.com>
Some CPUs report "illegal instruction" error for the crc test because
they do not support the relevant optional feature . This can be fixed by
introducing CPU feature detection for AArch64 .
The difference with the x86 implementation is the dispatcher . It is based
on the glibc function `getauxval(AT_HWCAP)` and `getauxval(AT_HWCAP2)` , not
registers or instructions .
On a heterogeneous system (big.LITTLE) , it is dangerous to detect CPU
features using identification registers . And while it is possible to use
architectural feature registers from userspace on recent kernels, this
won't necessarily work with older platforms . Thus we use the HW_CAPs
exported from the kernel (and visible in getauxval) as the solution.
- According to kernel suggestion , getauxval should be used for this purpose .
- [CPU Feature detection](https://github.com/torvalds/linux/blob/master/Documentation/arm64/cpu-feature-registers.rst)
- According to AAPCS result/paramter registers should be saved/restore for function call
- [AAPCS](http://infocenter.arm.com/help/topic/com.arm.doc.ihi0055b/IHI0055B_aapcs64.pdf)
- [GLibc](https://sourceware.org/git/gitweb.cgi?p=glibc.git;a=blob;f=sysdeps/aarch64/dl-trampoline.S)
Signed-off-by: Jerry Yu <jerry.h.yu@arm.com>
Change-Id: Ic9abe0d2268ac95537e1abf10acc642fc58a5054
This patch addresses one build failure and fixes several build warnings
for Arm (some for x86 too).
- Fix dynamic relocation link failure of ld.bfd 2.30 on Arm
[log] relocation R_AARCH64_ADR_PREL_PG_HI21 against symbol `xor_gen_neon' which may bind externally can not be used when making a shared object
- Add arch dependent "other_tests" to exclude x86 specific tests on Arm
[log] isa-l/erasure_code/gf_2vect_dot_prod_sse_test.c:181: undefined reference to `gf_2vect_dot_prod_sse'
- Check "fread" return value to fix gcc warnings on Arm and x86
[log] warning: ignoring return value of ‘fread’, declared with attribute warn_unused_result [-Wunused-result]
fread(in_buf, 1, in_size, in_file);
^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
- Fix issue of comparing "char" with "int" on Arm. "char" is unsigned
on Arm by default, an unsigned char will never equal to EOF(-1).
[Log] programs/igzip_cli.c:318:31: warning: comparison is always true due to limited range of data type [-Wtype-limits]
while (tmp != '\n' && tmp != EOF)
^~
- Include <stdlib.h> to several files to fix build warnings on Arm
[log] igzip/igzip_inflate_perf.c:339:5: warning: incompatible implicit declaration of built-in function ‘exit’
exit(0);
^~~~
Change-Id: I82c1b63316b634b3d398ffba2ff815679d9051a8
Signed-off-by: Yibo Cai <yibo.cai@arm.com>
This patch introduces the base, avx and sse optimized zero detect memory function.
The zero detect memory function tests if a memory region is all zeroes. If all the
bytes in the memory region are zero, the function return a zero. Otherwise, if the
memory region has non zero bytes, the zero detect function returns a 1.
Change-Id: If965badf750377124d0067d09f888d0419554998
Signed-off-by: John Kariuki <John.K.Kariuki@intel.com>
Previously included just for struct alignment but all restrictions
have been removed.
Change-Id: I3fa7cbab86fce419b3b3bfccb48d9129bd77cf64
Signed-off-by: Greg Tucker <greg.b.tucker@intel.com>
Moved the afl fuzz test and added llvm fuzz tests including inflate
and round trip compress and inflate. Currently only works with clang,
std makefile and libFuzzer installed. Need to add checking and
support later when libfuzzer is more tightly integrated into the
compiler.
Change-Id: I2db9ad2335d6c5ed846886703b58225f67bcc935
Signed-off-by: Greg Tucker <greg.b.tucker@intel.com>
Makefile.am was missing make checks and Makefile.unx was missing make check.
Added both to be consistent with nmake file.
Change-Id: I08116ac820bccdb5500c794fa1e12c2a9bfdf802
Signed-off-by: Greg Tucker <greg.b.tucker@intel.com>
Allows configure to again build in an external directory. When building ISAL in
an external path, assembler or compiler needs relative include paths.
Signed-off-by: Xiaodong Liu <xiaodong.liu@intel.com>
Reviewed-by: Greg Tucker <greg.b.tucker@intel.com>
