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Author SHA1 Message Date
Mattias Ellert
1b1ee1e18f erasure_code: fix wrong return type 
erasure_code/ppc64le/gf_vect_mul_vsx.c: In function '_gf_vect_mul_base':
erasure_code/ppc64le/gf_vect_mul_vsx.c:14:16: error: 'return' with a value, in function returning void [-Wreturn-mismatch]
   14 |         return 0;
      |                ^
erasure_code/ppc64le/gf_vect_mul_vsx.c:6:13: note: declared here
    6 | static void _gf_vect_mul_base(int len, unsigned char *a, unsigned char *src,
      |             ^~~~~~~~~~~~~~~~~

Signed-off-by: Mattias Ellert <mattias.ellert@physics.uu.se>
 2024-01-23 12:01:14 +00:00
Pablo de Lara
bd22637502 Bump version to v2.31 
Signed-off-by: Pablo de Lara <pablo.de.lara.guarch@intel.com>
 2024-01-18 18:27:24 +00:00
Pablo de Lara
d4e1c21acb lib: add missing structure documentation 
Signed-off-by: Pablo de Lara <pablo.de.lara.guarch@intel.com>
 2024-01-15 16:58:43 +00:00
Pablo de Lara
4997190ab3 Update release notes for v2.31 
Signed-off-by: Pablo de Lara <pablo.de.lara.guarch@intel.com>
 2024-01-15 16:55:28 +00:00
Greg Tucker
479b3f84f9 build: fix CET default in unix Makefile 
CET default flag was clobbering CFLAGS.

Signed-off-by: Greg Tucker <greg.b.tucker@intel.com>
 2024-01-15 16:53:04 +00:00
Pablo de Lara
e0fd782974 erasure_code: use internal gf_vect_mul_base for ppc64le encoding 
gf_vect_mul_base is expected to work for all buffer sizes.
However, this function is checking for size alignment to 32 bytes,
to follow the other gf_vect_mul implementations.
Therefore, another implementation for this function is included
inside ppc64le folder to be used by the encoding functions.

Signed-off-by: Pablo de Lara <pablo.de.lara.guarch@intel.com>
 2024-01-15 15:48:14 +00:00
Pablo de Lara
b8d5633e51 erasure_code: check for size alignment on powerpc gf_vect_mul_vsx implementation 
Follows the rest of the gf_vect_mul implementations for other architectures,
and checks for size alignment, stated in the documentation.

Signed-off-by: Pablo de Lara <pablo.de.lara.guarch@intel.com>
 2024-01-15 15:48:14 +00:00
Pablo de Lara
91e7906f3f erasure_code: check for size on gf_vect_mul_sse/avx 
gf_vect_mul requires length to be multiple of 32 bytes,
so this check is added in the SSE/AVX implementations.

Signed-off-by: Pablo de Lara <pablo.de.lara.guarch@intel.com>
 2024-01-15 13:52:08 +00:00
liuqinfei
275977156d gf_vect_mul_sve: fix error and enable unit tests for aarch64 
Signed-off-by: liuqinfei <lucas.liuqinfei@huawei.com>
 2024-01-12 15:18:37 +00:00
Pablo de Lara
e0fffbe48b erasure_code: disable unit tests temporarily for aarch64/ppc64le 
Some aarch64 and ppc64le implementations of gf_vect_mul do not check
for invalid sizes, so the unit test checking for negative return value
from this function is disabled temporarily on these architectures.

Signed-off-by: Pablo de Lara <pablo.de.lara.guarch@intel.com>
 2024-01-10 15:53:14 +00:00
Pablo de Lara
7145c7f8b4 Makefile: add architecture to CFLAGS 
Signed-off-by: Pablo de Lara <pablo.de.lara.guarch@intel.com>
 2024-01-10 15:53:14 +00:00
Pablo de Lara
455fdded4e erasure_code: add missing aarch64 and powerpc interface for ec_init_tables 
ec_init_tables is now a multi-implementation function,
so it requires a dispatcher for all architectures.

Signed-off-by: Pablo de Lara <pablo.de.lara.guarch@intel.com>
 2024-01-09 13:38:43 +00:00
Pablo de Lara
ae0a688051 Update License file 
Signed-off-by: Pablo de Lara <pablo.de.lara.guarch@intel.com>
 2024-01-09 09:42:48 +00:00
Tomasz Kantecki
75af1c4d4e build: detect availability of -z now, relro and noexecstack linker options 
Signed-off-by: Tomasz Kantecki <tomasz.kantecki@intel.com>
 2024-01-05 14:45:12 +00:00
Pablo de Lara
71575ae434 raid: [example] fix memory leak in CRC64 example 
Signed-off-by: Pablo de Lara <pablo.de.lara.guarch@intel.com>
 2023-12-22 09:35:37 +00:00
Pablo de Lara
9ee34ec0f5 crc: use macro to print 64-bit value 
Signed-off-by: Pablo de Lara <pablo.de.lara.guarch@intel.com>
 2023-12-22 09:35:37 +00:00
Pablo de Lara
cf967e5a37 README: add section for DLL injection attack mitigations 
Signed-off-by: Pablo de Lara <pablo.de.lara.guarch@intel.com>
 2023-12-21 16:05:52 +00:00
Pablo de Lara
29d99fce26 igzip: add zlib header init function 
Add isal_zlib_hdr_init() function to initialize
the isal_zlib_header structure to all 0.

Signed-off-by: Pablo de Lara <pablo.de.lara.guarch@intel.com>
 2023-12-20 14:05:52 +00:00
Tomasz Kantecki
6ef2abe80e igzip: fix issues reported by static code analysis 
compute_dist_code() and compute_dist_icf_code() in huffman.h:
    Correct `assert(msb >= 1)` to `assert(msb >= 2)`.
    `msb` cannot be lower than 2 as it would result in corrupt computations.

get_dist_code() in huffman.h:
    Remove dead `if` statement at the beginning of the function.
    `dist` must be equal 1 or above in this function.

Signed-off-by: Tomasz Kantecki <tomasz.kantecki@intel.com>
 2023-12-19 20:36:39 +00:00
Tomasz Kantecki
402bd4f773 erasure_code: various fixes for static code analysis issues 
Signed-off-by: Tomasz Kantecki <tomasz.kantecki@intel.com>
 2023-12-19 20:36:39 +00:00
Tomasz Kantecki
ac2ee91cdb mem_zero_detect_test: fix for issue reported by static code analysis 
Signed-off-by: Tomasz Kantecki <tomasz.kantecki@intel.com>
 2023-12-19 20:36:39 +00:00
Tomasz Kantecki
5a00eaec33 igzip: several fixes for issues reported by static code analysis 
Signed-off-by: Tomasz Kantecki <tomasz.kantecki@intel.com>
 2023-12-19 20:36:39 +00:00
Pablo de Lara
c83771eeec mem: [test] fix memory leak 
Signed-off-by: Pablo de Lara <pablo.de.lara.guarch@intel.com>
 2023-12-18 14:25:22 +00:00
Pablo de Lara
a3e260436a erasure_code: [test] fix memory leak 
Signed-off-by: Pablo de Lara <pablo.de.lara.guarch@intel.com>
 2023-12-18 14:25:22 +00:00
Pablo de Lara
abd80d3c5a erasure_code: check for size in gf_Xvect_mad_avx512_gfni 
Length of data was not checked in implementation with AVX512+GFNI,
at the start of the gf_Xvect_mad_avx512_gfni functions, resulting
in buffer overflow if length was less than 64 bytes.

Signed-off-by: Pablo de Lara <pablo.de.lara.guarch@intel.com>
 2023-12-18 14:25:22 +00:00
Pablo de Lara
c06db0c60a igzip: [test] fix memory leak 
Signed-off-by: Pablo de Lara <pablo.de.lara.guarch@intel.com>
 2023-12-18 14:25:22 +00:00
Pablo de Lara
d65d2b5572 crc: [test] fix memory leak 
Signed-off-by: Pablo de Lara <pablo.de.lara.guarch@intel.com>
 2023-12-18 14:25:22 +00:00
Pablo de Lara
54d1153a61 raid: [test] fix memory leak 
Signed-off-by: Pablo de Lara <pablo.de.lara.guarch@intel.com>
 2023-12-18 14:25:22 +00:00
Tomasz Kantecki
c183961175 build: enable full read-only relocations and control flow integrity for hardening check 
Signed-off-by: Tomasz Kantecki <tomasz.kantecki@intel.com>
 2023-12-18 10:47:23 +00:00
Tomasz Kantecki
809f536265 igzip_cli: add missing 'void' keyword to some function prototypes 
Signed-off-by: Tomasz Kantecki <tomasz.kantecki@intel.com>
 2023-12-18 10:47:23 +00:00
Marcel Cornu
561a419bc8 erasure_code: fix modules using incorrect unsigned jump 
Signed-off-by: Marcel Cornu <marcel.d.cornu@intel.com>
 2023-12-14 17:55:49 +00:00
Marcel Cornu
a53a20ea2a erasure_code: add AVX2 5vect mad with GFNI implementation 
Signed-off-by: Marcel Cornu <marcel.d.cornu@intel.com>
 2023-12-14 17:55:49 +00:00
Marcel Cornu
47ed2847af erasure_code: add AVX2 4vect mad with GFNI implementation 
Signed-off-by: Marcel Cornu <marcel.d.cornu@intel.com>
 2023-12-14 17:55:49 +00:00
Marcel Cornu
22b7f33d68 erasure_code: add AVX2 3vect mad with GFNI implementation 
Signed-off-by: Marcel Cornu <marcel.d.cornu@intel.com>
 2023-12-14 17:55:49 +00:00
Tomasz Kantecki
a139dd7302 igzip_cli: improve get_posix_filetime() to deal with potential fstat() errors 
Signed-off-by: Tomasz Kantecki <tomasz.kantecki@intel.com>
 2023-12-14 13:55:52 +00:00
Tomasz Kantecki
08f021c43f igzip_cli: fix for potential buffer overrun on 'outfile_name' buffer with strncat() 
Signed-off-by: Tomasz Kantecki <tomasz.kantecki@intel.com>
 2023-12-14 13:55:52 +00:00
Tomasz Kantecki
722144ee75 igzip_cli: simplify fopen_safe() by replacing access() calls with detailed error message after failed fopen() 
Signed-off-by: Tomasz Kantecki <tomasz.kantecki@intel.com>
 2023-12-14 13:55:52 +00:00
Tomasz Kantecki
0e6bc4a5a1 igzip: zero flags field in isal_gzip_header_init() 
Signed-off-by: Tomasz Kantecki <tomasz.kantecki@intel.com>
 2023-12-14 13:55:52 +00:00
Marcel Cornu
d22bb198f3 erasure_code: optimize AVX2-GFNI single vector mad implementation 
Signed-off-by: Marcel Cornu <marcel.d.cornu@intel.com>
 2023-12-13 17:03:16 +00:00
Marcel Cornu
a0a149d674 erasure_code: add AVX2 2vect mad with GFNI implementation 
Signed-off-by: Marcel Cornu <marcel.d.cornu@intel.com>
 2023-12-13 17:03:16 +00:00
Marcel Cornu
0052080f53 erasure_code: optimize AVX2 GFNI 2 vector dot product 
Signed-off-by: Marcel Cornu <marcel.d.cornu@intel.com>
 2023-12-11 22:44:07 +00:00
Marcel Cornu
3f87141d03 erasure_code: optimize AVX2 GFNI single vector dot product 
Signed-off-by: Marcel Cornu <marcel.d.cornu@intel.com>
 2023-12-11 22:44:07 +00:00
Marcel Cornu
164d9ff1f0 erasure_code: add 2 vector AVX2 dot product with GFNI implementation 
Signed-off-by: Marcel Cornu <marcel.d.cornu@intel.com>
 2023-12-11 22:44:07 +00:00
Pablo de Lara
f82746491e tools: check code style first 
Signed-off-by: Pablo de Lara <pablo.de.lara.guarch@intel.com>
 2023-12-11 15:23:56 +00:00
Pablo de Lara
8f2634aeac raid: remove unneeded load 
Signed-off-by: Pablo de Lara <pablo.de.lara.guarch@intel.com>
 2023-12-11 09:31:11 +00:00
Pablo de Lara
5d6092c832 raid: optimize final parity check 
Signed-off-by: Pablo de Lara <pablo.de.lara.guarch@intel.com>
 2023-12-11 09:31:11 +00:00
Pablo de Lara
bf8f2a25ba raid: fix function descriptions 
Signed-off-by: Pablo de Lara <pablo.de.lara.guarch@intel.com>
 2023-12-11 09:31:11 +00:00
Marcel Cornu
307d737bf2 erasure_code: add 3 vector AVX2 dot product with GFNI implementation 
Signed-off-by: Marcel Cornu <marcel.d.cornu@intel.com>
 2023-12-07 14:01:18 +00:00
Pablo de Lara
4203d9628c igzip: fix null-terminated string setting 
Signed-off-by: Pablo de Lara <pablo.de.lara.guarch@intel.com>
 2023-12-07 13:34:21 +00:00
Pablo de Lara
4a4635e8db igzip: remove unneeded check 
Signed-off-by: Pablo de Lara <pablo.de.lara.guarch@intel.com>
 2023-12-07 13:34:21 +00:00