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https://github.com/intel/isa-l.git
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erasure_code: optimize AVX2 GFNI single vector dot product
Signed-off-by: Marcel Cornu <marcel.d.cornu@intel.com>
This commit is contained in:
Marcel Cornu
Tomasz Kantecki
parent
164d9ff1f0
commit
3f87141d03
@ -47,17 +47,17 @@
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%define tmp r11
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%define tmp2 r10
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%define tmp3 r12 ;must be saved and restored
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%define tmp4 r13 ;must be saved and restored
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%define tmp3 r12 ; must be saved and restored
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%define stack_size 1*8
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%define func(x) x: endbranch
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%macro FUNC_SAVE 0
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push r12
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push r13
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sub rsp, stack_size
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mov [rsp + 0*8], r12
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%endmacro
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%macro FUNC_RESTORE 0
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pop r13
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pop r12
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mov r12, [rsp + 0*8]
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add rsp, stack_size
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%endmacro
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%endif
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@ -67,32 +67,37 @@
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%define arg2 r8
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%define arg3 r9
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%define arg4 r12 ; must be saved, loaded and restored
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%define arg5 r13 ; must be saved and restored
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%define arg4 r12 ; must be saved, loaded and restored
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%define arg5 r15 ; must be saved and restored
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%define tmp r11
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%define tmp2 r10
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%define tmp3 r14
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%define tmp4 r15
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%define stack_size 0*16 + 5*8 ; must be an odd multiple of 8
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%define tmp3 r13 ; must be saved and restored
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%define stack_size 4*16 + 3*8 ; must be an odd multiple of 8
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%define arg(x) [rsp + stack_size + 8 + 8*x]
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%define func(x) proc_frame x
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%macro FUNC_SAVE 0
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alloc_stack stack_size
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mov [rsp + 0*8], r12
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mov [rsp + 1*8], r13
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mov [rsp + 2*8], r14
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mov [rsp + 3*8], r15
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end_prolog
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mov arg4, arg(4)
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alloc_stack stack_size
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vmovdqa [rsp + 0*16], xmm6
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vmovdqa [rsp + 1*16], xmm7
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vmovdqa [rsp + 2*16], xmm8
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vmovdqa [rsp + 3*16], xmm9
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mov [rsp + 4*16 + 0*8], r12
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mov [rsp + 4*16 + 1*8], r13
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mov [rsp + 4*16 + 2*8], r15
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end_prolog
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mov arg4, arg(4)
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%endmacro
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%macro FUNC_RESTORE 0
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mov r12, [rsp + 0*8]
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mov r13, [rsp + 1*8]
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mov r14, [rsp + 2*8]
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mov r15, [rsp + 3*8]
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add rsp, stack_size
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vmovdqa xmm6, [rsp + 0*16]
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vmovdqa xmm7, [rsp + 1*16]
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vmovdqa xmm8, [rsp + 2*16]
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vmovdqa xmm9, [rsp + 3*16]
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mov r12, [rsp + 4*16 + 0*8]
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mov r13, [rsp + 4*16 + 1*8]
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mov r15, [rsp + 4*16 + 2*8]
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add rsp, stack_size
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%endmacro
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%endif
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@ -106,7 +111,6 @@
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%define vec_i tmp2
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%define pos rax
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%ifndef EC_ALIGNED_ADDR
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;;; Use Un-aligned load/store
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%define XLDR vmovdqu
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@ -122,95 +126,193 @@
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%endif
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%endif
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%define xgft1 ymm2
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%define x0l ymm0
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%define x0h ymm1
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%define x0x ymm2
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%define x0 ymm0
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%define xp1 ymm1
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%define xp1l ymm3
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%define xp1h ymm4
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%define xp1x ymm5
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%define xgft1 ymm6
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%define xgft2 ymm7
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%define xgft3 ymm8
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%define xtmp1 ymm9
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%define x0 x0l
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%define xp1 xp1l
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%define xp2 xp2l
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%define xp3 xp3l
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default rel
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[bits 64]
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section .text
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;;
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;; Encodes 32 bytes of all "k" sources into 32 bytes (single parity disk)
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;; Encodes 96 bytes of all "k" sources into 96 bytes (single parity disk)
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;;
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%macro ENCODE_32B 0
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vpxor xp1, xp1, xp1
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mov tmp, mul_array
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xor vec_i, vec_i
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%macro ENCODE_96B 0
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vpxor xp1l, xp1l, xp1l
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vpxor xp1h, xp1h, xp1h
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vpxor xp1x, xp1x, xp1x
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mov tmp, mul_array
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xor vec_i, vec_i
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%%next_vect:
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mov ptr, [src + vec_i]
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XLDR x0, [ptr + pos] ;Get next source vector (32 bytes)
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add vec_i, 8
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;; load next source vector
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mov ptr, [src + vec_i]
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XLDR x0l, [ptr + pos]
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XLDR x0h, [ptr + pos + 32]
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XLDR x0x, [ptr + pos + 64]
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add vec_i, 8
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vbroadcastsd xgft1, [tmp]
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add tmp, 8
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add tmp, 8
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GF_MUL_XOR VEX, x0, xgft1, xgft1, xp1
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GF_MUL_XOR VEX, x0l, xgft1, xtmp1, xp1l
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GF_MUL_XOR VEX, x0h, xgft1, xtmp1, xp1h
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GF_MUL_XOR VEX, x0x, xgft1, xtmp1, xp1x
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cmp vec_i, vec
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jl %%next_vect
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cmp vec_i, vec
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jl %%next_vect
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XSTR [dest1 + pos], xp1
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XSTR [dest1 + pos], xp1l
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XSTR [dest1 + pos + 32], xp1h
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XSTR [dest1 + pos + 64], xp1x
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%endmacro
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;;
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;; Encodes less than 32 bytes of all "k" sources and updates single parity disk
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;; Encodes 64 bytes of all "k" sources into 64 bytes (single parity disk)
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;;
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%macro ENCODE_LT_32B 1
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%define %%LEN %1
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vpxor xp1, xp1, xp1
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mov tmp, mul_array
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xor vec_i, vec_i
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%macro ENCODE_64B 0
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vpxor xp1l, xp1l, xp1l
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vpxor xp1h, xp1h, xp1h
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mov tmp, mul_array
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xor vec_i, vec_i
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%%next_vect:
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mov ptr, [src + vec_i]
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simd_load_avx2 x0, ptr + pos, %%LEN, tmp3, tmp4 ;Get next source vector
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add vec_i, 8
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;; load next source vector
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mov ptr, [src + vec_i]
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XLDR x0l, [ptr + pos]
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XLDR x0h, [ptr + pos + 32]
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add vec_i, 8
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vbroadcastsd xgft1, [tmp]
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add tmp, 8
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add tmp, 8
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GF_MUL_XOR VEX, x0l, xgft1, xtmp1, xp1l
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GF_MUL_XOR VEX, x0h, xgft1, xgft1, xp1h
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cmp vec_i, vec
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jl %%next_vect
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XSTR [dest1 + pos], xp1l
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XSTR [dest1 + pos + 32], xp1h
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%endmacro
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;;
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;; Encodes 32 bytes of all "k" sources into 32 bytes (single parity disks)
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;;
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%macro ENCODE_32B 0
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vpxor xp1, xp1, xp1
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mov tmp, mul_array
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xor vec_i, vec_i
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%%next_vect:
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;; load next source vector
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mov ptr, [src + vec_i]
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XLDR x0, [ptr + pos]
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add vec_i, 8
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vbroadcastsd xgft1, [tmp]
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add tmp, 8
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GF_MUL_XOR VEX, x0, xgft1, xgft1, xp1
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cmp vec_i, vec
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jl %%next_vect
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cmp vec_i, vec
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jl %%next_vect
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lea tmp, [dest1 + pos]
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simd_store_avx2 tmp, xp1, %%LEN, tmp3, tmp4 ;Store updated encoded data
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XSTR [dest1 + pos], xp1
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%endmacro
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;;
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;; Encodes less than 32 bytes of all "k" sources into single parity disks
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;;
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%macro ENCODE_LT_32B 1
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%define %%LEN %1
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vpxor xp1, xp1, xp1
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xor vec_i, vec_i
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%%next_vect:
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; get next source vector
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mov ptr, [src + vec_i]
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simd_load_avx2 x0, ptr + pos, %%LEN, tmp, tmp3
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add vec_i, 8
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vbroadcastsd xgft1, [mul_array]
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add mul_array, 8
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GF_MUL_XOR VEX, x0, xgft1, xgft1, xp1
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cmp vec_i, vec
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jl %%next_vect
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;; Store updated encoded data
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lea ptr, [dest1 + pos]
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simd_store_avx2 ptr, xp1, %%LEN, tmp, vec_i
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%endmacro
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align 16
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mk_global gf_vect_dot_prod_avx2_gfni, function
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func(gf_vect_dot_prod_avx2_gfni)
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FUNC_SAVE
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xor pos, pos
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shl vec, 3 ;vec *= 8. Make vec_i count by 8
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FUNC_SAVE
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cmp len, 32
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jb .len_lt_32
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xor pos, pos
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shl vec, 3 ;; vec *= 8. Make vec_i count by 8
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.loop32:
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cmp len, 96
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jl .len_lt_96
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.loop96:
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ENCODE_96B
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add pos, 96 ;; Loop on 96 bytes at a time first
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sub len, 96
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cmp len, 96
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jge .loop96
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.len_lt_96:
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cmp len, 64
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jl .len_lt_64
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ENCODE_64B
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add pos, 64 ;; encode next 64 bytes
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sub len, 64
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.len_lt_64:
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cmp len, 32
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jl .len_lt_32
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ENCODE_32B
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add pos, 32 ;Loop on 32 bytes at a time
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add pos, 32 ;; encode next 32 bytes
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sub len, 32
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cmp len, 32
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jge .loop32
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.len_lt_32:
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cmp len, 0
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jle .exit
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ENCODE_LT_32B len
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ENCODE_LT_32B len ;; encode final bytes
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.exit:
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vzeroupper
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FUNC_RESTORE
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ret
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FUNC_RESTORE
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ret
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endproc_frame
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%endif ; if AS_FEATURE_LEVEL >= 10
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