As already announced in issue #296, we are removing 32-bit x86 support,
which was not being validated anyway.
Signed-off-by: Pablo de Lara <pablo.de.lara.guarch@intel.com>
The soname is equal to current minus age.
In version 2.31.0 current is 2 and age is set to 0.
In version 2.31.1 current is 2 and age is set to 1.
This means the soname goes backwards from 2 to 1.
The full library version changes from 2.0.31 to 1.1.31
The soname should not go backwards, so this soname change looks like a
mistake that should be reverted.
The current, revision, age for a library should change in one of three ways:
1) increase current by one, reset revision and age to 0.
2) increase current by one, reset revision to 0 and increase age by 1.
3) increase revision by 1, retain the values of current and age.
1) is for non-backward compatible changes to the library (changes or
removals to the old ABI). Soname changes and applications using the
library must be recompiled.
2) is for when there are ABI additions to the library, but no ABI
changes or removals. Application compiled against the old version of
the library don't need to be recompiled, and the soname (current minus
age) does not change.
3) is for minor updates with no ABI additions, changes or removals.
The major, minor, patch version of the software project should not be
used as current, revision, age for the library. Especially true for
using the patch version as age, because that means the soname goes
backwards for patch releases as happened here.
Signed-off-by: Mattias Ellert <mattias.ellert@physics.uu.se>
1. Revert "x86: Generate .note.gnu.property section for ELF output"
This reverts commit 8074e3fe1b9398a9d3b717267790050fc5041594, which is
a hack to work around the old nasm which doesn't support
section .note.gnu.property note alloc noexec align=8
This hack doesn't work for downstream, like:
https://bugzilla.redhat.com/bugzilla/show_bug.cgi?id=2040091
2. If Intel CET is enabled, require nasm with note section support to
add
section .note.gnu.property note alloc noexec align=N
to assembly codes.
Verified with
$ CC="gcc -Wl,-z,cet-report=error -fcf-protection" CXX="g++ -Wl,-z,cet-report=error -fcf-protection" .../configure x86_64-linux
$ make -j8
on Tiger Lake.
Change-Id: I6d66fe6fd054420d7fde35b1508ca9f09defdeca
Signed-off-by: H.J. Lu <hjl.tools@gmail.com>
The variable D= can be used to quickly add defines. This sets a null
default so it can only be overridden by the make command line.
fixes#184
Change-Id: I84615174547f36208d6d577c1e30b6fac83139b3
Signed-off-by: Greg Tucker <greg.b.tucker@intel.com>
The file types.h has long been misnamed and overlaps with
functionality in the test helper routines.
Change-Id: I774047d3a0074198b67a6b4e909f1e2ce1938195
Signed-off-by: Greg Tucker <greg.b.tucker@intel.com>
We should generate .note.gnu.property section with x86 assembly codes
for ELF outputs to mark Intel CET support when Intel CET is enabled
since all input files must be marked with Intel CET support in order
for linker to mark output with Intel CET support. Since nasm and yasm
can't generate the proper .note.gnu.property section, yasm-cet-filter.sh
and yasm-filter.sh are added to generate the proper .note.gnu.property
with linker help.
Verified with
$ CC="gcc -Wl,-z,cet-report=error -fcf-protection" CXX="g++ -Wl,-z,cet-report=error -fcf-protection" .../configure x86_64-linux
$ make -j8
on Linux/x86-64.
Change-Id: I14e03a8a9031c8397dc36939a528cf5a827d775a
Signed-off-by: H.J. Lu <hjl.tools@gmail.com>
1) Implement the ErasureCode function in Altivec Intrinsics
2) Coding style update
Change-Id: I2c81d035f4083e9b011dbf3b741f628813b68606
Thanks-to: Daniel Axtens <dja@axtens.net>
Signed-off-by: Hong Bo Peng <penghb@cn.ibm.com>
Replace hardcode gcc with $(CC). as_filter
will work correct in cross compile
Change-Id: I484d5074abdfc80ed5cd14fdd1358274f306bcfd
Signed-off-by: Jerry Yu <jerry.h.yu@arm.com>
Some CPUs report "illegal instruction" error for the crc test because
they do not support the relevant optional feature . This can be fixed by
introducing CPU feature detection for AArch64 .
The difference with the x86 implementation is the dispatcher . It is based
on the glibc function `getauxval(AT_HWCAP)` and `getauxval(AT_HWCAP2)` , not
registers or instructions .
On a heterogeneous system (big.LITTLE) , it is dangerous to detect CPU
features using identification registers . And while it is possible to use
architectural feature registers from userspace on recent kernels, this
won't necessarily work with older platforms . Thus we use the HW_CAPs
exported from the kernel (and visible in getauxval) as the solution.
- According to kernel suggestion , getauxval should be used for this purpose .
- [CPU Feature detection](https://github.com/torvalds/linux/blob/master/Documentation/arm64/cpu-feature-registers.rst)
- According to AAPCS result/paramter registers should be saved/restore for function call
- [AAPCS](http://infocenter.arm.com/help/topic/com.arm.doc.ihi0055b/IHI0055B_aapcs64.pdf)
- [GLibc](https://sourceware.org/git/gitweb.cgi?p=glibc.git;a=blob;f=sysdeps/aarch64/dl-trampoline.S)
Signed-off-by: Jerry Yu <jerry.h.yu@arm.com>
Change-Id: Ic9abe0d2268ac95537e1abf10acc642fc58a5054
This patch addresses one build failure and fixes several build warnings
for Arm (some for x86 too).
- Fix dynamic relocation link failure of ld.bfd 2.30 on Arm
[log] relocation R_AARCH64_ADR_PREL_PG_HI21 against symbol `xor_gen_neon' which may bind externally can not be used when making a shared object
- Add arch dependent "other_tests" to exclude x86 specific tests on Arm
[log] isa-l/erasure_code/gf_2vect_dot_prod_sse_test.c:181: undefined reference to `gf_2vect_dot_prod_sse'
- Check "fread" return value to fix gcc warnings on Arm and x86
[log] warning: ignoring return value of ‘fread’, declared with attribute warn_unused_result [-Wunused-result]
fread(in_buf, 1, in_size, in_file);
^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
- Fix issue of comparing "char" with "int" on Arm. "char" is unsigned
on Arm by default, an unsigned char will never equal to EOF(-1).
[Log] programs/igzip_cli.c:318:31: warning: comparison is always true due to limited range of data type [-Wtype-limits]
while (tmp != '\n' && tmp != EOF)
^~
- Include <stdlib.h> to several files to fix build warnings on Arm
[log] igzip/igzip_inflate_perf.c:339:5: warning: incompatible implicit declaration of built-in function ‘exit’
exit(0);
^~~~
Change-Id: I82c1b63316b634b3d398ffba2ff815679d9051a8
Signed-off-by: Yibo Cai <yibo.cai@arm.com>
This patch introduces the base, avx and sse optimized zero detect memory function.
The zero detect memory function tests if a memory region is all zeroes. If all the
bytes in the memory region are zero, the function return a zero. Otherwise, if the
memory region has non zero bytes, the zero detect function returns a 1.
Change-Id: If965badf750377124d0067d09f888d0419554998
Signed-off-by: John Kariuki <John.K.Kariuki@intel.com>
Previously included just for struct alignment but all restrictions
have been removed.
Change-Id: I3fa7cbab86fce419b3b3bfccb48d9129bd77cf64
Signed-off-by: Greg Tucker <greg.b.tucker@intel.com>
Moved the afl fuzz test and added llvm fuzz tests including inflate
and round trip compress and inflate. Currently only works with clang,
std makefile and libFuzzer installed. Need to add checking and
support later when libfuzzer is more tightly integrated into the
compiler.
Change-Id: I2db9ad2335d6c5ed846886703b58225f67bcc935
Signed-off-by: Greg Tucker <greg.b.tucker@intel.com>
Makefile.am was missing make checks and Makefile.unx was missing make check.
Added both to be consistent with nmake file.
Change-Id: I08116ac820bccdb5500c794fa1e12c2a9bfdf802
Signed-off-by: Greg Tucker <greg.b.tucker@intel.com>
Allows configure to again build in an external directory. When building ISAL in
an external path, assembler or compiler needs relative include paths.
Signed-off-by: Xiaodong Liu <xiaodong.liu@intel.com>
Reviewed-by: Greg Tucker <greg.b.tucker@intel.com>
