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c86950cb3f
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Duane Sand c86950cb3f [MIPSR6] setjmp supports mips32r6 and FP64A/FPXX reg models 
Save and restore floating point registers via 64-bit
load/stores when possible.  Use assembler's builtin macro
ops to generate pairs of 32-bit load/stores on Mips I cpus.

Some cpus or FR modes have only 16 even-numbered dp fp regs.
This is exposed by _MIPS_FPSET, defined by existing compilers.

(cherry picked from commit dd37251c47)

Change-Id: Ibd43653701a363a77af85121d3cbd229d132a06a
2014-07-23 21:04:20 -07:00
benchmarks Make sure not to construct illegal property names. 2014-07-18 17:00:20 -07:00
libc [MIPSR6] setjmp supports mips32r6 and FP64A/FPXX reg models 2014-07-23 21:04:20 -07:00
libdl Turn on -Wunused and fix the mistakes it uncovers. 2014-06-03 15:22:34 -07:00
libm Revert "Switch libm to building with clang." 2014-07-11 01:24:15 +00:00
libstdc++ Fix a couple of bugs in generate-NOTICE and regenerate the NOTICE files. 2014-07-23 09:39:40 -07:00
linker debuggerd: if PR_GET_DUMPABLE=0, don't ask for dumping 2014-07-23 16:07:33 -07:00
tests debuggerd: if PR_GET_DUMPABLE=0, don't ask for dumping 2014-07-23 16:07:33 -07:00
.gitignore Merge memory checking functionality from sandbox 2010-02-16 11:43:18 -08:00
ABI-bugs.txt PTHREAD_KEYS_MAX cleanup. 2013-12-12 12:51:08 -08:00
Android.mk Remove the simulator target from all makefiles. 2011-07-11 22:11:41 -07:00
CleanSpec.mk Make jemalloc the default choice. 2014-07-11 11:01:30 -07:00
HACKING.txt Rewrite syslog(3) to use Android logging. 2014-07-21 18:55:04 -07:00