Henrik Smiding 3bfa0fd32f Add Silvermont architecture cache sizes
Adds Silvermont specific cache sizes for bionic optimizations.

Change-Id: Ib992f530b8c485121b2874470fd6bed2212adb0f
Signed-off-by: Henrik Smiding <henrik.smiding@intel.com>
2014-04-01 14:41:08 +08:00
2014-03-11 11:20:52 -07:00
2014-02-18 12:02:37 -08:00
2013-12-12 12:51:08 -08:00
2010-03-08 18:04:02 -08:00
Description
No description provided
25 MiB
Languages
C 68.1%
Assembly 16.2%
C++ 13.4%
Makefile 1.1%
Python 0.9%
Other 0.2%