This patch fixes a known bug in bionic libm
due to aliasing issues in gcc 4.2 and 4.4; more
specifically in frexpf.
The function frexpf is used to extract the
mantissa and exponent from a double precision number.
The bug has already been reported here:
https://code.google.com/p/android/issues/detail?id=6697
Change-Id: I2e1f2e0a45906642d2225b9d150ed391d2bf331c
Signed-off-by: Rodrigo Obregon <robregon@ti.com>
Originally, there are _rand48 (in libc/bionic/_rand48.c) and __rand48
(in libc/stdlib/_rand48.c) implemented in bionic. Besides the naming,
the functionality is identical. This patch removes the duplicated
_rand48. Also, drand48 and erand48 are modified accordingly.
Change-Id: Ie5761a0a97f45df8538222a77edacb7c3e0125d7
Although header libc/stdio/local.h declares the macros and private
variables of stdio, there are several internal symbols exposed
unexpectedly.
Change-Id: Ie7a07f85b70322fb9cd05b3c8e1bcc416061eb4b
The change explicitly isolates the assembly-only macros in header
<machine/cpu-features.h> in order to prevent mis-inclusion in C/C++
source files.
Change-Id: I0258e87c5ac3fd24944fb227290ac3b9cac4bfba
In order not to conflict with the symbols defined in file
libc/netbsd/getaddrinfo.c, this patch makes the internal/helper
functions static.
Change-Id: I0f85599e0b4ce0a637d005ff1680e1805dec4380
Ideally __libc_android_abort would be static, but it could not be
because gcc would not allow calling a static function from an asm
statement. Instead, using GCC visibility is work around.
Change-Id: Ifff6b9957ca3f0fc03c75c3e42582a48d43cefa2
1. Make the feature test work by excluding known-deficient processors, so
we don't have to maintain a complete list of all the processors that support
REV and REV16.
2. Don't abuse 'register' to get an effect similar to GCC's +l constraint,
but which was unnecessarily restrictive.
3. Fix __swap64md so _x isn't clobbered, breaking 64-bit swaps.
4. Make <byteswap.h> (which declars bswap_16 and friends) use <endian.h>
rather than <sys/endian.h>, so we get the machine-dependent implementations.
Change-Id: I6a38fad7a9fbe394aff141489617eb3883e1e944
The __ARM_HAVE_LDREX_STREX define is used to replace
the swp instruction with ldrex/strex for ARM architecture
greater than 6 (armv6, armv7 etc.). However the include
file, cpu-features.h, which defines this flag was never
included.
Change-Id: Ia35e18e8b228ec830b2b42b08909515110753f18
Signed-off-by: Christian Bejram <christian.bejram@stericsson.com>
ARMv6 ISA has several instructions to handle data in different byte order.
For endian conversion (byte swapping) of single data words, it might be a
good idea to use the REV/REV16 instruction simply.
Change-Id: Ic4a5ed6254e082763e54aa70d428f59a0088636e
