This patch defines a few new macros that can be used to control the
visibility of symbols exported by the C library:
- ENTRY_PRIVATE() can be used in assembly sources to indicate
that an assembler function should have "hidden" visibility, i.e.
will never be exported by the C library's shared library.
This is the equivalent of using __LIBC_HIDDEN__ for a C function,
but ENTRY_PRIVATE() works like ENTRY(), and must be used with
END() to tag the end of the function.
- __LIBC_ABI_PUBLIC__ can be used to tag a C functions as being
part of the C library's public ABI. This is important for a
few functions that must be exposed by the NDK to maintain
binary compatibility.
Once a symbol has been tagged with this macro, it shall
*never* be removed from the library, even if it becomes
directly unused due to implementation changes
(e.g. __is_threaded).
- __LIBC_ABI_PRIVATE__ can be used for C functions that should
always be exported by the C library because they are used by
other libraries in the platform, but should not be exposed
by the NDK. It is possible to remove such symbols from the
implementation if all callers are also modified.
+ Add missing END() assembly macro for x86
Change-Id: Ia96236ea0dbec41d57bea634b39d246b30e5e234
The xattr system calls are required for the SE Android userspace in
order to get and set file security contexts. In particular, libselinux
requires these calls.
Change-Id: I78f5eb3d8f3384aed0a5e7c6a6f001781d982017
Add bionic libc to support readahead system call.
This is needed to enable sreadahead to work.
Change-Id: I3856e1a3833db82e6cf42fd34af7631bd40cc723
Author: Winson Yung <winson.w.yung@intel.com>
Signed-off-by: Bruce Beare <bruce.j.beare@intel.com>
Without this change strcmp size is zero (not set), and it gets
ignored by Valgrind. Changes to memcpy and atexit don't affect the
generated binary in any way.
Change-Id: I05818cb5951f75901dc8c0eef02807a2e83a9231
This patch ensure that __aeabi_f2uiz is embedded in our C library.
This is needed to avoid breaking certain applications when they are
loaded in ICS. It is likely that the issue is due to mis-linked
binaries generated with the stand-alone toolchain (the problem
should not exist if you use ndk-build), but this fix is easier
than asking all app developers to fix their custom build system.
If you want more technical details, read the comments inside
libgcc_compat.c
Change-Id: I59ac1fc781ecb70b90b5573c5a3c67560ca8f270
Unfortunately, legacy .so files for ARM don't have a correct crtbegin file.
Consequently, we have to grandfather the old __dso_handle behaviour.
Add some ifdefs for ARM to allow it to use the old code until we can work
out a transition.
Change-Id: I6a28f368267d792c94e1d985d8344023bc632f6f
Author: H.J. Lu <hongjiu.lu@intel.com>
Signed-off-by: Bruce Beare <bruce.j.beare@intel.com>
Reference results of the experiments on TI OMAP3430 at 600 MHz
$ bench_strcmp -N "strcmp_1k" -s 1k -I 200
[original C code]
prc thr usecs/call samples errors cnt/samp size
strcmp_1k 1 1 10.38000 102 0 15000 1024
[ARM optimized code]
prc thr usecs/call samples errors cnt/samp size
strcmp_1k 1 1 3.08840 88 0 15000 1024
The work was derived from ARM Ltd, contributed to newlib, and reworked
for Android by Linaro.
Change-Id: Ib0d5755e1eb9adb07d80ef0252f57a5c4c57a425
Signed-off-by: Jim Huang <jserv@0xlab.org>
The kernel has supported this syscall for quite some time now,
but bionic did not. Now that there is a need for it, let's
add it to bionic.
Change-Id: Ifcef3e46f1438d79435b600c4e6063857ab16903
Used the new gensyscalls.py script to update the ARM syscalls with the
BEGIN(x) and END(x) macros to give size information for the code of the
syscall. Useful for valgrind.
Change-Id: I8c481c8928401ac110fd19b087f7d67e4db39326
Add a macro to annotate function end and start using both ENTRY and END
for each function. This allows valgrind (and presumably other debugging
tools) to use the debug symbols to trace the functions.
Change-Id: I5f09cef8e22fb356eb6f5cee952b031e567599b6
This patch improves the handling of 64-bit parameters in syscalls on ARM.
The ARM EABI mandates that 64-bit quantities be passed in even/odd register
pairs, which requires special treatment.
This allows us to simplify our implementations of pread() and pwrite()
and remove the C stubs for pread64() and pwrite64().
Also add ftruncate64() to <unistd.h>
Change-Id: I407e2fd223ba0093dd2d0b04c6152fadfc9ce3ef
Bug 3107933
This adds the cpu_set_t type definition and related functions
and macros used to handle CPU thread affinity.
sched_getcpu()
sched_setaffinity()
sched_getaffinity()
Change-Id: If382ecafde8926341a88478062b275553645065b
This elimates the makefile warning at the beginning of each build:
libc_common_intermediates/arch-arm/syscalls/eventfd.o' given more than once in the same rule.
Change-Id: I25cc0c373d55b5036dd17811a595c097fd6ca69a
The change explicitly isolates the assembly-only macros in header
<machine/cpu-features.h> in order to prevent mis-inclusion in C/C++
source files.
Change-Id: I0258e87c5ac3fd24944fb227290ac3b9cac4bfba
Merge commit 'bd8d987b3c3aa6d9d00cede2cb091f00bdb42204' into gingerbread-plus-aosp
* commit 'bd8d987b3c3aa6d9d00cede2cb091f00bdb42204':
libc: remove C++ comments from public headers.
Merge commit '3cf53d1a7814e1520df09d24b009c16f4f27db0d' into gingerbread-plus-aosp
* commit '3cf53d1a7814e1520df09d24b009c16f4f27db0d':
Fixes for the ARM-specific bswap_16, bswap_32, and bswap_64.
1. Make the feature test work by excluding known-deficient processors, so
we don't have to maintain a complete list of all the processors that support
REV and REV16.
2. Don't abuse 'register' to get an effect similar to GCC's +l constraint,
but which was unnecessarily restrictive.
3. Fix __swap64md so _x isn't clobbered, breaking 64-bit swaps.
4. Make <byteswap.h> (which declars bswap_16 and friends) use <endian.h>
rather than <sys/endian.h>, so we get the machine-dependent implementations.
Change-Id: I6a38fad7a9fbe394aff141489617eb3883e1e944
Merge commit '312be567a03aaf851707a268807ee666b12f8c74' into gingerbread-plus-aosp
* commit '312be567a03aaf851707a268807ee666b12f8c74':
Use ARMv6 instruction for handling byte order
Merge commit '3a1bbee36b773862e88c6f1895b607c0cd81b499' into gingerbread-plus-aosp
* commit '3a1bbee36b773862e88c6f1895b607c0cd81b499':
Add eventfd system call support
ARMv6 ISA has several instructions to handle data in different byte order.
For endian conversion (byte swapping) of single data words, it might be a
good idea to use the REV/REV16 instruction simply.
Change-Id: Ic4a5ed6254e082763e54aa70d428f59a0088636e
With this patch _and_ an upcoming build/ patch, the destruction
of static C++ objects contained in shared libraries will happen
properly when dlclose() is called.
Note that this change introduces crtbegin_so.S and crtend_so.S which
are currently ignored by the build system.
+ move definition of __dso_handle to the right place
(before that, all shared libraries used the __dso_handle
global variable from the C library).
Note that we keep a 'weak' __dso_handle in aeabi.c to avoid
breaking the build until the next patch to build/core/combo/
appears. We will be able to remove that later.
+ move bionic/aeabi.c to arch-arm/bionic/ (its proper location)
NOTE: The NDK will need to be modified to enable this feature in
the shared libraries that are generated through it.
Change-Id: I99cd801375bbaef0581175893d1aa0943211b9bc
With this patch, _and_ an upcoming build/ patch, the destruction
of static C++ objects contained in shared libraries will happen
properly when dlclose() is called.
Note that this change introduces crtbegin_so.S and crtend_so.S which
are currently ignored by the build system.
+ move definition of __dso_handle to the right place
(before that, all shared libraries used the __dso_handle
global variable from the C library).
Note that we keep a 'weak' __dso_handle in aeabi.c to avoid
breaking the build until the next patch to build/core/combo/
appears. We will be able to remove that later.
+ move bionic/aeabi.c to arch-arm/bionic/ (its proper location)
Change-Id: Ie771aa204e3acbdf02fd30ebd4150373a1398f39
NOTE: The NDK will need to be modified to enable this feature in
the shared libraries that are generated through it.
Update ARM atomic ops to use LDREX/STREX. Stripped out #if 0 chunk.
Insert explicit memory barriers in pthread and semaphore code.
For bug 2721865.
Change-Id: I0f153b797753a655702d8be41679273d1d5d6ae7
