am 3cf53d1a
: Fixes for the ARM-specific bswap_16, bswap_32, and bswap_64.
Merge commit '3cf53d1a7814e1520df09d24b009c16f4f27db0d' into gingerbread-plus-aosp * commit '3cf53d1a7814e1520df09d24b009c16f4f27db0d': Fixes for the ARM-specific bswap_16, bswap_32, and bswap_64.
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commit
8120a8df84
@ -33,14 +33,14 @@
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#ifdef __GNUC__
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/* NOTE: header <machine/cpu-features.h> could not be included directly
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* since it defines extra macros, such as PLD.
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/*
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* REV and REV16 weren't available on ARM5 or ARM4.
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* We don't include <machine/cpu-features.h> because it pollutes the
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* namespace with macros like PLD.
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*/
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#if defined(__ARM_ARCH_7A__) || defined(__ARM_ARCH_7R__) || \
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defined(__ARM_ARCH_7__) || \
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defined(__ARM_ARCH_6__) || defined(__ARM_ARCH_6J__) || \
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defined(__ARM_ARCH_6K__) || defined(__ARM_ARCH_6Z__) || \
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defined(__ARM_ARCH_6ZK__) || defined(__ARM_ARCH_6T2__)
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#if !defined __ARM_ARCH_5__ && !defined __ARM_ARCH_5T__ && \
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!defined __ARM_ARCH_5TE__ && !defined __ARM_ARCH_5TEJ__ && \
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!defined __ARM_ARCH_4T__ && !defined __ARM_ARCH_4__
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/* According to RealView Assembler User's Guide, REV and REV16 are available
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* in Thumb code and 16-bit instructions when used in Thumb-2 code.
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@ -50,44 +50,40 @@
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*
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* REV16 Rd, Rm
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* Rd and Rm must both be Lo registers.
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*
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* The +l constraint takes care of this without constraining us in ARM mode.
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*/
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#ifdef __thumb__
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#define REV_LO_REG asm("r4")
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#else
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#define REV_LO_REG
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#endif
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#define __swap16md(x) ({ \
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register u_int16_t _x REV_LO_REG = (x); \
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__asm volatile ("rev16 %0, %0" : "+r" (_x)); \
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_x; \
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#define __swap16md(x) ({ \
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register u_int16_t _x = (x); \
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__asm volatile ("rev16 %0, %0" : "+l" (_x)); \
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_x; \
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})
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#define __swap32md(x) ({ \
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register u_int32_t _x REV_LO_REG = (x); \
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__asm volatile ("rev %0, %0" : "+r" (_x)); \
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_x; \
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#define __swap32md(x) ({ \
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register u_int32_t _x = (x); \
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__asm volatile ("rev %0, %0" : "+l" (_x)); \
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_x; \
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})
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#define __swap64md(x) ({ \
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u_int64_t _x = (x); \
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(u_int64_t) __swap32md(_x >> 32) | \
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(u_int64_t) __swap32md(_x & 0xffffffff) << 32; \
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#define __swap64md(x) ({ \
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u_int64_t _swap64md_x = (x); \
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(u_int64_t) __swap32md(_swap64md_x >> 32) | \
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(u_int64_t) __swap32md(_swap64md_x & 0xffffffff) << 32; \
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})
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/* Tell sys/endian.h we have MD variants of the swap macros. */
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#define MD_SWAP
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#endif /* __ARM_ARCH__ */
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#endif /* __GNUC__ */
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#endif /* __ARM_ARCH__ */
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#endif /* __GNUC__ */
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#ifdef __ARMEB__
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#define _BYTE_ORDER _BIG_ENDIAN
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#else
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#define _BYTE_ORDER _LITTLE_ENDIAN
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#endif
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#define __STRICT_ALIGNMENT
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#define __STRICT_ALIGNMENT
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#include <sys/types.h>
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#include <sys/endian.h>
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#endif /* !_ARM_ENDIAN_H_ */
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#endif /* !_ARM_ENDIAN_H_ */
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@ -28,7 +28,8 @@
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#ifndef _BYTESWAP_H_
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#define _BYTESWAP_H_
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#include <sys/endian.h>
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/* endian.h rather than sys/endian.h so we get the machine-specific file. */
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#include <endian.h>
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#define bswap_16(x) swap16(x)
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#define bswap_32(x) swap32(x)
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