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Author SHA1 Message Date
Elliott Hughes
7492875448 am 852935b6: am 5d4b8421: Merge "Verify architecture neutral syscall numbers" 
* commit '852935b68f8b516f9f3f9cdff410b6a4b0cefc28':
  Verify architecture neutral syscall numbers
 2012-11-29 15:15:33 -08:00
Elliott Hughes
3b48de92c7 am 56eb0bfe: am 78114220: Merge "Define DEFFILEMODE and friends" 
* commit '56eb0bfedb5747407f1db5145f571695450c178d':
  Define DEFFILEMODE and friends
 2012-11-29 15:15:27 -08:00
Naseer Ahmed
80a161db5c am ef7eea55: am 940e4c9d: am f61e5020: msm_mdp: Update header for 4 layer support 
* commit 'ef7eea5538308d4a6d40cf964a6676409e890c24':
  msm_mdp: Update header for 4 layer support
 2012-11-29 15:12:33 -08:00
Elliott Hughes
852935b68f am 5d4b8421: Merge "Verify architecture neutral syscall numbers" 
* commit '5d4b8421b3d040e8c2bdb83c8adb2752eab7b4b6':
  Verify architecture neutral syscall numbers
 2012-11-29 14:51:56 -08:00
Elliott Hughes
56eb0bfedb am 78114220: Merge "Define DEFFILEMODE and friends" 
* commit '781142208033e72b3773bcfab83cddf5ca34c9b2':
  Define DEFFILEMODE and friends
 2012-11-29 14:37:06 -08:00
Elliott Hughes
5d4b8421b3 Merge "Verify architecture neutral syscall numbers" 2012-11-29 14:34:19 -08:00
Elliott Hughes
7811422080 Merge "Define DEFFILEMODE and friends" 2012-11-29 14:31:19 -08:00
Naseer Ahmed
ef7eea5538 am 940e4c9d: am f61e5020: msm_mdp: Update header for 4 layer support 
* commit '940e4c9d9218ee183c8eb522beb9838c0482084b':
  msm_mdp: Update header for 4 layer support
 2012-11-29 14:28:29 -08:00
Naseer Ahmed
940e4c9d92 am f61e5020: msm_mdp: Update header for 4 layer support 
* commit 'f61e50201b7d5e793a479979c304d3388ca1405f':
  msm_mdp: Update header for 4 layer support
 2012-11-29 12:40:57 -08:00
Chris Dearman
285b02582b Verify architecture neutral syscall numbers 
Also removed some dead code and fixed comment

Change-Id: I5d6a04b4af3d95e34368136cf2eeb3c9b6f99769
Signed-off-by: Chris Dearman <chris@mips.com>
 2012-11-29 12:04:23 -08:00
Hakan Kvist
f27b7fb056 Define DEFFILEMODE and friends 
Define the macros ACCESSPERMS, ALLPERMS and DEFFILEMODE.
These macros originates from BSD but has been available in glibc
for quite some time.

Change-Id: I429cd30aa4e73f53b153ee7740070cebba166c57
 2012-11-29 11:53:33 -08:00
Naseer Ahmed
f61e50201b msm_mdp: Update header for 4 layer support 
Bug: 7626586
Change-Id: I37730470dc09b7a9d6336b1603f87efd98f45e97
Signed-off-by: Iliyan Malchev <malchev@google.com>
 2012-11-29 10:47:35 -08:00
Elliott Hughes
321b545ad9 am dea13da3: Merge "Clean up _BYTE_ORDER definitions for better x86 portability." 
* commit 'dea13da3407873e4f3fec9ba1a04b4fdacea07f4':
  Clean up _BYTE_ORDER definitions for better x86 portability.
 2012-11-27 18:44:17 -08:00
Elliott Hughes
dea13da340 Merge "Clean up _BYTE_ORDER definitions for better x86 portability." 2012-11-27 17:34:52 -08:00
Elliott Hughes
b15c58bb0f Clean up _BYTE_ORDER definitions for better x86 portability. 
We'd manually hacked _BYTE_ORDER into the arm and mips "_types.h" headers,
but not into the x86 one. Judging by upstream, _BYTE_ORDER should be in
the "endian.h" headers instead, so let's uniformly do that.

I've also ironed out some of the other differences between the different
architectures' header files too.

Bug: http://code.google.com/p/android/issues/detail?id=39824
Change-Id: I19d3af7ffd74e1c02b1b6886aec0f0d11f44ab8d
 2012-11-27 14:18:04 -08:00
Elliott Hughes
4867b00666 am f2de6b0f: Merge "Do not include \'\0\' when writing error messages to stderr" 
* commit 'f2de6b0f6e873f9cb28682b8fc6764b0ab41c6ee':
  Do not include '\0' when writing error messages to stderr
 2012-11-26 16:04:19 -08:00
Elliott Hughes
f2de6b0f6e Merge "Do not include '\0' when writing error messages to stderr" 2012-11-26 15:44:58 -08:00
Chris Dearman
20a24403bc Do not include '\0' when writing error messages to stderr 
Change-Id: I6adc806c3920e5a4ae61ca55c40613fcf338b18c
Signed-off-by: Chris Dearman <chris@mips.com>
 2012-11-26 15:43:17 -08:00
Elliott Hughes
03ff63cee0 am 429b05a1: Merge "Upgrade to tzdata2012j." 
* commit '429b05a1dfa71c6085590d60e0bdfa09beb50844':
  Upgrade to tzdata2012j.
 2012-11-26 15:12:30 -08:00
Elliott Hughes
429b05a1df Merge "Upgrade to tzdata2012j." 2012-11-26 14:52:07 -08:00
Elliott Hughes
5d2ef8724d Upgrade to tzdata2012j. 
This reflects the following changes recently circulated on the tz mailing list:

  Libya moved to CET [2012-11-11], but with DST planned [2013].
  (Thanks to Even Scharning, Steffen Thorsen, and Tim Parenti.)

I also had to change the script to cope with:

  Signatures now have the extension .asc, not .sign, as that's more
  standard.  (Thanks to Phil Pennock.)

Change-Id: Ie9711c5c796b3c122daea9690929edcc3ddd32da
 2012-11-26 14:51:39 -08:00
Nick Kralevich
c16ea16134 am 8784709a: Merge "We should use load_bias. This patch fixes MIPS NDK device exception test failures." 
* commit '8784709a2cfe6d32b5fff2c6b826b8d9cbf73d7b':
  We should use load_bias.  This patch fixes MIPS NDK device exception test failures.
 2012-11-19 11:08:49 -08:00
Nick Kralevich
8784709a2c Merge "We should use load_bias. This patch fixes MIPS NDK device exception test failures." 2012-11-19 10:45:18 -08:00
Chao-Ying Fu
c5db969aa4 We should use load_bias. This patch fixes MIPS NDK device exception test failures. 
Change-Id: I4b718c36666e66062c1f13e4deea1ec7a7951c54
 2012-11-19 10:30:15 -08:00
Robert Greenwalt
3269d63772 Merge "Add search domain to dns interface data." 2012-11-16 12:21:33 -08:00
Nick Kralevich
3a681c8db1 am fe07ca04: Merge "Support GNU_RELRO for static executables." 
* commit 'fe07ca04e4af6c43d068df0e23dc83431053fc22':
  Support GNU_RELRO for static executables.
 2012-11-16 11:27:30 -08:00
Nick Kralevich
aec9a254a2 am 170168cd: Merge "Temporarily address gcc 4.7 breakage." 
* commit '170168cdf37111b45b15817fab9e3df54cbc27b7':
  Temporarily address gcc 4.7 breakage.
 2012-11-16 10:42:55 -08:00
Nick Kralevich
fe07ca04e4 Merge "Support GNU_RELRO for static executables." 2012-11-16 08:45:52 -08:00
Nick Kralevich
170168cdf3 Merge "Temporarily address gcc 4.7 breakage." 2012-11-15 15:57:15 -08:00
Nick Kralevich
83697b8b76 Temporarily address gcc 4.7 breakage. 
Change-Id: I8ebb2d5df2f8f8aedf252c94ff69505e61ed0a74
 2012-11-15 15:48:19 -08:00
Nick Kralevich
ac3de8d080 Support GNU_RELRO for static executables. 
In 9ec0f03a0d, we added dynamic
linker support for GNU_RELRO protections. These protections
make certain regions of memory read-only, helping protect certain
data structures from accidental or deliberate modifications.

This change adds GNU_RELRO support to STATIC executables.  We can
determine if we're compiled with relro protections by examining
our own program headers, which is passed to us by the kernel
in the AT_PHDR and AT_PHNUM auxiliary vectors.

Parts of this code were stolen from the dynamic linker.

Change-Id: Ic17eb5f932218538ec25347ece314d4dc7549de1
 2012-11-15 12:52:06 -08:00
Robert Greenwalt
6f3222ea42 Add search domain to dns interface data. 
This doesn't currently use this info - it's still using the system
property based data-passing.  That change is comming.

bug:6799630
Change-Id: I725463209855447cd04bf1457281f3084fffd692
 2012-11-13 11:50:57 -08:00
Elliott Hughes
da273a17e7 am c079dfe4: am 6542ac03: Merge "Add a memmove(3) benchmark." 
* commit 'c079dfe4153941e6da881be9a143b41a1112c2ac':
  Add a memmove(3) benchmark.
 2012-11-09 22:44:35 -08:00
Elliott Hughes
02a6ca7ef5 am d86d713b: am b62e2770: Merge "Add optimized version of memset for Cortex A9" 
* commit 'd86d713b6345ac9c030aeb0eedee11fc17d2fba1':
  Add optimized version of memset for Cortex A9
 2012-11-09 22:44:17 -08:00
Elliott Hughes
c079dfe415 am 6542ac03: Merge "Add a memmove(3) benchmark." 
* commit '6542ac0380581e0cd0ad47e2763b732d93e9d6bd':
  Add a memmove(3) benchmark.
 2012-11-09 16:21:08 -08:00
Elliott Hughes
6542ac0380 Merge "Add a memmove(3) benchmark." 2012-11-09 16:17:35 -08:00
Elliott Hughes
d86d713b63 am b62e2770: Merge "Add optimized version of memset for Cortex A9" 
* commit 'b62e2770e7c41f9cbe41acca4f25966eea2bc533':
  Add optimized version of memset for Cortex A9
 2012-11-09 15:15:09 -08:00
Elliott Hughes
b62e2770e7 Merge "Add optimized version of memset for Cortex A9" 2012-11-09 15:06:50 -08:00
Henrik Smiding
884e4f839b Add optimized version of memset for Cortex A9 
Adds new code to function memset, optimized for Cortex A9.

Copyright (C) ST-Ericsson SA 2010

Added neon implementation

Author: Henrik Smiding henrik.smiding@stericsson.com for ST-Ericsson.

Change-Id: Id3c87767953439269040e15bd30a27aba709aef6
Signed-off-by: Christian Bejram <christian.bejram@stericsson.com>
 2012-11-09 15:05:32 -08:00
Elliott Hughes
fbe44ec043 Add a memmove(3) benchmark. 
Change-Id: I9c0ffae0b5aae29521b7e68e5ce2318b5a401cba
 2012-11-09 14:59:21 -08:00
Elliott Hughes
b3dc5c60aa am 0b25791a: am 49677dec: Merge "Add optimized version of memcpy for Cortex A9" 
* commit '0b25791a2819e01b28f777901facd5db03ba6961':
  Add optimized version of memcpy for Cortex A9
 2012-11-08 18:18:35 -08:00
Elliott Hughes
0b25791a28 am 49677dec: Merge "Add optimized version of memcpy for Cortex A9" 
* commit '49677deca2c2984ae6c0a3df8fbada7132e82940':
  Add optimized version of memcpy for Cortex A9
 2012-11-08 18:13:30 -08:00
Elliott Hughes
aad391b8a6 am 6181aead: am c2132915: Merge "Add optimized version of memcmp for Cortex A9" 
* commit '6181aead7b052503518d3c4ee836b7e9ddeca157':
  Add optimized version of memcmp for Cortex A9
 2012-11-08 18:11:55 -08:00
Elliott Hughes
1233104f5e am 66eada96: am 7aca3103: Merge "Simple google3-compatible benchmarking." 
* commit '66eada963290104e56a3c1785ff8a08ee5d800b5':
  Simple google3-compatible benchmarking.
 2012-11-08 18:11:54 -08:00
Elliott Hughes
49677deca2 Merge "Add optimized version of memcpy for Cortex A9" 2012-11-08 18:04:28 -08:00
Henrik Smiding
6d0bcdc832 Add optimized version of memcpy for Cortex A9 
Adds new code to memcpy function, optimized for Cortex A9.
Adds new ARM-only loop, for operations where source and
destination are aligned.

Copyright (C) ST-Ericsson SA 2010

Modified neon implementation to fit Cortex A9 cache line size,
for those running 32 bytes L2 cache line size.
Also split the implementation in aligned and unaligned access,
for those that allows unaligned memory access with Neon.
For totally aligned operations, arm-only code is used.

Change-Id: I95ebf6164cd6486b12a7e3e98e369db21e7e18d2
Author: Henrik Smiding henrik.smiding@stericsson.com for ST-Ericsson.
Signed-off-by: Christian Bejram <christian.bejram@stericsson.com>
 2012-11-08 18:02:14 -08:00
Elliott Hughes
6181aead7b am c2132915: Merge "Add optimized version of memcmp for Cortex A9" 
* commit 'c2132915158014f578c3f003c9399961fe8d6da2':
  Add optimized version of memcmp for Cortex A9
 2012-11-08 17:53:41 -08:00
Elliott Hughes
c213291515 Merge "Add optimized version of memcmp for Cortex A9" 2012-11-08 17:48:19 -08:00
Elliott Hughes
66eada9632 am 7aca3103: Merge "Simple google3-compatible benchmarking." 
* commit '7aca3103069d7603cff47db7141b64f6a9d94f86':
  Simple google3-compatible benchmarking.
 2012-11-08 16:31:13 -08:00
Elliott Hughes
7aca310306 Merge "Simple google3-compatible benchmarking." 2012-11-08 16:26:45 -08:00