Merge "Add optimized version of memset for Cortex A9"
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b62e2770e7
@ -26,23 +26,113 @@
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* SUCH DAMAGE.
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*/
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#include <machine/cpu-features.h>
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#include <machine/asm.h>
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/*
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* Optimized memset() for ARM.
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*
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* memset() returns its first argument.
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*/
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#if defined(__ARM_NEON__)
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.fpu neon
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#endif
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ENTRY(bzero)
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mov r2, r1
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mov r1, #0
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END(bzero)
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ENTRY(memset)
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#if defined(__ARM_NEON__)
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#ifdef NEON_MEMSET_DIVIDER
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cmp r2, #NEON_MEMSET_DIVIDER
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bhi 11f
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#endif
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.save {r0}
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stmfd sp!, {r0}
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vdup.8 q0, r1
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#ifndef NEON_UNALIGNED_ACCESS
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/* do we have at least 16-bytes to write (needed for alignment below) */
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cmp r2, #16
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blo 3f
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/* align destination to 16 bytes for the write-buffer */
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rsb r3, r0, #0
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ands r3, r3, #0xF
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beq 2f
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/* write up to 15-bytes (count in r3) */
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sub r2, r2, r3
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movs ip, r3, lsl #31
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strmib r1, [r0], #1
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strcsb r1, [r0], #1
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strcsb r1, [r0], #1
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movs ip, r3, lsl #29
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bge 1f
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// writes 4 bytes, 32-bits aligned
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vst1.32 {d0[0]}, [r0, :32]!
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1: bcc 2f
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// writes 8 bytes, 64-bits aligned
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vst1.8 {d0}, [r0, :64]!
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2:
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#endif
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/* make sure we have at least 32 bytes to write */
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subs r2, r2, #32
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blo 2f
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vmov q1, q0
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1: /* The main loop writes 32 bytes at a time */
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subs r2, r2, #32
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#ifndef NEON_UNALIGNED_ACCESS
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vst1.8 {d0 - d3}, [r0, :128]!
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#else
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vst1.8 {d0 - d3}, [r0]!
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#endif
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bhs 1b
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2: /* less than 32 left */
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add r2, r2, #32
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tst r2, #0x10
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beq 3f
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// writes 16 bytes, 128-bits aligned
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#ifndef NEON_UNALIGNED_ACCESS
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vst1.8 {d0, d1}, [r0, :128]!
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#else
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vst1.8 {d0, d1}, [r0]!
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#endif
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3: /* write up to 15-bytes (count in r2) */
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movs ip, r2, lsl #29
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bcc 1f
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vst1.8 {d0}, [r0]!
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1: bge 2f
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vst1.32 {d0[0]}, [r0]!
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2: movs ip, r2, lsl #31
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strmib r1, [r0], #1
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strcsb r1, [r0], #1
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strcsb r1, [r0], #1
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ldmfd sp!, {r0}
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bx lr
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11:
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#endif
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/*
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* Optimized memset() for ARM.
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*
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* memset() returns its first argument.
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*/
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/* compute the offset to align the destination
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* offset = (4-(src&3))&3 = -src & 3
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*/
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.save {r0, r4-r7, lr}
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stmfd sp!, {r0, r4-r7, lr}
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rsb r3, r0, #0
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@ -70,7 +160,7 @@ ENTRY(memset)
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mov r5, r1
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mov r6, r1
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mov r7, r1
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rsb r3, r0, #0
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ands r3, r3, #0x1C
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beq 3f
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@ -78,7 +168,7 @@ ENTRY(memset)
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andhi r3, r2, #0x1C
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sub r2, r2, r3
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/* conditionnaly writes 0 to 7 words (length in r3) */
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/* conditionally writes 0 to 7 words (length in r3) */
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movs r3, r3, lsl #28
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stmcsia r0!, {r1, lr}
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stmcsia r0!, {r1, lr}
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@ -95,7 +185,7 @@ ENTRY(memset)
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bhs 1b
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2: add r2, r2, #32
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/* conditionnaly stores 0 to 31 bytes */
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/* conditionally stores 0 to 31 bytes */
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movs r2, r2, lsl #28
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stmcsia r0!, {r1,r3,r12,lr}
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stmmiia r0!, {r1, lr}
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