We'd manually hacked _BYTE_ORDER into the arm and mips "_types.h" headers,
but not into the x86 one. Judging by upstream, _BYTE_ORDER should be in
the "endian.h" headers instead, so let's uniformly do that.
I've also ironed out some of the other differences between the different
architectures' header files too.
Bug: http://code.google.com/p/android/issues/detail?id=39824
Change-Id: I19d3af7ffd74e1c02b1b6886aec0f0d11f44ab8d
This reflects the following changes recently circulated on the tz mailing list:
Libya moved to CET [2012-11-11], but with DST planned [2013].
(Thanks to Even Scharning, Steffen Thorsen, and Tim Parenti.)
I also had to change the script to cope with:
Signatures now have the extension .asc, not .sign, as that's more
standard. (Thanks to Phil Pennock.)
Change-Id: Ie9711c5c796b3c122daea9690929edcc3ddd32da
In 9ec0f03a0d, we added dynamic
linker support for GNU_RELRO protections. These protections
make certain regions of memory read-only, helping protect certain
data structures from accidental or deliberate modifications.
This change adds GNU_RELRO support to STATIC executables. We can
determine if we're compiled with relro protections by examining
our own program headers, which is passed to us by the kernel
in the AT_PHDR and AT_PHNUM auxiliary vectors.
Parts of this code were stolen from the dynamic linker.
Change-Id: Ic17eb5f932218538ec25347ece314d4dc7549de1
This doesn't currently use this info - it's still using the system
property based data-passing. That change is comming.
bug:6799630
Change-Id: I725463209855447cd04bf1457281f3084fffd692
Adds new code to function memset, optimized for Cortex A9.
Copyright (C) ST-Ericsson SA 2010
Added neon implementation
Author: Henrik Smiding henrik.smiding@stericsson.com for ST-Ericsson.
Change-Id: Id3c87767953439269040e15bd30a27aba709aef6
Signed-off-by: Christian Bejram <christian.bejram@stericsson.com>
Adds new code to memcpy function, optimized for Cortex A9.
Adds new ARM-only loop, for operations where source and
destination are aligned.
Copyright (C) ST-Ericsson SA 2010
Modified neon implementation to fit Cortex A9 cache line size,
for those running 32 bytes L2 cache line size.
Also split the implementation in aligned and unaligned access,
for those that allows unaligned memory access with Neon.
For totally aligned operations, arm-only code is used.
Change-Id: I95ebf6164cd6486b12a7e3e98e369db21e7e18d2
Author: Henrik Smiding henrik.smiding@stericsson.com for ST-Ericsson.
Signed-off-by: Christian Bejram <christian.bejram@stericsson.com>
Based on our open-source RE2 benchmarking code.
Includes benchmarks for a handful of <string.h> functions.
Change-Id: I30eb70d25dbf4ad5f2ca44976a8ce3b1ff7dad01
* commit '3bf2fcf9a2bc811bbee194b19f2a00c4cfb24701':
Revert "Update ion header"
:Revert "Update ion header"
Revert "Upgrade to dlmalloc 2.8.5."
Revert "Restore posix_memalign"
When compiling with clang, don't "fortify_source" the strlcpy and strlcat.
When compiling with clang, don't "fortify_source" the strlen.
Revert "Fix the clang build: this compiler doesn't support the gnu_inline function attribute"
Update msm_camera.h to version that supports instance handle based lookup
Replace ALL_PREBUILTS with BUILD_PREBUILT
