Commit Graph

5689 Commits

Author SHA1 Message Date
Yaowu Xu
2b96ffe025 a few clean-ups
1. remove prediction mode conversion
2. unified bmode, same for key and non-key frame
3. set I4X4_PRED count for pdf to 0, as I4X4_PRED is no longer
coded ever. It is determined by ref_frame and block partition

Change-Id: If5b282957c24339b241acdb9f2afef85658fe47d
2013-05-27 13:53:56 -07:00
Timothy B. Terriberry
95339d6825 Reduce WHT complexity.
Saves 1 add, 3 shifts (and a shift bias) per 1-D transform.

Change-Id: I1104bb1679fe342b2f9677df8a9cdc0cb9699e7d
2013-05-27 13:23:52 -07:00
Jingning Han
75fca6fff0 Merge "Reduce bmi buffer length from 16 to 4" into experimental 2013-05-27 09:18:50 -07:00
Jingning Han
de735929cf Reduce bmi buffer length from 16 to 4
This commit removes the use of bmi_ in the first-pass encoding by
forcing encode_intra4x4block_ to use DC_PRED, followed by DCT_DCT
only, as John suggested. This makes the need for bmi buffer only
up to 4 entries, instead of 16.

Change-Id: I3410007dfae789ee46a09ae20c39d3ce3c7954aa
2013-05-27 08:59:15 -07:00
Ronald S. Bultje
f188bf1c3d Remove unused mode_index argument from handle_inter_mode().
Change-Id: I07b8c15f33e6e7c63dd0033c18c4ac5c0303cf32
2013-05-27 08:49:17 -07:00
Ronald S. Bultje
01b7f72aab Fix coding statistics compilation.
Change-Id: I21e7c4ef6bc80f4b9281fc94c88fb710b1595c23
2013-05-27 08:29:07 -07:00
Sami Pietila
80812829c2 Moving txfm_size bits before prediction mode bits.
Hardware implementation needs to load coeff probs based on the
transform size. For selectable transform size, moving these bits
earlier in the bitstream adds some delay giving time to preload
the probs and speeds up the decoding process.

Change-Id: I3bfc1f662ae6f219c9286fe9ae6310c7d8a63ea7
2013-05-27 10:32:05 +03:00
Ronald S. Bultje
5cac66078e Remove splitmv.
Also do per-partition motion vector referencing in <sb8x8 partitions,
and adjust mvref finding for sub8x8 partitions.

Change-Id: Id3ed1ed4d2a8910d11d327db6cc63b8eb79f941f
2013-05-26 14:40:49 -07:00
Paul Wilkins
845bc13ba9 Remove loop dering experiment.
Change-Id: I1a979bf74c286b157c31bab6bdcba0494acb4918
2013-05-25 10:09:23 +01:00
Dmitry Kovalev
0b2b81249b Merge "Adding API to read/write uncompressed frame header bits." into experimental 2013-05-24 13:43:19 -07:00
Jingning Han
d093027791 Fix transform size coding mismatch
This commit fixes a transform size enc/dec mismatch issue in the
key frame coding.

Change-Id: I0c4f40464a367b33dd91ace84506650b1aec2873
2013-05-24 11:30:58 -07:00
Scott LaVarnway
64b30f41cd Removed setup_pre_planes() call in read_mb_modes_mv()
This code does not seem to be necessary anymore.

For the 1080p clip used, the decoder performance improved by
~2%.

Change-Id: I66bb0496d4998b0d6c6637c746b642b77bdbef88
2013-05-24 13:39:48 -04:00
Yaowu Xu
a2db88fc26 Fix two bugs
1) Added an initialization of rd_tx_select_threshs[].
2) Made updating transform size counts to be consistent

Change-Id: Iaa9d6c6be825b0364c9d61a9802873d01356815c
2013-05-24 09:28:19 -07:00
Yaowu Xu
f116abf774 update txfm size counting
Change-Id: I3a26baf8b2f945fea4f1aea156e60fa79f620f86
2013-05-23 18:27:07 -07:00
Paul Wilkins
e41fd6e3e2 Fix bug in 4x4 band definition.
Also some unused data structures/references removed.

Change-Id: I295809e887173543e794250cb60ddaf1475ffd24
2013-05-23 17:51:02 -07:00
Yaowu Xu
758504991b Removed code not in use
As intra coded blocks are always decoded using decode_sb_intra(), this
commmit removed the code no longer in use.

Change-Id: I09f14fa9cdc875656e8fbe245f72c8fd83b9e31e
2013-05-23 17:46:28 -07:00
Yaowu Xu
22694ca1ad Change txfm_type decision
The changing in intra coding to base on transform block, i.e. pred->
txfm->quant->dequant-itxfm->recon, made all blocks within a prediction
unit behave consistently, there is no longer a need to handle blocks
differently based on the position within a predicitn block. So this
commit simplifies the decision of transform type to be based on
prediction mode only.

Change-Id: If96cb72386f2e9186126ace88afa35ef085b6c96
2013-05-23 17:46:28 -07:00
Jingning Han
826efc838c Fix a bug in intra4x4 level rd loop
This commit fixed a uninitialized value use in the intra 4x4/8x4/4x8
rate-distortion loop.

Change-Id: I5c25b3536b59e4f5fbb23cf85baf93b2ccec7d72
2013-05-23 17:44:33 -07:00
Johann
4d5f1955de Remove type from vmvn
datatype is optional for the instruction but clang refuses it.
http://infocenter.arm.com/help/index.jsp?topic=/com.arm.doc.dui0489c/CIHIJIHC.html

It is still required when using an immediate.
http://infocenter.arm.com/help/index.jsp?topic=/com.arm.doc.dui0489c/CIHGGEEB.html

Change-Id: I0fae956c8c0fa3f97578ce80abea247f7fc88705
2013-05-23 13:02:44 -07:00
Jingning Han
ae10319520 Make comp_inter_inter support 4x4 partition coding
This commit refactors the iterative motion search for compound
inter-inter mode, to make it support all partition types including
4x4/4x8/8x4 block sizes.

Change-Id: I5f1212b0f307377291763e45c6bdc9693b5f04c8
2013-05-23 13:13:42 +01:00
Paul Wilkins
33ecd6ad54 Merge Scatter Scan experiment.
Removal from under configure flag.
A bit  renaming

Change-Id: I2213229dfe852001dfec16b149f47c52ce88f3aa
2013-05-23 13:09:27 +01:00
Jingning Han
7ac5ac52f9 Merge 4x4 block level partition into codebase
Move 4x4/4x8/8x4 partition coding out of experimental list.

This commit fixed the unit test failure issues. It also resolved
the merge conflicts between 4x4 block level partition and iterative
motion search for comp_inter_inter.

Change-Id: I898671f0631f5ddc4f5cc68d4c62ead7de9c5a58
2013-05-23 11:58:50 +01:00
Dmitry Kovalev
0638bff7af Using vp9 function prefix instead of vp8 inside vp9_cx_iface.c.
Change-Id: Ia74e7cf626db46ab47a74fe003602a55b949244c
2013-05-22 18:04:08 -07:00
Yunqing Wang
0812c121e7 Merge "Optimize variance functions" into experimental 2013-05-22 13:41:04 -07:00
Deb Mukherjee
ddb2309568 Merge "Using 128 entry look up table for coef models" into experimental 2013-05-22 10:38:35 -07:00
Yunqing Wang
f4fcfe3075 Optimize variance functions
Added SSE2 version of variance functions for super blocks.

Change-Id: Ibeaae8771ca21c99d41dd74067574a51e97b412d
2013-05-22 10:29:38 -07:00
Jingning Han
d2cacdc530 Merge "Make the intra rd search support 8x4/4x8" into experimental 2013-05-22 10:00:15 -07:00
Deb Mukherjee
de4d682ca4 Using 128 entry look up table for coef models
Reverts to using 128 bit LUT for the coef models rather than 48
to ease hardware implementation.

Also incorporates some cleanups including removing various
hooks to support different lookup tables based on block_type and
ref_type.

Change-Id: I54100c120cca07a2ebd3a7776bc4630fa6a153f6
2013-05-22 08:44:31 -07:00
Paul Wilkins
4e08fa96f3 Merge "changes intra coding to be based on txfm block" into experimental 2013-05-22 06:53:12 -07:00
Paul Wilkins
22d7f0703a Merge "Generalized intra 4x4 encoding for all sizes" into experimental 2013-05-22 06:52:32 -07:00
Paul Wilkins
18c975e21a Merge "Merge CONFIG_COMP_INTER_JOINT_SEARCH." into experimental 2013-05-22 06:51:43 -07:00
Scott LaVarnway
d679fdf7b0 Merge "Removed unused idct functions" into experimental 2013-05-22 05:36:36 -07:00
Yaowu Xu
8ba92a0bed changes intra coding to be based on txfm block
This commit changed the encoding and decoding of intra blocks to be
based on transform block. In each prediction block, the intra coding
iterates thorough each transform block based on raster scan order.

This commit also fixed a bug in D135 prediction code.

TODO next:
The RD mode/txfm_size selection should take this into account when
computing RD values.

Change-Id: I6d1be2faa4c4948a52e830b6a9a84a6b2b6850f6
2013-05-22 11:53:19 +01:00
Yaowu Xu
232d90d8fd Generalized intra 4x4 encoding for all sizes
Change-Id: I1b86744fa247233c8df031b3f4b87b212c8dd094
2013-05-22 11:44:12 +01:00
Paul Wilkins
0b713f8c18 Merge CONFIG_COMP_INTER_JOINT_SEARCH.
Merge this experiment so that it is under a speed feature
flag not a configuration flag.

Change-Id: I536f7f125a4ff5149bb3a64f791e835c324535fd
2013-05-22 11:23:31 +01:00
Jingning Han
f153a5d063 Make the intra rd search support 8x4/4x8
This commit allows the rate-distortion optimization of intra coding
capable of supporting 8x4 and 4x8 partition settings.

It enables the entropy coding of intra modes in key frame using a
unified contextual probability model conditioned on its above/left
prediction modes.

Coding performance:
derf 0.464%

Change-Id: Ieed055084e11fcb64d5d5faeb0e706d30268ba18
2013-05-21 21:03:00 -07:00
John Koleszar
ddf13be8ef Merge "Initial version of alpha channel support" into experimental 2013-05-21 17:29:51 -07:00
Martin Storsjo
ad484fc6be Add support for armv7-win32-vs11
The arm assembly files are named .s after conversion, to reuse
as much of the existing makefile infrastructure for conversion to
gas format as possible. Within the generated visual studio project,
only the converted assembly sources are available, which might not
be optimal for actually developing it, but is acceptable for
just building the library.

Multithreading is disabled since the traditional win32 threading
functions aren't available on WinRT/Windows Phone 8.

Building of vpx itself and the examples succeed, while building the
tests fail due to them using functions not available in the
windows store/windows phone API subsets - therefore the unit tests
are disabled.

This works for building in Visual Studio Express 2012 for Windows
Phone, while Visual Studio Express 2012 for Windows 8 (for
"Windows Store" apps) seems to reject the vcxproj files due to
not supporting "classic style native application or managed
projects". The built static library should be compatible with that
platform though.

Change-Id: Idcd7eca60bfaaaeb09392a9cd7a02e4a670e3b30
2013-05-22 02:08:25 +03:00
Jingning Han
1f7d810a72 Merge "Deprecate 4x4 intra modes from bit-stream" into experimental 2013-05-21 15:59:58 -07:00
Martin Storsjo
fba3110b09 arm: Move the definition of bilinear_taps_coeff to within the section
Previously, the microsoft arm assembler errored out, saying that
bilinear_taps_coeff was an undefined symbol.

Change-Id: Ib938f0b454c41ccbd801e70a7c9acc0fa04e3c55
2013-05-22 01:50:59 +03:00
Martin Storsjo
b9ed185659 arm: Explicitly write both target registers for ldrd
The microsoft assembler can't handle the second register being
implicit.

Change-Id: Ia831953a78a25fd6b2082474f05fdb78d96cdf78
2013-05-22 01:50:58 +03:00
Martin Storsjo
6b9a7b3333 thumb: Add a parameter for specifying a shift offset for the pc addition conversion
The branch instructions are encoded as 16 bit instructions
by the microsoft assembler, while they are encoded as 32 bit
instructions by gnu binutils.

Change-Id: I622b9025df3520c08eef8447df078f5517fb4b67
2013-05-22 01:50:57 +03:00
Johann
f5d3be7e96 Merge "thumb: Adjust the conversion of the position independent switch" 2013-05-21 15:44:52 -07:00
Johann
4641e750ba Merge "Add a script for converting ads arm assembly to microsoft armasm format" 2013-05-21 15:41:25 -07:00
Johann
908233253e Merge "ads2gas: Factorize thumb instruction replacements into a separate perl module" 2013-05-21 15:38:53 -07:00
Dmitry Kovalev
df037b615f Adding API to read/write uncompressed frame header bits.
The API is not final yet and can be changed. Actual layout of
uncompressed frame part will be finalized later. Right now moving
clr_type, error_resilient_mode, refresh_frame_context,
frame_parallel_decoding_mode from first compressed partition to
uncompressed frame part.

Change-Id: I3afc5d4ea92c5a114f4c3d88f96858cccc15b76e
2013-05-21 15:31:32 -07:00
Scott LaVarnway
a143152600 Removed unused idct functions
No longer used.

Change-Id: Id28c9247cebba183c6fa786dff96824ae100132c
2013-05-21 17:59:54 -04:00
Deb Mukherjee
7a645e4e12 Merging the model coef prob experiment
Merges the experiment.

Change-Id: I4eb19af6de6df6aa3a96a2e82f231d47ed9b3ae9
2013-05-21 14:44:38 -07:00
Deb Mukherjee
90a7723f8c Merge "Refinements on modelcoef expt to reduce storage" into experimental 2013-05-21 13:41:54 -07:00
James Zern
40c3ef19f1 Merge changes I179837d6,If7818d8e,Ifa27c706,I4be8ca12,I3c23a2ce,If02a7b85
* changes:
  msvs: Don't link to winmm.lib
  msvs: Pass dependency project vcxproj files to the project generation script
  msvs: Support producing both vcproj and vcxproj depending on configure variables
  configure: Add x86*-vs10/11 targets
  gen_msvs_sln: Support producing versions 10 and 11, handle vcxproj files
  Add a new script for producing vcxproj files
2013-05-21 12:58:17 -07:00