Initial aarch64 bits.
This commit is contained in:
		@@ -318,6 +318,15 @@ extern "C" {
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	     : "r"(a), "r"(b));
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						     : "r"(a), "r"(b));
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#    endif
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					#    endif
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#  endif
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					#  endif
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					# elif defined(__aarch64__) && defined(SIXTY_FOUR_BIT_LONG)
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					#  if defined(__GNUC__) && __GNUC__>=2
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					#   define BN_UMULT_HIGH(a,b)	({	\
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						register BN_ULONG ret;		\
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						asm ("umulh	%0,%1,%2"	\
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						     : "=r"(ret)		\
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						     : "r"(a), "r"(b));		\
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						ret;			})
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					#  endif
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# endif		/* cpu */
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					# endif		/* cpu */
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#endif		/* OPENSSL_NO_ASM */
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					#endif		/* OPENSSL_NO_ASM */
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@@ -215,6 +215,24 @@
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				   asm ("bswapl %0":"=r"(r):"0"(r));	\
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									   asm ("bswapl %0":"=r"(r):"0"(r));	\
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				   *((unsigned int *)(c))=r; (c)+=4; r;	})
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									   *((unsigned int *)(c))=r; (c)+=4; r;	})
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#   endif
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					#   endif
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					#  elif defined(__aarch64__)
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					#   if defined(__BYTE_ORDER__)
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					#    if defined(__ORDER_LITTLE_ENDIAN__) && __BYTE_ORDER__==__ORDER_LITTLE_ENDIAN__
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					#     define HOST_c2l(c,l)	({ unsigned int r;		\
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									   asm ("rev	%w0,%w1"	\
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										:"=r"(r)		\
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										:"r"(*((const unsigned int *)(c))));\
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									   (c)+=4; (l)=r;		})
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					#     define HOST_l2c(l,c)	({ unsigned int r;		\
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									   asm ("rev	%w0,%w1"	\
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										:"=r"(r)		\
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										:"r"((unsigned int)(l)));\
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									   *((unsigned int *)(c))=r; (c)+=4; r;	})
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					#    elif defined(__ORDER_BIG_ENDIAN__) && __BYTE_ORDER__==__ORDER_BIG_ENDIAN__
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					#     define HOST_c2l(c,l)	((l)=*((const unsigned int *)(c)), (c)+=4, (l))
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					#     define HOST_l2c(l,c)	(*((unsigned int *)(c))=(l), (c)+=4, (l))
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					#    endif
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					#   endif
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#  endif
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					#  endif
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# endif
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					# endif
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#endif
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					#endif
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@@ -29,6 +29,7 @@ typedef unsigned char u8;
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#if defined(__i386)	|| defined(__i386__)	|| \
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					#if defined(__i386)	|| defined(__i386__)	|| \
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    defined(__x86_64)	|| defined(__x86_64__)	|| \
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					    defined(__x86_64)	|| defined(__x86_64__)	|| \
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    defined(_M_IX86)	|| defined(_M_AMD64)	|| defined(_M_X64) || \
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					    defined(_M_IX86)	|| defined(_M_AMD64)	|| defined(_M_X64) || \
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					    defined(__aarch64__)			|| \
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    defined(__s390__)	|| defined(__s390x__)
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					    defined(__s390__)	|| defined(__s390x__)
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# undef STRICT_ALIGNMENT
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					# undef STRICT_ALIGNMENT
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#endif
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					#endif
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@@ -50,6 +51,13 @@ typedef unsigned char u8;
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#  define BSWAP4(x) ({	u32 ret=(x);			\
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					#  define BSWAP4(x) ({	u32 ret=(x);			\
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			asm ("bswapl %0"		\
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								asm ("bswapl %0"		\
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			: "+r"(ret));	ret;		})
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								: "+r"(ret));	ret;		})
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					# elif defined(__aarch64__)
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					#  define BSWAP8(x) ({	u64 ret;			\
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								asm ("rev %0,%1"		\
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								: "=r"(ret) : "r"(x)); ret;	})
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					#  define BSWAP4(x) ({	u32 ret;			\
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								asm ("rev %w0,%w1"		\
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								: "=r"(ret) : "r"(x)); ret;	})
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# elif (defined(__arm__) || defined(__arm)) && !defined(STRICT_ALIGNMENT)
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					# elif (defined(__arm__) || defined(__arm)) && !defined(STRICT_ALIGNMENT)
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#  define BSWAP8(x) ({	u32 lo=(u64)(x)>>32,hi=(x);	\
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					#  define BSWAP8(x) ({	u32 lo=(u64)(x)>>32,hi=(x);	\
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			asm ("rev %0,%0; rev %1,%1"	\
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								asm ("rev %0,%0; rev %1,%1"	\
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@@ -56,6 +56,7 @@ const char SHA512_version[]="SHA-512" OPENSSL_VERSION_PTEXT;
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#if defined(__i386) || defined(__i386__) || defined(_M_IX86) || \
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					#if defined(__i386) || defined(__i386__) || defined(_M_IX86) || \
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    defined(__x86_64) || defined(_M_AMD64) || defined(_M_X64) || \
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					    defined(__x86_64) || defined(_M_AMD64) || defined(_M_X64) || \
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    defined(__s390__) || defined(__s390x__) || \
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					    defined(__s390__) || defined(__s390x__) || \
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					    defined(__aarch64__) || \
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    defined(SHA512_ASM)
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					    defined(SHA512_ASM)
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#define SHA512_BLOCK_CAN_MANAGE_UNALIGNED_DATA
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					#define SHA512_BLOCK_CAN_MANAGE_UNALIGNED_DATA
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#endif
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					#endif
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@@ -342,6 +343,18 @@ static const SHA_LONG64 K512[80] = {
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				asm ("rotrdi %0,%1,%2"	\
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									asm ("rotrdi %0,%1,%2"	\
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				: "=r"(ret)		\
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									: "=r"(ret)		\
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				: "r"(a),"K"(n)); ret;	})
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									: "r"(a),"K"(n)); ret;	})
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					#  elif defined(__aarch64__)
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					#   define ROTR(a,n)	({ SHA_LONG64 ret;		\
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									asm ("ror %0,%1,%2"	\
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									: "=r"(ret)		\
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									: "r"(a),"I"(n)); ret;	})
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					#   if  defined(__BYTE_ORDER__) && defined(__ORDER_LITTLE_ENDIAN__) && \
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						__BYTE_ORDER__==__ORDER_LITTLE_ENDIAN__
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					#    define PULL64(x)	({ SHA_LONG64 ret;			\
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									asm ("rev	%0,%1"		\
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									: "=r"(ret)			\
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									: "r"(*((const SHA_LONG64 *)(&(x))))); ret;		})
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					#   endif
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#  endif
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					#  endif
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# elif defined(_MSC_VER)
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					# elif defined(_MSC_VER)
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#  if defined(_WIN64)	/* applies to both IA-64 and AMD64 */
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					#  if defined(_WIN64)	/* applies to both IA-64 and AMD64 */
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