29 Commits

Author SHA1 Message Date
ruil2
ed341048de refine common moudle for part of intra prediction function 2014-09-25 14:03:11 +08:00
Martin Storsjö
81ac3d2a9b Fix building svc_motion_estimation.S for android
The .align directive takes an argument in number of bits, i.e. the
actual alignment is 2^n. Previously building with binutils failed,
since 16 isn't a valid parameter to .align, the maximum is 15.

Thus, this makes the code try to align to 16 bytes, instead of aligning
to 65536 bytes.

This fixes building for android.

This also clears up the same mistake in the aarch64 code, even though
that one built just fine.
2014-08-15 09:53:42 +03:00
HFVideoMac
0f95fac4ca add arm32/64 code for InitHash 2014-08-15 13:47:59 +08:00
HFVideoMac
e14186b535 refine arm code for sum of frame 2014-08-14 14:41:07 +08:00
HFVideoMac
cff49f5e45 add arm 32/64 code and UT for SVC SCC motion estimation 2014-08-06 17:24:36 +08:00
Martin Storsjö
ae62909aab Unify the indentation in the new aarch64 assembly files 2014-07-28 09:23:36 +03:00
zhilwang
ce740ee19e Merge pull request #1113 from mstorsjo/asm-indent
Fix indentation of macros in reconstruct_aarc64_neon.S
2014-07-09 09:04:22 +08:00
zhilwang
1ae709dde0 Merge pull request #1106 from mstorsjo/fix-aarch64-hadamard
Fix WelsHadamardQuant2x2*_AArch64_neon
2014-07-09 09:03:14 +08:00
Martin Storsjö
cc8a2bd07e Fix indentation of macros in reconstruct_aarc64_neon.S 2014-07-08 20:16:28 +03:00
Martin Storsjö
03d9f07671 Fix WelsHadamardQuant2x2*_AArch64_neon
In WelsHadamardQuant2x2SkipKernel_AArch64_neon, write the output
of cmhi into v0 - this is the register that is assumed to hold
the output.

In WelsHadamardQuant2x2_AArch64_neon, subtract the count of zero
elements from 4, not from 16.

This makes the encoding unit tests pass again.
2014-07-08 11:36:40 +03:00
Martin Storsjö
86b3a999d5 Use mov.16b instead of mov.8h
According to the arm architecture reference manual, the mov (vector)
instruction can only use the arrangement specifiers '8b' and '16b'.
The apple tools still accept the '8h' form, but it assembles into the
same as '16b'. (When copying a vector register to another, the element
size in the vectors don't matter.)

This fixes building with gnu binutils.
2014-07-08 11:34:44 +03:00
Martin Storsjö
3a1cc63649 Don't use the non-standard apple syntax in a gnu version of a macro 2014-07-08 11:34:44 +03:00
dongzhang
eace9b7b00 add MemoryZero Arm64 code and UT 2014-07-08 12:52:48 +08:00
dongzhang
d88b83df44 Add ARM64 Code and UnitTest for reconstruction 2014-07-07 15:31:46 +08:00
zhilwang
fd132aba0f Merge pull request #1033 from mstorsjo/aarch64-typofix
Fix a typo in arm64 assembly macros, ARCH64 -> AARCH64
2014-06-30 10:02:41 +08:00
Martin Storsjö
cf6ae23413 Prefer modes in the same order as the reference, in the aarch64 combined intra satd/sad
This fixes encoding tests on aarch64.
2014-06-27 23:54:03 +03:00
Martin Storsjö
b406f4471a Fix a typo in arm64 assembly macros, ARCH64 -> AARCH64 2014-06-27 23:52:20 +03:00
Martin Storsjö
e16487d416 Clear the executable bit from new assembly source files 2014-06-27 18:45:13 +03:00
Martin Storsjö
40e74e43d6 Fix building intra_pred_sad_3_opt_aarch64_neon.S with gnu binutils
One macro argument was left in the apple syntax.
2014-06-27 12:54:25 +03:00
zhiliang wang
e389cf4348 refine file name. 2014-06-27 14:11:04 +08:00
zhiliang wang
f0ec323e2c Add arm64 neon code for intraSad&Satd 2014-06-25 13:43:26 +08:00
Martin Storsjö
30058e091f Remove the executable bit from aarch64 assembly source files 2014-06-22 21:36:22 +03:00
zhiliang wang
cfc2b95f59 Refine some code 2014-06-13 16:06:45 +08:00
zhiliang wang
947e3c64fe Add arm64 code for intra-pred 2014-06-13 15:21:48 +08:00
zhiliang wang
5d7e18de54 Add arm64 neon code for Satd. 2014-06-06 09:33:15 +08:00
Martin Storsjö
f2948dce67 Unset the executable bit on source files 2014-05-30 09:46:15 +03:00
zhiliang wang
53c8af4566 Refine some code 2014-05-15 15:04:44 +08:00
zhiliang wang
fe57aa46df Add gnu assembler support. 2014-05-15 09:17:35 +08:00
zhiliang wang
e6c9eb9824 Add Sad arm64 code 2014-05-14 17:06:48 +08:00