Add Sad arm64 code
This commit is contained in:
zhiliang wang
parent
3c4d151e03
commit
e6c9eb9824
@ -12,6 +12,7 @@
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4C34067018C57D0400DFA14A /* memory_neon.S in Sources */ = {isa = PBXBuildFile; fileRef = 4C34066918C57D0400DFA14A /* memory_neon.S */; };
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4C34067118C57D0400DFA14A /* pixel_neon.S in Sources */ = {isa = PBXBuildFile; fileRef = 4C34066A18C57D0400DFA14A /* pixel_neon.S */; };
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4C34067218C57D0400DFA14A /* reconstruct_neon.S in Sources */ = {isa = PBXBuildFile; fileRef = 4C34066B18C57D0400DFA14A /* reconstruct_neon.S */; };
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4CB8F2B419235FC5005D6386 /* pixel_neon_aarch64.S in Sources */ = {isa = PBXBuildFile; fileRef = 4CB8F2B319235FC5005D6386 /* pixel_neon_aarch64.S */; };
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4CE4431518B6FFA00017DF25 /* Foundation.framework in Frameworks */ = {isa = PBXBuildFile; fileRef = 4CE4431418B6FFA00017DF25 /* Foundation.framework */; };
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4CE4432318B6FFA00017DF25 /* XCTest.framework in Frameworks */ = {isa = PBXBuildFile; fileRef = 4CE4432218B6FFA00017DF25 /* XCTest.framework */; };
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4CE4432418B6FFA00017DF25 /* Foundation.framework in Frameworks */ = {isa = PBXBuildFile; fileRef = 4CE4431418B6FFA00017DF25 /* Foundation.framework */; };
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@ -81,6 +82,7 @@
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4C34066918C57D0400DFA14A /* memory_neon.S */ = {isa = PBXFileReference; fileEncoding = 4; lastKnownFileType = sourcecode.asm; path = memory_neon.S; sourceTree = "<group>"; };
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4C34066A18C57D0400DFA14A /* pixel_neon.S */ = {isa = PBXFileReference; fileEncoding = 4; lastKnownFileType = sourcecode.asm; path = pixel_neon.S; sourceTree = "<group>"; };
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4C34066B18C57D0400DFA14A /* reconstruct_neon.S */ = {isa = PBXFileReference; fileEncoding = 4; lastKnownFileType = sourcecode.asm; path = reconstruct_neon.S; sourceTree = "<group>"; };
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4CB8F2B319235FC5005D6386 /* pixel_neon_aarch64.S */ = {isa = PBXFileReference; fileEncoding = 4; lastKnownFileType = sourcecode.asm; name = pixel_neon_aarch64.S; path = arm64/pixel_neon_aarch64.S; sourceTree = "<group>"; };
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4CDBFB9D18E5068D0025A767 /* wels_transpose_matrix.h */ = {isa = PBXFileReference; fileEncoding = 4; lastKnownFileType = sourcecode.c.h; path = wels_transpose_matrix.h; sourceTree = "<group>"; };
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4CE4431118B6FFA00017DF25 /* libwelsenc.a */ = {isa = PBXFileReference; explicitFileType = archive.ar; includeInIndex = 0; path = libwelsenc.a; sourceTree = BUILT_PRODUCTS_DIR; };
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4CE4431418B6FFA00017DF25 /* Foundation.framework */ = {isa = PBXFileReference; lastKnownFileType = wrapper.framework; name = Foundation.framework; path = System/Library/Frameworks/Foundation.framework; sourceTree = SDKROOT; };
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@ -210,6 +212,14 @@
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path = arm;
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sourceTree = "<group>";
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};
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4CB8F2B219235FAC005D6386 /* arm64 */ = {
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isa = PBXGroup;
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children = (
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4CB8F2B319235FC5005D6386 /* pixel_neon_aarch64.S */,
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);
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name = arm64;
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sourceTree = "<group>";
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};
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4CE4430818B6FFA00017DF25 = {
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isa = PBXGroup;
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children = (
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@ -270,6 +280,7 @@
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4CE446A118BC605B0017DF25 /* core */ = {
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isa = PBXGroup;
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children = (
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4CB8F2B219235FAC005D6386 /* arm64 */,
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4C34066418C57D0400DFA14A /* arm */,
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4CE446A918BC605C0017DF25 /* inc */,
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4CE446DC18BC605C0017DF25 /* src */,
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@ -507,6 +518,7 @@
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4CE4471918BC605C0017DF25 /* memory_align.cpp in Sources */,
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4CE4472418BC605C0017DF25 /* svc_enc_slice_segment.cpp in Sources */,
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4CE4472318BC605C0017DF25 /* svc_base_layer_md.cpp in Sources */,
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4CB8F2B419235FC5005D6386 /* pixel_neon_aarch64.S in Sources */,
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4CE4471E18BC605C0017DF25 /* ratectl.cpp in Sources */,
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4C34066D18C57D0400DFA14A /* intra_pred_neon.S in Sources */,
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4CE4471C18BC605C0017DF25 /* picture_handle.cpp in Sources */,
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@ -648,6 +660,7 @@
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"$(SRCROOT)/../../../../processing/interface",
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"$(SRCROOT)/../../../../api/svc",
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"$(SRCROOT)/../../../../common/arm",
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"$(SRCROOT)/../../../../common/arm64",
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);
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IPHONEOS_DEPLOYMENT_TARGET = 6.1;
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ONLY_ACTIVE_ARCH = NO;
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@ -686,6 +699,7 @@
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"$(SRCROOT)/../../../../processing/interface",
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"$(SRCROOT)/../../../../api/svc",
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"$(SRCROOT)/../../../../common/arm",
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"$(SRCROOT)/../../../../common/arm64",
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);
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IPHONEOS_DEPLOYMENT_TARGET = 6.1;
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OTHER_LDFLAGS = "-ObjC";
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@ -89,6 +89,19 @@ void WelsSampleSadFour4x4_neon (uint8_t*, int32_t, uint8_t*, int32_t, int32_t*);
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#endif
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#if defined (HAVE_NEON_AARCH64)
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int32_t WelsSampleSad4x4_AArch64_neon (uint8_t*, int32_t, uint8_t*, int32_t);
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int32_t WelsSampleSad16x16_AArch64_neon (uint8_t*, int32_t, uint8_t*, int32_t);
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int32_t WelsSampleSad16x8_AArch64_neon (uint8_t*, int32_t, uint8_t*, int32_t);
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int32_t WelsSampleSad8x16_AArch64_neon (uint8_t*, int32_t, uint8_t*, int32_t);
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int32_t WelsSampleSad8x8_AArch64_neon (uint8_t*, int32_t, uint8_t*, int32_t);
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void WelsSampleSadFour16x16_AArch64_neon (uint8_t*, int32_t, uint8_t*, int32_t, int32_t*);
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void WelsSampleSadFour16x8_AArch64_neon (uint8_t*, int32_t, uint8_t*, int32_t, int32_t*);
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void WelsSampleSadFour8x16_AArch64_neon (uint8_t*, int32_t, uint8_t*, int32_t, int32_t*);
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void WelsSampleSadFour8x8_AArch64_neon (uint8_t*, int32_t, uint8_t*, int32_t, int32_t*);
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void WelsSampleSadFour4x4_AArch64_neon (uint8_t*, int32_t, uint8_t*, int32_t, int32_t*);
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#endif
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#if defined(__cplusplus)
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}
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#endif//__cplusplus
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398
codec/encoder/core/arm64/pixel_neon_aarch64.S
Executable file
398
codec/encoder/core/arm64/pixel_neon_aarch64.S
Executable file
@ -0,0 +1,398 @@
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/*!
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* \copy
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* Copyright (c) 2013, Cisco Systems
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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*
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* * Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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*
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* * Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in
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* the documentation and/or other materials provided with the
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* distribution.
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*
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* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
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* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
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* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
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* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
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* COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
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* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
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* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
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* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
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* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
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* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
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* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
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* POSSIBILITY OF SUCH DAMAGE.
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*
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*/
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#ifdef HAVE_NEON_AARCH64
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.text
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#include "arm_arch64_common_macro.S"
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.macro CALC_AND_STORE_SAD
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uaddlp v2.4s, v2.8h
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addp v2.4s, v2.4s, v2.4s
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addp v2.2s, v2.2s, v2.2s
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umov w0, v2.s[0]
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.endm
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.macro CALC_AND_STORE_SAD_FOUR
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addp v0.8h, v28.8h, v29.8h
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addp v1.8h, v30.8h, v31.8h
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addp v0.8h, v0.8h, v1.8h
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addp v0.8h, v0.8h, v0.8h
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eor v1.8b, v1.8b, v1.8b
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saddl v0.4s, v0.4h, v1.4h
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st1 {v0.4s}, [x4]
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.endm
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.macro LOAD_8X8_1
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ld1 {v0.8b}, [x0], x1
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ld1 {v1.8b}, [x0], x1
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ld1 {v2.8b}, [x0], x1
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ld1 {v3.8b}, [x0], x1
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ld1 {v4.8b}, [x0], x1
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ld1 {v5.8b}, [x0], x1
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ld1 {v6.8b}, [x0], x1
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ld1 {v7.8b}, [x0], x1
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.endm
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.macro LOAD_8X8_2
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ld1 {v16.8b}, [$0], x3
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ld1 {v17.8b}, [$0], x3
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ld1 {v18.8b}, [$0], x3
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ld1 {v19.8b}, [$0], x3
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ld1 {v20.8b}, [$0], x3
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ld1 {v21.8b}, [$0], x3
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ld1 {v22.8b}, [$0], x3
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ld1 {v23.8b}, [$0], x3
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.endm
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.macro CALC_ABS_8X8_1
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uab$1l $0, v0.8b, v16.8b
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uabal $0, v1.8b, v17.8b
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uabal $0, v2.8b, v18.8b
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uabal $0, v3.8b, v19.8b
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uabal $0, v4.8b, v20.8b
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uabal $0, v5.8b, v21.8b
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uabal $0, v6.8b, v22.8b
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uabal $0, v7.8b, v23.8b
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.endm
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.macro CALC_ABS_8X8_2
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uab$0l v29.8h, v0.8b, v18.8b
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uabal v29.8h, v1.8b, v19.8b
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uabal v29.8h, v2.8b, v20.8b
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uabal v29.8h, v3.8b, v21.8b
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uabal v29.8h, v4.8b, v22.8b
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uabal v29.8h, v5.8b, v23.8b
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uabal v29.8h, v6.8b, v24.8b
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uabal v29.8h, v7.8b, v25.8b
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.endm
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.macro LOAD_16X8_1
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ld1 {v0.16b}, [x0], x1
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ld1 {v1.16b}, [x0], x1
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ld1 {v2.16b}, [x0], x1
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ld1 {v3.16b}, [x0], x1
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ld1 {v4.16b}, [x0], x1
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ld1 {v5.16b}, [x0], x1
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ld1 {v6.16b}, [x0], x1
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ld1 {v7.16b}, [x0], x1
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.endm
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.macro LOAD_16X8_2
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ld1 {v16.16b}, [$0], x3
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ld1 {v17.16b}, [$0], x3
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ld1 {v18.16b}, [$0], x3
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ld1 {v19.16b}, [$0], x3
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ld1 {v20.16b}, [$0], x3
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ld1 {v21.16b}, [$0], x3
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ld1 {v22.16b}, [$0], x3
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ld1 {v23.16b}, [$0], x3
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.endm
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.macro CALC_ABS_16X8_1
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uab$1l $0, v0.8b, v16.8b
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uabal2 $0, v0.16b,v16.16b
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uabal $0, v1.8b, v17.8b
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uabal2 $0, v1.16b,v17.16b
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uabal $0, v2.8b, v18.8b
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uabal2 $0, v2.16b,v18.16b
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uabal $0, v3.8b, v19.8b
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uabal2 $0, v3.16b,v19.16b
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uabal $0, v4.8b, v20.8b
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uabal2 $0, v4.16b,v20.16b
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uabal $0, v5.8b, v21.8b
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uabal2 $0, v5.16b,v21.16b
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uabal $0, v6.8b, v22.8b
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uabal2 $0, v6.16b,v22.16b
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uabal $0, v7.8b, v23.8b
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uabal2 $0, v7.16b,v23.16b
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.endm
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.macro CALC_ABS_16X8_2
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uab$0l v29.8h, v0.8b, v18.8b
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uabal2 v29.8h, v0.16b,v18.16b
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uabal v29.8h, v1.8b, v19.8b
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uabal2 v29.8h, v1.16b,v19.16b
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uabal v29.8h, v2.8b, v20.8b
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uabal2 v29.8h, v2.16b,v20.16b
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uabal v29.8h, v3.8b, v21.8b
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uabal2 v29.8h, v3.16b,v21.16b
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uabal v29.8h, v4.8b, v22.8b
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uabal2 v29.8h, v4.16b,v22.16b
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uabal v29.8h, v5.8b, v23.8b
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uabal2 v29.8h, v5.16b,v23.16b
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uabal v29.8h, v6.8b, v24.8b
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uabal2 v29.8h, v6.16b,v24.16b
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uabal v29.8h, v7.8b, v25.8b
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uabal2 v29.8h, v7.16b,v25.16b
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.endm
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WELS_ASM_ARCH64_FUNC_BEGIN WelsSampleSad4x4_AArch64_neon
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sxtw x1, w1
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sxtw x3, w3
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ld1 {v0.s}[0], [x0], x1
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ld1 {v1.s}[0], [x2], x3
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uabdl v2.8h, v0.8b, v1.8b
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.rept 3
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ld1 {v0.s}[0], [x0], x1
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ld1 {v1.s}[0], [x2], x3
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uabal v2.8h, v0.8b, v1.8b
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.endr
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uaddlp v2.2s, v2.4h
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addp v2.2s, v2.2s, v2.2s
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umov w0, v2.s[0]
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WELS_ASM_ARCH64_FUNC_END
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WELS_ASM_ARCH64_FUNC_BEGIN WelsSampleSad8x8_AArch64_neon
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sxtw x1, w1
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sxtw x3, w3
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ld1 {v0.8b}, [x0], x1
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ld1 {v1.8b}, [x2], x3
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uabdl v2.8h, v0.8b, v1.8b
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.rept 7
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ld1 {v0.8b}, [x0], x1
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ld1 {v1.8b}, [x2], x3
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uabal v2.8h, v0.8b, v1.8b
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.endr
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CALC_AND_STORE_SAD
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WELS_ASM_ARCH64_FUNC_END
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WELS_ASM_ARCH64_FUNC_BEGIN WelsSampleSad8x16_AArch64_neon
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sxtw x1, w1
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sxtw x3, w3
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ld1 {v0.8b}, [x0], x1
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ld1 {v1.8b}, [x2], x3
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uabdl v2.8h, v0.8b, v1.8b
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.rept 15
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ld1 {v0.8b}, [x0], x1
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ld1 {v1.8b}, [x2], x3
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uabal v2.8h, v0.8b, v1.8b
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.endr
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CALC_AND_STORE_SAD
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WELS_ASM_ARCH64_FUNC_END
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WELS_ASM_ARCH64_FUNC_BEGIN WelsSampleSad16x8_AArch64_neon
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sxtw x1, w1
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sxtw x3, w3
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ld1 {v0.16b}, [x0], x1
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ld1 {v1.16b}, [x2], x3
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uabdl v2.8h, v0.8b, v1.8b
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uabal2 v2.8h, v0.16b, v1.16b
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.rept 7
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ld1 {v0.16b}, [x0], x1
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ld1 {v1.16b}, [x2], x3
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uabal v2.8h, v0.8b, v1.8b
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uabal2 v2.8h, v0.16b, v1.16b
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.endr
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CALC_AND_STORE_SAD
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WELS_ASM_ARCH64_FUNC_END
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WELS_ASM_ARCH64_FUNC_BEGIN WelsSampleSad16x16_AArch64_neon
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sxtw x1, w1
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sxtw x3, w3
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ld1 {v0.16b}, [x0], x1
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ld1 {v1.16b}, [x2], x3
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uabdl v2.8h, v0.8b, v1.8b
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uabal2 v2.8h, v0.16b, v1.16b
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.rept 15
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ld1 {v0.16b}, [x0], x1
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ld1 {v1.16b}, [x2], x3
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uabal v2.8h, v0.8b, v1.8b
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uabal2 v2.8h, v0.16b, v1.16b
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.endr
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CALC_AND_STORE_SAD
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WELS_ASM_ARCH64_FUNC_END
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WELS_ASM_ARCH64_FUNC_BEGIN WelsSampleSadFour4x4_AArch64_neon
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sxtw x1, w1
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sxtw x3, w3
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ld1 {v0.s}[0], [x0], x1
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ld1 {v0.s}[1], [x0], x1
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ld1 {v1.s}[0], [x0], x1
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ld1 {v1.s}[1], [x0]
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sub x0, x2, x3
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ld1 {v2.s}[0], [x0], x3
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ld1 {v2.s}[1], [x0], x3
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ld1 {v3.s}[0], [x0], x3
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ld1 {v3.s}[1], [x0], x3
|
||||
ld1 {v4.s}[0], [x0], x3
|
||||
ld1 {v4.s}[1], [x0], x3
|
||||
|
||||
uabdl v28.8h, v0.8b, v2.8b
|
||||
uabal v28.8h, v1.8b, v3.8b
|
||||
|
||||
uabdl v29.8h, v0.8b, v3.8b
|
||||
uabal v29.8h, v1.8b, v4.8b
|
||||
|
||||
sub x0, x2, #1
|
||||
ld1 {v2.s}[0], [x0], x3
|
||||
ld1 {v2.s}[1], [x0], x3
|
||||
ld1 {v3.s}[0], [x0], x3
|
||||
ld1 {v3.s}[1], [x0]
|
||||
uabdl v30.8h, v0.8b, v2.8b
|
||||
uabal v30.8h, v1.8b, v3.8b
|
||||
|
||||
add x0, x2, #1
|
||||
ld1 {v2.s}[0], [x0], x3
|
||||
ld1 {v2.s}[1], [x0], x3
|
||||
ld1 {v3.s}[0], [x0], x3
|
||||
ld1 {v3.s}[1], [x0]
|
||||
uabdl v31.8h, v0.8b, v2.8b
|
||||
uabal v31.8h, v1.8b, v3.8b
|
||||
|
||||
CALC_AND_STORE_SAD_FOUR
|
||||
WELS_ASM_ARCH64_FUNC_END
|
||||
|
||||
WELS_ASM_ARCH64_FUNC_BEGIN WelsSampleSadFour8x8_AArch64_neon
|
||||
sxtw x1, w1
|
||||
sxtw x3, w3
|
||||
LOAD_8X8_1
|
||||
sub x0, x2, x3
|
||||
LOAD_8X8_2 x0
|
||||
ld1 {v24.8b}, [x0], x3
|
||||
ld1 {v25.8b}, [x0]
|
||||
|
||||
CALC_ABS_8X8_1 v28.8h, d
|
||||
CALC_ABS_8X8_2 d
|
||||
|
||||
sub x0, x2, #1
|
||||
LOAD_8X8_2 x0
|
||||
CALC_ABS_8X8_1 v30.8h, d
|
||||
|
||||
add x0, x2, #1
|
||||
LOAD_8X8_2 x0
|
||||
CALC_ABS_8X8_1 v31.8h, d
|
||||
|
||||
CALC_AND_STORE_SAD_FOUR
|
||||
WELS_ASM_ARCH64_FUNC_END
|
||||
|
||||
WELS_ASM_ARCH64_FUNC_BEGIN WelsSampleSadFour8x16_AArch64_neon
|
||||
sxtw x1, w1
|
||||
sxtw x3, w3
|
||||
LOAD_8X8_1
|
||||
sub x5, x2, x3
|
||||
LOAD_8X8_2 x5
|
||||
ld1 {v24.8b}, [x5], x3
|
||||
ld1 {v25.8b}, [x5], x3
|
||||
|
||||
CALC_ABS_8X8_1 v28.8h, d
|
||||
CALC_ABS_8X8_2 d
|
||||
|
||||
sub x6, x2, #1
|
||||
LOAD_8X8_2 x6
|
||||
CALC_ABS_8X8_1 v30.8h, d
|
||||
|
||||
add x7, x2, #1
|
||||
LOAD_8X8_2 x7
|
||||
CALC_ABS_8X8_1 v31.8h, d
|
||||
|
||||
LOAD_8X8_1
|
||||
sub x5, x5, x3
|
||||
sub x5, x5, x3
|
||||
LOAD_8X8_2 x5
|
||||
ld1 {v24.8b}, [x5], x3
|
||||
ld1 {v25.8b}, [x5]
|
||||
|
||||
CALC_ABS_8X8_1 v28.8h, a
|
||||
CALC_ABS_8X8_2 a
|
||||
|
||||
LOAD_8X8_2 x6
|
||||
CALC_ABS_8X8_1 v30.8h, a
|
||||
|
||||
LOAD_8X8_2 x7
|
||||
CALC_ABS_8X8_1 v31.8h, a
|
||||
|
||||
CALC_AND_STORE_SAD_FOUR
|
||||
WELS_ASM_ARCH64_FUNC_END
|
||||
|
||||
WELS_ASM_ARCH64_FUNC_BEGIN WelsSampleSadFour16x8_AArch64_neon
|
||||
sxtw x1, w1
|
||||
sxtw x3, w3
|
||||
LOAD_16X8_1
|
||||
sub x0, x2, x3
|
||||
LOAD_16X8_2 x0
|
||||
ld1 {v24.16b}, [x0], x3
|
||||
ld1 {v25.16b}, [x0]
|
||||
|
||||
CALC_ABS_16X8_1 v28.8h, d
|
||||
CALC_ABS_16X8_2 d
|
||||
|
||||
sub x0, x2, #1
|
||||
LOAD_16X8_2 x0
|
||||
CALC_ABS_16X8_1 v30.8h, d
|
||||
|
||||
add x0, x2, #1
|
||||
LOAD_16X8_2 x0
|
||||
CALC_ABS_16X8_1 v31.8h, d
|
||||
|
||||
CALC_AND_STORE_SAD_FOUR
|
||||
WELS_ASM_ARCH64_FUNC_END
|
||||
|
||||
WELS_ASM_ARCH64_FUNC_BEGIN WelsSampleSadFour16x16_AArch64_neon
|
||||
sxtw x1, w1
|
||||
sxtw x3, w3
|
||||
|
||||
LOAD_16X8_1
|
||||
sub x5, x2, x3
|
||||
LOAD_16X8_2 x5
|
||||
ld1 {v24.16b}, [x5], x3
|
||||
ld1 {v25.16b}, [x5], x3
|
||||
|
||||
CALC_ABS_16X8_1 v28.8h, d
|
||||
CALC_ABS_16X8_2 d
|
||||
|
||||
sub x6, x2, #1
|
||||
LOAD_16X8_2 x6
|
||||
CALC_ABS_16X8_1 v30.8h, d
|
||||
|
||||
add x7, x2, #1
|
||||
LOAD_16X8_2 x7
|
||||
CALC_ABS_16X8_1 v31.8h, d
|
||||
|
||||
LOAD_16X8_1
|
||||
sub x5, x5, x3
|
||||
sub x5, x5, x3
|
||||
LOAD_16X8_2 x5
|
||||
ld1 {v24.16b}, [x5], x3
|
||||
ld1 {v25.16b}, [x5]
|
||||
|
||||
CALC_ABS_16X8_1 v28.8h, a
|
||||
CALC_ABS_16X8_2 a
|
||||
|
||||
LOAD_16X8_2 x6
|
||||
CALC_ABS_16X8_1 v30.8h, a
|
||||
|
||||
LOAD_16X8_2 x7
|
||||
CALC_ABS_16X8_1 v31.8h, a
|
||||
|
||||
CALC_AND_STORE_SAD_FOUR
|
||||
WELS_ASM_ARCH64_FUNC_END
|
||||
#endif
|
||||
@ -413,6 +413,23 @@ void WelsInitSampleSadFunc (SWelsFuncPtrList* pFuncList, uint32_t uiCpuFlag) {
|
||||
pFuncList->sSampleDealingFuncs.pfIntra16x16Combined3Sad = WelsIntra16x16Combined3Sad_neon;
|
||||
}
|
||||
#endif
|
||||
|
||||
#if defined (HAVE_NEON_AARCH64)
|
||||
if (uiCpuFlag & WELS_CPU_NEON) {
|
||||
pFuncList->sSampleDealingFuncs.pfSampleSad[BLOCK_4x4 ] = WelsSampleSad4x4_AArch64_neon;
|
||||
pFuncList->sSampleDealingFuncs.pfSampleSad[BLOCK_16x16] = WelsSampleSad16x16_AArch64_neon;
|
||||
pFuncList->sSampleDealingFuncs.pfSampleSad[BLOCK_16x8 ] = WelsSampleSad16x8_AArch64_neon;
|
||||
pFuncList->sSampleDealingFuncs.pfSampleSad[BLOCK_8x16] = WelsSampleSad8x16_AArch64_neon;
|
||||
pFuncList->sSampleDealingFuncs.pfSampleSad[BLOCK_8x8] = WelsSampleSad8x8_AArch64_neon;
|
||||
|
||||
pFuncList->sSampleDealingFuncs.pfSample4Sad[BLOCK_16x16] = WelsSampleSadFour16x16_AArch64_neon;
|
||||
pFuncList->sSampleDealingFuncs.pfSample4Sad[BLOCK_16x8] = WelsSampleSadFour16x8_AArch64_neon;
|
||||
pFuncList->sSampleDealingFuncs.pfSample4Sad[BLOCK_8x16] = WelsSampleSadFour8x16_AArch64_neon;
|
||||
pFuncList->sSampleDealingFuncs.pfSample4Sad[BLOCK_8x8] = WelsSampleSadFour8x8_AArch64_neon;
|
||||
pFuncList->sSampleDealingFuncs.pfSample4Sad[BLOCK_4x4] = WelsSampleSadFour4x4_AArch64_neon;
|
||||
|
||||
}
|
||||
#endif
|
||||
}
|
||||
|
||||
} // namespace WelsSVCEnc
|
||||
|
||||
@ -60,6 +60,13 @@ ENCODER_ASM_ARM_SRCS=\
|
||||
ENCODER_OBJS += $(ENCODER_ASM_ARM_SRCS:.S=.$(OBJ))
|
||||
endif
|
||||
|
||||
ifeq ($(ASM_ARCH), arm64)
|
||||
ENCODER_ASM_ARM64_SRCS=\
|
||||
$(ENCODER_SRCDIR)/core/arm64/pixel_neon_aarch64.S\
|
||||
|
||||
ENCODER_OBJS += $(ENCODER_ASM_ARM64_SRCS:.S=.$(OBJ))
|
||||
endif
|
||||
|
||||
OBJS += $(ENCODER_OBJS)
|
||||
$(ENCODER_SRCDIR)/%.$(OBJ): $(ENCODER_SRCDIR)/%.cpp
|
||||
$(QUIET_CXX)$(CXX) $(CFLAGS) $(CXXFLAGS) $(INCLUDES) $(ENCODER_CFLAGS) $(ENCODER_INCLUDES) -c $(CXX_O) $<
|
||||
|
||||
Loading…
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Reference in New Issue
Block a user