add feature to convert FP32(float) to FP16(half)
* check compiler support * check HW support before executing * add test doing round trip conversion from / to FP32 * treat array correctly if size is not multiple of 4 * add declaration to prevent warning * make it possible to enable fp16 on 32bit ARM * let the conversion possible on non-supported HW, too. * add test using both HW and SW implementation
This commit is contained in:
Tomoaki Teshima
parent
c3d1f94ee6
commit
b2ad7cd9c0
@ -146,8 +146,11 @@ if(CMAKE_COMPILER_IS_GNUCXX)
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elseif(X86 OR X86_64)
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add_extra_compiler_option(-mno-sse2)
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endif()
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if(ARM)
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add_extra_compiler_option("-mfp16-format=ieee")
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endif(ARM)
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if(ENABLE_NEON)
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add_extra_compiler_option("-mfpu=neon")
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add_extra_compiler_option("-mfpu=neon-fp16")
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endif()
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if(ENABLE_VFPV3 AND NOT ENABLE_NEON)
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add_extra_compiler_option("-mfpu=vfpv3")
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@ -167,6 +170,9 @@ if(CMAKE_COMPILER_IS_GNUCXX)
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add_extra_compiler_option(-mfma)
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endif()
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endif()
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if((X86 OR X86_64) AND NOT MSVC)
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add_extra_compiler_option(-mf16c)
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endif((X86 OR X86_64) AND NOT MSVC)
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# GCC depresses SSEx instructions when -mavx is used. Instead, it generates new AVX instructions or AVX equivalence for all SSEx instructions when needed.
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if(NOT OPENCV_EXTRA_CXX_FLAGS MATCHES "-mavx")
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@ -524,6 +524,17 @@ For example:
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CV_EXPORTS_W void convertScaleAbs(InputArray src, OutputArray dst,
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double alpha = 1, double beta = 0);
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/** @brief Converts an array to half precision floating number.
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convertFp16 converts FP32 to FP16 or FP16 to FP32. The input array has to have type of CV_32F or
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CV_16S to represent the bit depth. If the input array is neither of them, it'll do nothing.
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@param src input array.
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@param dst output array.
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@param useHW if possible use HW SIMD instruction to convert
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*/
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CV_EXPORTS_W void convertFp16(InputArray src, OutputArray dst, bool useHW = true);
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/** @brief Performs a look-up table transform of an array.
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The function LUT fills the output array with values from the look-up table. Indices of the entries
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@ -112,7 +112,7 @@
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#define CV_CPU_SSE4_1 6
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#define CV_CPU_SSE4_2 7
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#define CV_CPU_POPCNT 8
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#define CV_CPU_FP16 9
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#define CV_CPU_AVX 10
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#define CV_CPU_AVX2 11
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#define CV_CPU_FMA3 12
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@ -143,7 +143,7 @@ enum CpuFeatures {
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CPU_SSE4_1 = 6,
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CPU_SSE4_2 = 7,
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CPU_POPCNT = 8,
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CPU_FP16 = 9,
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CPU_AVX = 10,
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CPU_AVX2 = 11,
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CPU_FMA3 = 12,
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@ -193,6 +193,10 @@ enum CpuFeatures {
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# endif
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# define CV_POPCNT 1
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# endif
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# if defined __F16C__ || (defined _MSC_VER && _MSC_VER >= 1700)
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# include <immintrin.h>
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# define CV_FP16 1
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# endif
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# if defined __AVX__ || (defined _MSC_VER && _MSC_VER >= 1600 && 0)
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// MS Visual Studio 2010 (2012?) has no macro pre-defined to identify the use of /arch:AVX
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// See: http://connect.microsoft.com/VisualStudio/feedback/details/605858/arch-avx-should-define-a-predefined-macro-in-x64-and-set-a-unique-value-for-m-ix86-fp-in-win32
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@ -223,6 +227,10 @@ enum CpuFeatures {
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# define CV_NEON 1
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#endif
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#if defined __GNUC__ && ((defined (__arm__) && (__ARM_FP & 0x2)) || defined(__aarch64__))
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# define CV_FP16 1
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#endif
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#if defined __GNUC__ && defined __arm__ && (defined __ARM_PCS_VFP || defined __ARM_VFPV3__ || defined __ARM_NEON__) && !defined __SOFTFP__
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# define CV_VFP 1
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#endif
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@ -253,6 +261,9 @@ enum CpuFeatures {
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#ifndef CV_SSE4_2
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# define CV_SSE4_2 0
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#endif
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#ifndef CV_FP16
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# define CV_FP16 0
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#endif
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#ifndef CV_AVX
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# define CV_AVX 0
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#endif
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@ -4356,6 +4356,283 @@ struct Cvt_SIMD<float, int>
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#endif
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#if !(defined (__arm__) || defined (__aarch64__))
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// const numbers for floating points format
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const unsigned int kShiftSignificand = 13;
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const unsigned int kMaskFp16Significand = 0x3ff;
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const unsigned int kBiasFp16Exponent = 15;
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const unsigned int kBiasFp32Exponent = 127;
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union fp32Int32
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{
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int i;
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float f;
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struct _fp32Format
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{
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unsigned int significand : 23;
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unsigned int exponent : 8;
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unsigned int sign : 1;
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} fmt;
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};
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#endif
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union fp16Int16
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{
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short i;
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#if defined (__arm__) || defined (__aarch64__)
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__fp16 h;
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#endif
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struct _fp16Format
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{
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unsigned int significand : 10;
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unsigned int exponent : 5;
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unsigned int sign : 1;
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} fmt;
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};
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#if defined (__arm__) || defined (__aarch64__)
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static float convertFp16SW(short fp16)
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{
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// Fp16 -> Fp32
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fp16Int16 a;
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a.i = fp16;
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return (float)a.h;
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}
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#else
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static float convertFp16SW(short fp16)
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{
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// Fp16 -> Fp32
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fp16Int16 b;
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b.i = fp16;
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int exponent = b.fmt.exponent - kBiasFp16Exponent;
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int significand = b.fmt.significand;
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fp32Int32 a;
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a.i = 0;
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a.fmt.sign = b.fmt.sign; // sign bit
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if( exponent == 16 )
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{
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// Inf or NaN
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a.i = a.i | 0x7F800000;
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if( significand != 0 )
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{
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// NaN
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#if defined(__x86_64__) || defined(_M_X64)
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// 64bit
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a.i = a.i | 0x7FC00000;
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#endif
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a.fmt.significand = a.fmt.significand | (significand << kShiftSignificand);
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}
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return a.f;
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}
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else if ( exponent == -15 )
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{
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// subnormal in Fp16
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if( significand == 0 )
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{
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// zero
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return a.f;
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}
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else
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{
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int shift = -1;
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while( ( significand & 0x400 ) == 0 )
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{
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significand = significand << 1;
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shift++;
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}
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significand = significand & kMaskFp16Significand;
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exponent -= shift;
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}
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}
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a.fmt.exponent = (exponent+kBiasFp32Exponent);
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a.fmt.significand = significand << kShiftSignificand;
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return a.f;
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}
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#endif
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#if defined (__arm__) || defined (__aarch64__)
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static short convertFp16SW(float fp32)
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{
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// Fp32 -> Fp16
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fp16Int16 a;
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a.h = (__fp16)fp32;
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return a.i;
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}
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#else
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static short convertFp16SW(float fp32)
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{
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// Fp32 -> Fp16
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fp32Int32 a;
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a.f = fp32;
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int exponent = a.fmt.exponent - kBiasFp32Exponent;
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int significand = a.fmt.significand;
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fp16Int16 result;
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result.i = 0;
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if( 0x477ff000 <= ( a.i & 0x7fffffff ) )
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{
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// Inf in Fp16
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result.i = result.i | 0x7C00;
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if( exponent == 128 && significand != 0 )
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{
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// NaN
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result.i = (short)(result.i | 0x200 | (significand >> kShiftSignificand));
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}
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}
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else if ( ( a.i & 0x7fffffff ) <= 0x387fe000 )
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{
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// subnormal in Fp16
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int fp16Significand = significand | 0x800000;
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int bitShift = (-exponent) - 1;
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fp16Significand = fp16Significand >> bitShift;
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// special cases to round up
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int threshold = 0x8000 + ( ( fp16Significand & 1 ) ? 0 : 1 );
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if( threshold <= ( significand & 0xffff ) )
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{
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fp16Significand++;
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}
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result.i = (short)fp16Significand;
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}
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else
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{
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// usual situation
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// exponent
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result.fmt.exponent = (exponent + kBiasFp16Exponent);
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// significand;
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short fp16Significand = (short)(significand >> kShiftSignificand);
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result.fmt.significand = fp16Significand;
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// special cases to round up
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short lsb10bitsFp32 = (significand & 0x1fff);
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short threshold = 0x1000 + ( ( fp16Significand & 0x1 ) ? 0 : 1 );
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if( threshold <= lsb10bitsFp32 )
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{
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result.i++;
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}
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else if ( fp16Significand == 0x3ff && exponent == -15)
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{
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result.i++;
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}
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}
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// sign bit
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result.fmt.sign = a.fmt.sign;
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return result.i;
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}
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#endif
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template<typename T, typename DT> static void
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cvtScaleHalfSW_( const T* src, size_t sstep, DT* dst, size_t dstep, Size size)
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{
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sstep /= sizeof(src[0]);
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dstep /= sizeof(dst[0]);
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for( ; size.height--; src += sstep, dst += dstep )
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{
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for ( int x = 0 ; x < size.width; x ++ )
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{
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dst[x] = convertFp16SW(src[x]);
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}
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}
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}
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// template for FP16 HW conversion function
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template<typename T, typename DT> static void
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cvtScaleHalfHW_( const T* src, size_t sstep, DT* dst, size_t dstep, Size size)
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{
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sstep /= sizeof(src[0]);
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dstep /= sizeof(dst[0]);
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for( ; size.height--; src += sstep, dst += dstep )
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{
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int x = 0;
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for ( ; x < size.width; x++ )
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{
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}
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}
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}
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template<> void
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cvtScaleHalfHW_<float, short>( const float* src, size_t sstep, short* dst, size_t dstep, Size size)
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{
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sstep /= sizeof(src[0]);
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dstep /= sizeof(dst[0]);
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for( ; size.height--; src += sstep, dst += dstep )
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{
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int x = 0;
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if ( ( (intptr_t)dst & 0xf ) == 0 && ( (intptr_t)src & 0xf ) == 0 )
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{
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#if CV_FP16
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for ( ; x <= size.width - 4; x += 4)
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{
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#if defined(__x86_64__) || defined(_M_X64) || defined(_M_IX86) || defined(i386)
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__m128 v_src = _mm_load_ps(src + x);
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__m128i v_dst = _mm_cvtps_ph(v_src, 0);
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_mm_storel_epi64((__m128i *)(dst + x), v_dst);
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#elif defined __GNUC__ && (defined __arm__ || defined __aarch64__)
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float32x4_t v_src = *(float32x4_t*)(src + x);
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float16x4_t v_dst = vcvt_f16_f32(v_src);
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*(float16x4_t*)(dst + x) = v_dst;
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#endif
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}
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#endif
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}
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for ( ; x < size.width; x++ )
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{
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dst[x] = convertFp16SW(src[x]);
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}
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}
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}
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template<> void
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cvtScaleHalfHW_<short, float>( const short* src, size_t sstep, float* dst, size_t dstep, Size size)
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{
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sstep /= sizeof(src[0]);
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dstep /= sizeof(dst[0]);
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for( ; size.height--; src += sstep, dst += dstep )
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{
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int x = 0;
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if ( ( (intptr_t)dst & 0xf ) == 0 && ( (intptr_t)src & 0xf ) == 0 )
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{
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#if CV_FP16
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for ( ; x <= size.width - 4; x += 4)
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{
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#if defined(__x86_64__) || defined(_M_X64) || defined(_M_IX86) || defined(i386)
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__m128i v_src = _mm_loadl_epi64((__m128i*)(src+x));
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__m128 v_dst = _mm_cvtph_ps(v_src);
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_mm_store_ps((dst + x), v_dst);
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#elif defined __GNUC__ && (defined __arm__ || defined __aarch64__)
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float16x4_t v_src = *(float16x4_t*)(src + x);
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float32x4_t v_dst = vcvt_f32_f16(v_src);
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*(float32x4_t*)(dst + x) = v_dst;
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#endif
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}
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#endif
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}
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for ( ; x < size.width; x++ )
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{
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dst[x] = convertFp16SW(src[x]);
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}
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}
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}
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template<typename T, typename DT> static void
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cvt_( const T* src, size_t sstep,
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DT* dst, size_t dstep, Size size )
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@ -4443,6 +4720,13 @@ static void cvtScaleAbs##suffix( const stype* src, size_t sstep, const uchar*, s
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tfunc(src, sstep, dst, dstep, size, (wtype)scale[0], (wtype)scale[1]); \
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}
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#define DEF_CVT_SCALE_FP16_FUNC(suffix, stype, dtype, resource) \
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static void cvtScaleHalf##suffix##resource( const stype* src, size_t sstep, const uchar*, size_t, \
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dtype* dst, size_t dstep, Size size, double*) \
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{ \
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cvtScaleHalf##resource##_<stype,dtype>(src, sstep, dst, dstep, size); \
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}
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#define DEF_CVT_SCALE_FUNC(suffix, stype, dtype, wtype) \
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static void cvtScale##suffix( const stype* src, size_t sstep, const uchar*, size_t, \
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dtype* dst, size_t dstep, Size size, double* scale) \
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@ -4499,6 +4783,11 @@ DEF_CVT_SCALE_ABS_FUNC(32s8u, cvtScaleAbs_, int, uchar, float)
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DEF_CVT_SCALE_ABS_FUNC(32f8u, cvtScaleAbs_, float, uchar, float)
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DEF_CVT_SCALE_ABS_FUNC(64f8u, cvtScaleAbs_, double, uchar, float)
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DEF_CVT_SCALE_FP16_FUNC(32f16f, float, short, SW)
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DEF_CVT_SCALE_FP16_FUNC(16f32f, short, float, SW)
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DEF_CVT_SCALE_FP16_FUNC(32f16f, float, short, HW)
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DEF_CVT_SCALE_FP16_FUNC(16f32f, short, float, HW)
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DEF_CVT_SCALE_FUNC(8u, uchar, uchar, float)
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DEF_CVT_SCALE_FUNC(8s8u, schar, uchar, float)
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DEF_CVT_SCALE_FUNC(16u8u, ushort, uchar, float)
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@ -4620,6 +4909,30 @@ static BinaryFunc getCvtScaleAbsFunc(int depth)
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return cvtScaleAbsTab[depth];
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}
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BinaryFunc getConvertFuncFp16(int ddepth, bool useHW)
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{
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static BinaryFunc cvtTabHW[] =
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{
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0, 0, 0,
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(BinaryFunc)(cvtScaleHalf32f16fHW), 0, (BinaryFunc)(cvtScaleHalf16f32fHW),
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0, 0,
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};
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static BinaryFunc cvtTabSW[] =
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{
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0, 0, 0,
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(BinaryFunc)(cvtScaleHalf32f16fSW), 0, (BinaryFunc)(cvtScaleHalf16f32fSW),
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0, 0,
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};
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if( useHW == true)
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{
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return cvtTabHW[CV_MAT_DEPTH(ddepth)];
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}
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else
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{
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return cvtTabSW[CV_MAT_DEPTH(ddepth)];
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}
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}
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BinaryFunc getConvertFunc(int sdepth, int ddepth)
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{
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static BinaryFunc cvtTab[][8] =
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@ -4804,6 +5117,52 @@ void cv::convertScaleAbs( InputArray _src, OutputArray _dst, double alpha, doubl
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}
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}
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void cv::convertFp16( InputArray _src, OutputArray _dst, bool useHW )
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{
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if ( checkHardwareSupport(CV_CPU_FP16) == false)
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{
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useHW = false;
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}
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Mat src = _src.getMat();
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int ddepth = 0;
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switch( src.depth() )
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{
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case CV_32F:
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ddepth = CV_16S;
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break;
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case CV_16S:
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ddepth = CV_32F;
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break;
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default:
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return;
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}
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int type = CV_MAKETYPE(ddepth, src.channels());
|
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_dst.create( src.dims, src.size, type );
|
||||
Mat dst = _dst.getMat();
|
||||
BinaryFunc func = getConvertFuncFp16(ddepth, useHW);
|
||||
int cn = src.channels();
|
||||
CV_Assert( func != 0 );
|
||||
|
||||
if( src.dims <= 2 )
|
||||
{
|
||||
Size sz = getContinuousSize(src, dst, cn);
|
||||
func( src.data, src.step, 0, 0, dst.data, dst.step, sz, 0);
|
||||
}
|
||||
else
|
||||
{
|
||||
const Mat* arrays[] = {&src, &dst, 0};
|
||||
uchar* ptrs[2];
|
||||
NAryMatIterator it(arrays, ptrs);
|
||||
Size sz((int)(it.size*cn), 1);
|
||||
|
||||
for( size_t i = 0; i < it.nplanes; i++, ++it )
|
||||
func(ptrs[0], 1, 0, 0, ptrs[1], 1, sz, 0);
|
||||
}
|
||||
}
|
||||
|
||||
void cv::Mat::convertTo(OutputArray _dst, int _type, double alpha, double beta) const
|
||||
{
|
||||
bool noScale = fabs(alpha-1) < DBL_EPSILON && fabs(beta) < DBL_EPSILON;
|
||||
|
||||
@ -135,6 +135,7 @@ typedef void (*BinaryFuncC)(const uchar* src1, size_t step1,
|
||||
uchar* dst, size_t step, int width, int height,
|
||||
void*);
|
||||
|
||||
BinaryFunc getConvertFuncFp16(int ddepth, bool useHW);
|
||||
BinaryFunc getConvertFunc(int sdepth, int ddepth);
|
||||
BinaryFunc getCopyMaskFunc(size_t esz);
|
||||
|
||||
|
||||
@ -291,6 +291,7 @@ struct HWFeatures
|
||||
f.have[CV_CPU_SSE4_2] = (cpuid_data[2] & (1<<20)) != 0;
|
||||
f.have[CV_CPU_POPCNT] = (cpuid_data[2] & (1<<23)) != 0;
|
||||
f.have[CV_CPU_AVX] = (((cpuid_data[2] & (1<<28)) != 0)&&((cpuid_data[2] & (1<<27)) != 0));//OS uses XSAVE_XRSTORE and CPU support AVX
|
||||
f.have[CV_CPU_FP16] = (cpuid_data[2] & (1<<29)) != 0;
|
||||
|
||||
// make the second call to the cpuid command in order to get
|
||||
// information about extended features like AVX2
|
||||
@ -338,7 +339,8 @@ struct HWFeatures
|
||||
#if defined ANDROID || defined __linux__
|
||||
#ifdef __aarch64__
|
||||
f.have[CV_CPU_NEON] = true;
|
||||
#else
|
||||
f.have[CV_CPU_FP16] = true;
|
||||
#elif defined __arm__
|
||||
int cpufile = open("/proc/self/auxv", O_RDONLY);
|
||||
|
||||
if (cpufile >= 0)
|
||||
@ -351,6 +353,7 @@ struct HWFeatures
|
||||
if (auxv.a_type == AT_HWCAP)
|
||||
{
|
||||
f.have[CV_CPU_NEON] = (auxv.a_un.a_val & 4096) != 0;
|
||||
f.have[CV_CPU_FP16] = (auxv.a_un.a_val & 2) != 0;
|
||||
break;
|
||||
}
|
||||
}
|
||||
@ -358,8 +361,13 @@ struct HWFeatures
|
||||
close(cpufile);
|
||||
}
|
||||
#endif
|
||||
#elif (defined __clang__ || defined __APPLE__) && (defined __ARM_NEON__ || (defined __ARM_NEON && defined __aarch64__))
|
||||
#elif (defined __clang__ || defined __APPLE__)
|
||||
#if (defined __ARM_NEON__ || (defined __ARM_NEON && defined __aarch64__))
|
||||
f.have[CV_CPU_NEON] = true;
|
||||
#endif
|
||||
#if (defined __ARM_FP && (((__ARM_FP & 0x2) != 0) && defined __ARM_NEON__))
|
||||
f.have[CV_CPU_FP16] = true;
|
||||
#endif
|
||||
#endif
|
||||
|
||||
return f;
|
||||
|
||||
@ -737,6 +737,60 @@ struct ConvertScaleOp : public BaseElemWiseOp
|
||||
int ddepth;
|
||||
};
|
||||
|
||||
struct ConvertScaleFp16Op : public BaseElemWiseOp
|
||||
{
|
||||
ConvertScaleFp16Op() : BaseElemWiseOp(1, FIX_BETA+REAL_GAMMA, 1, 1, Scalar::all(0)), nextRange(0) { }
|
||||
void op(const vector<Mat>& src, Mat& dst, const Mat&)
|
||||
{
|
||||
convertFp16(src[0], dst, true);
|
||||
}
|
||||
void refop(const vector<Mat>& src, Mat& dst, const Mat&)
|
||||
{
|
||||
convertFp16(src[0], dst, false);
|
||||
}
|
||||
int getRandomType(RNG&)
|
||||
{
|
||||
// 0: FP32 -> FP16
|
||||
// 1: FP16 -> FP32
|
||||
int srctype = (nextRange & 1) == 0 ? CV_32F : CV_16S;
|
||||
return srctype;
|
||||
}
|
||||
void getValueRange(int, double& minval, double& maxval)
|
||||
{
|
||||
// 0: FP32 -> FP16
|
||||
// 1: FP16 -> FP32
|
||||
if( (nextRange & 1) == 0 )
|
||||
{
|
||||
// largest integer number that fp16 can express
|
||||
maxval = 65504.f;
|
||||
minval = -maxval;
|
||||
}
|
||||
else
|
||||
{
|
||||
// 0: positive number range
|
||||
// 1: negative number range
|
||||
if( (nextRange & 2) == 0 )
|
||||
{
|
||||
minval = 0; // 0x0000 +0
|
||||
maxval = 31744; // 0x7C00 +Inf
|
||||
}
|
||||
else
|
||||
{
|
||||
minval = -32768; // 0x8000 -0
|
||||
maxval = -1024; // 0xFC00 -Inf
|
||||
}
|
||||
}
|
||||
}
|
||||
double getMaxErr(int)
|
||||
{
|
||||
return 0.5f;
|
||||
}
|
||||
void generateScalars(int, RNG& rng)
|
||||
{
|
||||
nextRange = rng.next();
|
||||
}
|
||||
int nextRange;
|
||||
};
|
||||
|
||||
struct ConvertScaleAbsOp : public BaseElemWiseOp
|
||||
{
|
||||
@ -1371,6 +1425,7 @@ INSTANTIATE_TEST_CASE_P(Core_Copy, ElemWiseTest, ::testing::Values(ElemWiseOpPtr
|
||||
INSTANTIATE_TEST_CASE_P(Core_Set, ElemWiseTest, ::testing::Values(ElemWiseOpPtr(new cvtest::SetOp)));
|
||||
INSTANTIATE_TEST_CASE_P(Core_SetZero, ElemWiseTest, ::testing::Values(ElemWiseOpPtr(new cvtest::SetZeroOp)));
|
||||
INSTANTIATE_TEST_CASE_P(Core_ConvertScale, ElemWiseTest, ::testing::Values(ElemWiseOpPtr(new cvtest::ConvertScaleOp)));
|
||||
INSTANTIATE_TEST_CASE_P(Core_ConvertScaleFp16, ElemWiseTest, ::testing::Values(ElemWiseOpPtr(new cvtest::ConvertScaleFp16Op)));
|
||||
INSTANTIATE_TEST_CASE_P(Core_ConvertScaleAbs, ElemWiseTest, ::testing::Values(ElemWiseOpPtr(new cvtest::ConvertScaleAbsOp)));
|
||||
|
||||
INSTANTIATE_TEST_CASE_P(Core_Add, ElemWiseTest, ::testing::Values(ElemWiseOpPtr(new cvtest::AddOp)));
|
||||
|
||||
@ -3064,6 +3064,9 @@ void printVersionInfo(bool useStdOut)
|
||||
#if CV_NEON
|
||||
if (checkHardwareSupport(CV_CPU_NEON)) cpu_features += " neon";
|
||||
#endif
|
||||
#if CV_FP16
|
||||
if (checkHardwareSupport(CV_CPU_FP16)) cpu_features += " fp16";
|
||||
#endif
|
||||
|
||||
cpu_features.erase(0, 1); // erase initial space
|
||||
|
||||
|
||||
Loading…
Reference in New Issue
Block a user