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623d2f0dc0
Update Bitbuf to use stdmac and decrease register dependencies by replaces a sub with an and. Change-Id: Iaadf3c6ef7f533540a7adb57a418e9e80e9b8503 Signed-off-by: Roy Oursler <roy.j.oursler@intel.com>
65 lines
2.4 KiB
NASM
65 lines
2.4 KiB
NASM
;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
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; Copyright(c) 2011-2016 Intel Corporation All rights reserved.
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;
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; Redistribution and use in source and binary forms, with or without
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; modification, are permitted provided that the following conditions
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; are met:
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; * Redistributions of source code must retain the above copyright
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; notice, this list of conditions and the following disclaimer.
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; * Redistributions in binary form must reproduce the above copyright
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; notice, this list of conditions and the following disclaimer in
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; the documentation and/or other materials provided with the
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; distribution.
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; * Neither the name of Intel Corporation nor the names of its
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; contributors may be used to endorse or promote products derived
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; from this software without specific prior written permission.
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;
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; THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
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; "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
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; LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
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; A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
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; OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
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; SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
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; LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
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; DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
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; THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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; (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
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; OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
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%include "options.asm"
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%include "stdmac.asm"
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; Assumes m_out_buf is a register
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; Clobbers RCX
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; code is clobbered
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; write_bits_always m_bits, m_bit_count, code, count, m_out_buf
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%macro write_bits 5
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%define %%m_bits %1
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%define %%m_bit_count %2
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%define %%code %3
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%define %%count %4
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%define %%m_out_buf %5
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SHLX %%code, %%code, %%m_bit_count
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or %%m_bits, %%code
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add %%m_bit_count, %%count
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mov [%%m_out_buf], %%m_bits
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mov rcx, %%m_bit_count
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shr rcx, 3 ; rcx = bytes
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add %%m_out_buf, rcx
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shl rcx, 3 ; rcx = bits
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and %%m_bit_count, 0x7
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SHRX %%m_bits, %%m_bits, rcx
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%endm
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%macro write_dword 2
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%define %%data %1d
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%define %%addr %2
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mov [%%addr], %%data
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add %%addr, 4
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%endm
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