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To support Intel CET, all indirect branch targets must start with ENDBR32/ENDBR64. Here is a patch to define endbranch and add it to function entries in x86 assembly codes which are indirect branch targets as discovered by running testsuite on Intel CET machine and visual inspection. Verified with $ CC="gcc -Wl,-z,cet-report=error -fcf-protection" CXX="g++ -Wl,-z,cet-report=error -fcf-protection" .../configure x86_64-linux $ make -j8 $ make -j8 check with both nasm and yasm on both CET and non-CET machines. Change-Id: I9822578e7294fb5043a64ab7de5c41de81a7d337 Signed-off-by: H.J. Lu <hjl.tools@gmail.com> |
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.. | ||
aarch64 | ||
Makefile.am | ||
pq_check_sse_i32.asm | ||
pq_check_sse.asm | ||
pq_check_test.c | ||
pq_gen_avx2.asm | ||
pq_gen_avx512.asm | ||
pq_gen_avx.asm | ||
pq_gen_perf.c | ||
pq_gen_sse_i32.asm | ||
pq_gen_sse.asm | ||
pq_gen_test.c | ||
raid_base_aliases.c | ||
raid_base.c | ||
raid_multibinary_i32.asm | ||
raid_multibinary.asm | ||
xor_check_sse.asm | ||
xor_check_test.c | ||
xor_example.c | ||
xor_gen_avx512.asm | ||
xor_gen_avx.asm | ||
xor_gen_perf.c | ||
xor_gen_sse.asm | ||
xor_gen_test.c |