isa-l/crc/aarch64/Makefile.am
Zhiyuan Zhu 031450f697 crc32: Implement default mix mode optimization
Change-Id: Ib3bf04215cca491db522ec33905fe48df173cc2f
Signed-off-by: Zhiyuan Zhu <zhiyuan.zhu@arm.com>
2020-05-09 08:10:34 +00:00

54 lines
2.5 KiB
Makefile

########################################################################
# Copyright(c) 2020 Arm Corporation All rights reserved.
#
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#########################################################################
lsrc_aarch64 += \
crc/aarch64/crc_multibinary_arm.S \
crc/aarch64/crc_aarch64_dispatcher.c
lsrc_aarch64 += \
crc/aarch64/crc16_t10dif_pmull.S \
crc/aarch64/crc16_t10dif_copy_pmull.S \
crc/aarch64/crc32_iscsi_refl_pmull.S \
crc/aarch64/crc32_iscsi_refl_hw_fold.S \
crc/aarch64/crc32_ieee_norm_pmull.S \
crc/aarch64/crc32_gzip_refl_pmull.S \
crc/aarch64/crc32_gzip_refl_hw_fold.S \
crc/aarch64/crc64_ecma_refl_pmull.S \
crc/aarch64/crc64_ecma_norm_pmull.S \
crc/aarch64/crc64_iso_refl_pmull.S \
crc/aarch64/crc64_iso_norm_pmull.S \
crc/aarch64/crc64_jones_refl_pmull.S \
crc/aarch64/crc64_jones_norm_pmull.S \
crc/aarch64/crc32_mix_default.S \
crc/aarch64/crc32c_mix_default.S \
crc/aarch64/crc32_mix_neoverse_n1.S \
crc/aarch64/crc32c_mix_neoverse_n1.S \
crc/aarch64/crc32_crc_ext_cortex_a72.S \
crc/aarch64/crc32c_crc_ext_cortex_a72.S