As already announced in issue #296, we are removing 32-bit x86 support,
which was not being validated anyway.
Signed-off-by: Pablo de Lara <pablo.de.lara.guarch@intel.com>
NASM version 2.14.01 supports all x86 ISA in this library.
Since this version has been out since 2018, it is safe to
only permit the library to be compiled with this minimum version,
as announced in issue #297.
Signed-off-by: Pablo de Lara <pablo.de.lara.guarch@intel.com>
The riscv64 dispatcher code uses the same PROVIDER_INFO macro as the
aarch64 dispatcher and have the same kind of warnings during compilation:
igzip/riscv64/igzip_multibinary_riscv64_dispatcher.c:39:24: warning: type of 'adler32_base' does not match original declaration [-Wlto-type-mismatch]
39 | return PROVIDER_BASIC(adler32);
| ^
igzip/adler32_base.c:34:1: note: return value type mismatch
34 | adler32_base(uint32_t adler32, uint8_t *start, uint64_t length)
| ^
igzip/adler32_base.c:34:1: note: type 'uint32_t' should match type 'void'
igzip/adler32_base.c:34:1: note: 'adler32_base' was previously declared here
This commit introduces the same correction for riscv64.
Signed-off-by: Mattias Ellert <mattias.ellert@physics.uu.se>
The PROVIDER_INFO macro used in the aarch64 code declares all
functions with the signature:
extern void function(void);
The actual return type and parameter list of the functions are however
different. The declarations provided by the PROVIDER_INFO macro
therfore conflicts with the actual declarations of the functions
elsewhere in the code, causing compiler warnings.
This commit drops the PROVIDER_INFO macro and provides proper function
declarations, eiter by including a header file or by providing a
forward declaration. This corresponds to how the code for the other
architectures are handlinging this issue.
Signed-off-by: Mattias Ellert <mattias.ellert@physics.uu.se>
When using RISC-V GCC 14, `gcc -O0` passes the test, but `gcc -O2` fails.
The log shows that it enters the branch `if (c_dut != c_ref) {`
even though `c_dut` and `c_ref` have the same value.
Adding `volatile` allows the test to pass.
Signed-off-by: sunyuechi <sunyuechi@iscas.ac.cn>
When a file contains a number of repeated '0x00' or '0xff'
bytes, the block header is copied from a precomputed header,
which only worked for Little-Endian systems.
Fixes#311.
Signed-off-by: Pablo de Lara <pablo.de.lara.guarch@intel.com>
igzip/igzip_icf_body.c:7:1: warning: type of 'gen_icf_map_lh1' does not match original declaration [-Wlto-type-mismatch]
7 | gen_icf_map_lh1(struct isal_zstream *, struct deflate_icf *, uint32_t);
| ^
igzip/igzip_base_aliases.c:177:1: note: return value type mismatch
177 | gen_icf_map_lh1(struct isal_zstream *stream, struct deflate_icf *matches_icf_lookup,
| ^
igzip/igzip_base_aliases.c:177:1: note: type 'void' should match type 'uint64_t'
igzip/igzip_base_aliases.c:177:1: note: 'gen_icf_map_lh1' was previously declared here
igzip/igzip_base_aliases.c:177:1: note: code may be misoptimized unless '-fno-strict-aliasing' is used
igzip/igzip_icf_body.c:9:1: warning: type of 'set_long_icf_fg' does not match original declaration [-Wlto-type-mismatch]
9 | set_long_icf_fg(uint8_t *, uint64_t, uint64_t, struct deflate_icf *);
| ^
igzip/igzip_base_aliases.c:170:1: note: type mismatch in parameter 2
170 | set_long_icf_fg(uint8_t *next_in, uint8_t *end_in, struct deflate_icf *match_lookup,
| ^
igzip/igzip_base_aliases.c:170:1: note: 'set_long_icf_fg' was previously declared here
igzip/igzip_base_aliases.c:170:1: note: code may be misoptimized unless '-fno-strict-aliasing' is used
igzip/igzip_base_aliases.c:62:1: warning: type of 'set_long_icf_fg_base' does not match original declaration [-Wlto-type-mismatch]
62 | set_long_icf_fg_base(uint8_t *next_in, uint8_t *end_in, struct deflate_icf *match_lookup,
| ^
igzip/igzip_icf_body.c:34:1: note: type mismatch in parameter 2
34 | set_long_icf_fg_base(uint8_t *next_in, uint64_t processed, uint64_t input_size,
| ^
igzip/igzip_icf_body.c:34:1: note: 'set_long_icf_fg_base' was previously declared here
igzip/igzip_icf_body.c:34:1: note: code may be misoptimized unless '-fno-strict-aliasing' is used
igzip/igzip_base_aliases.c:54:1: warning: type of 'adler32_base' does not match original declaration [-Wlto-type-mismatch]
54 | adler32_base(uint32_t init, const unsigned char *buf, uint64_t len);
| ^
igzip/adler32_base.c:34:1: note: type mismatch in parameter 3
34 | adler32_base(uint32_t adler32, uint8_t *start, uint32_t length)
| ^
igzip/adler32_base.c:34:1: note: type 'uint32_t' should match type 'uint64_t'
igzip/adler32_base.c:34:1: note: 'adler32_base' was previously declared here
igzip/adler32_base.c:34:1: note: code may be misoptimized unless '-fno-strict-aliasing' is used
Signed-off-by: Mattias Ellert <mattias.ellert@physics.uu.se>
There are quite a few spelling mistakes and typos in comments and
user facing message literal strings as found using codespell. Fix
these.
Signed-off-by: Colin Ian King <colin.i.king@gmail.com>
Signed-off-by: Pablo de Lara <pablo.de.lara.guarch@intel.com>
compute_dist_code() and compute_dist_icf_code() in huffman.h:
Correct `assert(msb >= 1)` to `assert(msb >= 2)`.
`msb` cannot be lower than 2 as it would result in corrupt computations.
get_dist_code() in huffman.h:
Remove dead `if` statement at the beginning of the function.
`dist` must be equal 1 or above in this function.
Signed-off-by: Tomasz Kantecki <tomasz.kantecki@intel.com>
Fix the following build issue by initializing look_back_dist to 0.
igzip/igzip_inflate.c: In function ‘decode_huffman_code_block_stateless_base’:
igzip/igzip_inflate.c:1727:36:
warning: ‘look_back_dist’ may be used uninitialized [-Wmaybe-uninitialized]
Signed-off-by: Pablo de Lara <pablo.de.lara.guarch@intel.com>
The zstate.hist_bits is an option and shouldn't be set randomly by a
deflate stateless run but like level we may set anyway.
Change-Id: I37d3b51863d4697e964d45a482ddd526f40a0902
Signed-off-by: Greg Tucker <greg.b.tucker@intel.com>
- It should be fine to enable pmull always on Apple Silicon
- macOS 12+ is required for PMULL instruction.
- Changed the conditional macro to __APPLE__
- Rewritten dispatcher using sysctlbyname
- Use __USER_LABEL_PREFIX__
- Use __TEXT,__const as readonly section
- use ASM_DEF_RODATA macro
- fix func decl
Change-Id: I800593f21085d8187b480c8bb3ab2bd70c4a6974
Signed-off-by: Taiju Yamada <tyamada@bi.a.u-tokyo.ac.jp>
The cold versions of tests depended on a fixed size of last level
cache that is too low on some arch and too high for the total
available memory on others.
Change-Id: Iee98403f9ace02e01b810c296a5fe44b933bfb17
Signed-off-by: Greg Tucker <greg.b.tucker@intel.com>
The relic slver is no longer used for individual versioning
on functions and is confusing tools looking for data in text
sections. This removes all instances instead of fixing since
its usefulness is waining. Fixes#221
Change-Id: Ife0b9f105950a90337c58e8a41ac2cffc0f67d99
Signed-off-by: Greg Tucker <greg.b.tucker@intel.com>
In the adler32_neon function, during the last iteration of the
loop through "accum32_neon", we would load data after the end of the
buffer (in the ld1 instruction, the "start" register points to the end
of the buffer).
If this memory is unmapped, this would cause a segfault. If the memory
is mapped, the checksum would be correct because that value would
only be used in the next iteration, but this happens during the last
iteration.
To fix this, we can simply do the load before incrementing "start". And
while we're at it, we can load directly into d0_v/d1_v, saving a couple
of mov's.
Finally, the ld1 done during the function initialization can be removed
as the values aren't used for anything.
Change-Id: I4a0f2811adc523852ebe774da0a6fb1f5419192f
Signed-off-by: Martin Oliveira <martin.oliveira@eideticom.com>
The goal of this patch is to make isa-l testsuite pass on s390 with
minimal changes to the library. The one and only reason isa-l does not
work on s390 at the moment is that s390 is big-endian, and isa-l
assumes little-endian at a lot of places.
There are two flavors of this: loading/storing integers from/to
memory, and overlapping structs. Loads/stores are already helpfully
wrapped by unaligned.h header, so replace the functions there with
endianness-aware variants. Solve struct member overlap by reversing
their order on big-endian.
Also, fix a couple of usages of uninitialized memory in the testsuite
(found with MemorySanitizer).
Fixes s390x part of #188.
Change-Id: Iaf14a113bd266900192cc8b44212f8a47a8c7753
Signed-off-by: Ilya Leoshkevich <iii@linux.ibm.com>
Instead of using a constant as default zlib header, create the header on the fly. Both zlib
header bytes depend on the wbits and compression level used.
Make sure that ISA-L compression level 0 is advertised as the fastest compression in
both the gzip header (setting xfl flag to 0x04) and the zlib header (as 0, fastest, other levels are 1, fast).
Change-Id: I1f30e4397a0f5fcf6df593c40178e7d6f6c05328
Signed-off-by: Ruben Vorderman <r.h.p.vorderman@lumc.nl>
The file types.h has long been misnamed and overlaps with
functionality in the test helper routines.
Change-Id: I774047d3a0074198b67a6b4e909f1e2ce1938195
Signed-off-by: Greg Tucker <greg.b.tucker@intel.com>
Author of this patch is Taiju Yamada <tyamada@bi.a.u-tokyo.ac.jp>
Re-organized by Jerry Yu <jerry.h.yu@arm.com>
Clang version must be later than 9.x according to https://reviews.llvm.org/D61719
Change-Id: I7516cca17ef4556b828fb6ecfa755e6451052359
Signed-off-by: Jerry Yu <jerry.h.yu@arm.com>
Clang with sanitizer on was catching on cast of static header.
Switching to uload64 macro for better general solution.
Change-Id: I495d440407bb1773841e2f7cdc48bd95fc1a2df4
Signed-off-by: Greg Tucker <greg.b.tucker@intel.com>
In the newly added function isal_deflate_process_dict(), a null check
was added to the dictionary struct but was ineffectual because of the
order.
Change-Id: I3b3e70997210794de102b1348e1467295871cee2
Signed-off-by: Greg Tucker <greg.b.tucker@intel.com>
