60 Commits

Author SHA1 Message Date
Pablo de Lara
55e25f7aa2 raid: add consolidated performance app
Added new RAID performance application which consolidates the
existing XOR and P+Q gen performance applications.

This application accepts buffer sizes to benchmark,
as a single value, list or range, and the RAID function
to test and the number of sources.

Signed-off-by: Pablo de Lara <pablo.de.lara.guarch@intel.com>
2025-07-03 15:00:56 +02:00
Pablo de Lara
199a0a8151 crc: add CRC consolidated performance benchmark
Added new CRC performance application which consolidates the
existing CRC performance applications (CRC16, CRC32 and CRC64).

This application accepts buffer sizes to benchmark,
as a single value, list or range, and the CRC function
to test (or all of them).

Signed-off-by: Pablo de Lara <pablo.de.lara.guarch@intel.com>
2025-06-23 08:48:01 +01:00
Pablo de Lara
8045bee170 Bump minimum NASM version to 2.14.01
NASM version 2.14.01 supports all x86 ISA in this library.
Since this version has been out since 2018, it is safe to
only permit the library to be compiled with this minimum version,
as announced in issue #297.

Signed-off-by: Pablo de Lara <pablo.de.lara.guarch@intel.com>
2025-05-08 16:20:08 +01:00
Pablo de Lara
9b3532244b Remove YASM support
Signed-off-by: Pablo de Lara <pablo.de.lara.guarch@intel.com>
2025-04-29 17:37:34 +01:00
Pablo de Lara
8401831dc4 raid: add AVX2+GFNI implementation for P+Q gen
Signed-off-by: Pablo de Lara <pablo.de.lara.guarch@intel.com>
2025-04-29 13:51:12 +01:00
Pablo de Lara
55a42d7717 raid: add AVX512+GFNI implementation for P+Q gen
Signed-off-by: Pablo de Lara <pablo.de.lara.guarch@intel.com>
2025-04-29 13:51:12 +01:00
Karpenko, Veronika
3e03e91cef igzip: add inflate example
Signed-off-by: Karpenko, Veronika <veronika.karpenko@intel.com>
2025-04-08 10:13:32 +01:00
Pablo de Lara
28305ade9e Bump version to v2.31.1
Signed-off-by: Pablo de Lara <pablo.de.lara.guarch@intel.com>
2025-01-03 10:26:01 +00:00
Cornu, Marcel D
00d6e6fe87 add perf target to windows makefile
Signed-off-by: Cornu, Marcel D <marcel.d.cornu@intel.com>
2024-11-19 14:20:33 +00:00
Pablo de Lara
bd22637502 Bump version to v2.31
Signed-off-by: Pablo de Lara <pablo.de.lara.guarch@intel.com>
2024-01-18 18:27:24 +00:00
Pablo de Lara
ae0a688051 Update License file
Signed-off-by: Pablo de Lara <pablo.de.lara.guarch@intel.com>
2024-01-09 09:42:48 +00:00
Marcel Cornu
a53a20ea2a erasure_code: add AVX2 5vect mad with GFNI implementation
Signed-off-by: Marcel Cornu <marcel.d.cornu@intel.com>
2023-12-14 17:55:49 +00:00
Marcel Cornu
47ed2847af erasure_code: add AVX2 4vect mad with GFNI implementation
Signed-off-by: Marcel Cornu <marcel.d.cornu@intel.com>
2023-12-14 17:55:49 +00:00
Marcel Cornu
22b7f33d68 erasure_code: add AVX2 3vect mad with GFNI implementation
Signed-off-by: Marcel Cornu <marcel.d.cornu@intel.com>
2023-12-14 17:55:49 +00:00
Marcel Cornu
a0a149d674 erasure_code: add AVX2 2vect mad with GFNI implementation
Signed-off-by: Marcel Cornu <marcel.d.cornu@intel.com>
2023-12-13 17:03:16 +00:00
Marcel Cornu
164d9ff1f0 erasure_code: add 2 vector AVX2 dot product with GFNI implementation
Signed-off-by: Marcel Cornu <marcel.d.cornu@intel.com>
2023-12-11 22:44:07 +00:00
Marcel Cornu
307d737bf2 erasure_code: add 3 vector AVX2 dot product with GFNI implementation
Signed-off-by: Marcel Cornu <marcel.d.cornu@intel.com>
2023-12-07 14:01:18 +00:00
Marcel Cornu
5f23c03415 erasure_code: add initial AVX2 mad with GFNI implementation
Signed-off-by: Marcel Cornu <marcel.d.cornu@intel.com>
2023-12-01 14:20:56 +00:00
Pablo de Lara
447d9af75b erasure_code: add initial AVX2 dot product with GFNI implementation
Signed-off-by: Pablo de Lara <pablo.de.lara.guarch@intel.com>
Signed-off-by: Marcel Cornu <marcel.d.cornu@intel.com>
2023-12-01 14:20:56 +00:00
Pablo de Lara
65e89717df erasure_code: implement EC update with AVX512 + GFNI
Signed-off-by: Pablo de Lara <pablo.de.lara.guarch@intel.com>
2023-11-23 10:56:28 +00:00
Pablo de Lara
1eff12dddb erasure_code: implement EC with AVX512 + GFNI
Signed-off-by: Pablo de Lara <pablo.de.lara.guarch@intel.com>
2023-11-23 10:56:28 +00:00
Pablo de Lara
2bbce31943 crc: add CRC64 rocksoft implementation
- Added reference implementation
- Added base implementation
- Added functional and performance tests

Change-Id: I60c5097bd5fb89ee7a50910e71d449d50d155d0a
Signed-off-by: Pablo de Lara <pablo.de.lara.guarch@intel.com>
Signed-off-by: Greg Tucker <greg.b.tucker@intel.com>
2023-05-08 12:37:44 +00:00
Greg Tucker
62519d97ec build: Remove ms link flag for msvcrt
The cflag to link with dynamic msvcrt /MD is not necessary and causes
warnings when static linking.  Fixes #219

Change-Id: I0085d468afc4acbe323b0783cbbc6760b4c70704
Signed-off-by: Greg Tucker <greg.b.tucker@intel.com>
2022-07-11 16:16:07 -07:00
Nicola Torracca
e3783f28f8 Add AVX512 implementation of mem_zero_detect().
Change-Id: I60fe0846d783787198b6a44a090fd9fe17c1807f
Signed-off-by: Nicola Torracca <shark@bitchx.it>
2022-01-04 12:25:23 -07:00
Greg Tucker
87908c9060 mem: Move new mem_zero_detect function to avx2
New mem_zero_detect function will fail on avx only machines.

Change-Id: I3bca49bff886f9c130c89e8c74b31110e9bac76b
Signed-off-by: Greg Tucker <greg.b.tucker@intel.com>
2021-09-30 17:47:57 -07:00
Greg Tucker
066940a9a7 build: Add ms rc file to put extra metatdata on dll
Change-Id: Idf687c6b2f8d1dea203f01bf57c5158d19ed519e
Signed-off-by: Ranjit Menon <ranjit.menon@intel.com>
Signed-off-by: Greg Tucker <greg.b.tucker@intel.com>
2021-09-02 18:27:51 -07:00
Greg Tucker
d5928e3760 build: Fix missing ms function export
Windows def file was missing an exported ec support function.
Also added path in nmake file to build extra examples.

Change-Id: I59ac1599dcb8cdb45077347c74b57aeca4751c35
Signed-off-by: Greg Tucker <greg.b.tucker@intel.com>
2021-06-07 18:30:08 -07:00
Greg Tucker
fe4b7f9acc Add toplevel header gen in windows
Change-Id: I3a1e5fc495266d8ba223d75384625e22c3cf66fe
Signed-off-by: Greg Tucker <greg.b.tucker@intel.com>
2021-05-06 16:44:10 -07:00
Greg Tucker
24623b8b82 crc: Fix missing object omitted from nmake file
Previous new crc version missed the update for nmake.

Change-Id: Ie529ee9d70d8d0ab8a8af3bd2720405802180d1e
Signed-off-by: Greg Tucker <greg.b.tucker@intel.com>
2020-08-26 09:49:23 -07:00
Greg Tucker
5e586843eb build: Change ms nmake default to nasm and add pdb gen
The nmake default is changed for a modern nasm. Older nasm and yasm versions
will still work with windows but the nmake options must be changed appropriately
for max AS_FEATURE_LEVEL to match. Also now generates debug symbol pdb files.

Change-Id: I94a2dd7ecf541c6564ccbd4a184c33995d7b31ad
Signed-off-by: Poornima Kumar <poornima.kumar@intel.com>
Signed-off-by: Greg Tucker <greg.b.tucker@intel.com>
2020-03-31 22:55:27 +00:00
Greg Tucker
7c0ab1d459 build: Add auto regenerate of nmake file
Change-Id: Icaa64aa35697c87779df18c3941d3df0f3256546
Signed-off-by: Greg Tucker <greg.b.tucker@intel.com>
2020-03-10 14:00:05 -07:00
Greg Tucker
25a673d75a crc: Add new vclmul version of gzip_refl
Change-Id: I8050853dcd177f4fb506f32f5fa723f7a1d3cded
Signed-off-by: Greg Tucker <greg.b.tucker@intel.com>
2020-02-21 10:11:16 -07:00
Greg Tucker
4217930338 crc: Add vec version of crc16_t10dif_copy
Change-Id: I5f73e8a38efd1ff50d30a39689d9d85da702e809
Signed-off-by: Greg Tucker <greg.b.tucker@intel.com>
2020-02-21 10:11:16 -07:00
Greg Tucker
02a41e0653 crc: Add vec version of crc32_ieee when avx avail
Change-Id: I5542ee93156c26f5a23feb89b82f4c51f282777d
Signed-off-by: Greg Tucker <greg.b.tucker@intel.com>
2020-02-21 10:11:16 -07:00
Greg Tucker
d4131bb3d3 crc: Add vec version of crc32_gzip_refl when avx avail
Change-Id: I4a069c318c809dcd21a6ebc47d3e0d1c131599ea
Signed-off-by: Greg Tucker <greg.b.tucker@intel.com>
2020-02-21 10:11:16 -07:00
Greg Tucker
ad22a90686 crc: Add vec version of crc16 when avx available
Vec versions mix much better with other avx code.

Change-Id: I2544c75d09231ee70f16c384b1e57062976199d9
Signed-off-by: Greg Tucker <greg.b.tucker@intel.com>
2020-02-21 10:11:16 -07:00
Roy Oursler
4ac2b7864b igzip: Remove igzip_inflate_perf
Remove igzip_inflate_perf as all the functionality is duplicated in igzip_perf

Change-Id: I510cc4643a3949e2fa8f30309b5d45a249320b9e
Signed-off-by: Roy Oursler <roy.j.oursler@intel.com>
2019-03-07 09:28:04 -07:00
Roy Oursler
4f79dc1e83 build: Remove non-extant perf test from nmake
Change-Id: I4f8872c9c48f9779e37347fb2a776f5f4013ffed
Signed-off-by: Roy Oursler <roy.j.oursler@intel.com>
2019-03-07 09:28:04 -07:00
Roy Oursler
3a78c4a205 ec: Remove gf_vect_mad_perf.c
Remove gf_vect_mad_perf.c as it is architecture specific and does not provide
useful information in its current format.

Change-Id: I7819679db491a9b5572128e4fc05d989b870d22d
Signed-off-by: Roy Oursler <roy.j.oursler@intel.com>
2019-03-07 09:28:04 -07:00
John Kariuki
6e2013391a mem: Add zero detect memory functions
This patch introduces the base, avx and sse optimized zero detect memory function.
The zero detect memory function tests if a memory region is all zeroes. If all the
bytes in the memory region are zero, the function return a zero. Otherwise, if the
memory region has non zero bytes, the zero detect function returns a 1.

Change-Id: If965badf750377124d0067d09f888d0419554998
Signed-off-by: John Kariuki <John.K.Kariuki@intel.com>
2018-09-25 14:33:31 -07:00
Roy Oursler
9689ba7e13 igzip: Remove igzip copy of crc32_gzip
Change-Id: I859ed904effa0a8bd7462b77b13e359014912639
Signed-off-by: Roy Oursler <roy.j.oursler@intel.com>
2018-09-20 11:12:02 -07:00
Roy Oursler
43374f6776 igzip: Implement gzip/zlib header/trailer parsing
Change-Id: I3fe8653f2286212a9d6c6ecfa3b78752b2cac8ef
Signed-off-by: Roy Oursler <roy.j.oursler@intel.com>
2018-09-20 11:12:02 -07:00
Roy Oursler
21e78d5aa3 igzip: improve igzip_body_compilations
Change-Id: I7ad859a986c643336be8824f6400b266ff140dcd
Signed-off-by: Roy Oursler <roy.j.oursler@intel.com>
2018-06-14 15:30:14 -07:00
Daniel Verkamp
6e9f576bff igzip: remove detect_repeated_char()
This was replaced with detect_repeated_char_length(), but the
implementation of the old function was never removed.

Change-Id: I55485cec324dce01033b73f24474f1aca2a31bd3
Signed-off-by: Daniel Verkamp <daniel.verkamp@intel.com>
2018-03-29 09:33:04 -07:00
Roy Oursler
aedf4f8cff igzip: create optimized set_long_icf_fg for avx2
Change-Id: I027e73eaa908ca69a5c1af5a52b464f1963fd2da
Signed-off-by: Roy Oursler <roy.j.oursler@intel.com>
2018-03-01 13:27:48 -07:00
Roy Oursler
9acc3ed2ac igzip: Create AVX2 optimized version of level 3
Change-Id: Icfdb67445ee5afff85441cfee23beb66bfe15d5e
Signed-off-by: Roy Oursler <roy.j.oursler@intel.com>
2018-03-01 13:27:38 -07:00
Roy Oursler
3371542dce crc: Create a combined crc32 check test
Change-Id: Idae7634007363cfb59cca15270bd82c37fae26ea
Signed-off-by: Roy Oursler <roy.j.oursler@intel.com>
2018-02-02 13:51:17 -07:00
Greg Tucker
491035d956 crc: Add t10dif+copy function
Change-Id: Ic6c424a0aa746aa06643575f7fcc8d6944cbfc0e
Signed-off-by: Greg Tucker <greg.b.tucker@intel.com>
2017-12-18 15:59:17 -07:00
Roy Oursler
8965584ae3 igzip: Implement large hash table method as level 2
Move current level 2 compression to be level 3 and create a level 2
compression which is the same algorithm as level 1 but with a larger
hashtable.

Change-Id: I398a6017c2ff218dded24e229fb51c23ea69f314
Signed-off-by: Roy Oursler <roy.j.oursler@intel.com>
2017-12-15 14:27:14 -07:00
Roy Oursler
4ae2d1be29 igzip: Implement optimized level 2 compression
Change-Id: I8cf5bcd56f290d17205ac36dc2828c8acfc66947
Signed-off-by: Roy Oursler <roy.j.oursler@intel.com>
2017-12-15 14:27:14 -07:00