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gf_vect_mul_sve: fix error and enable unit tests for aarch64

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Signed-off-by: liuqinfei <lucas.liuqinfei@huawei.com>
This commit is contained in:
liuqinfei 2024-01-11 00:09:16 +08:00 committed by Pablo de Lara
parent e0fffbe48b
commit 275977156d
2 changed files with 8 additions and 6 deletions
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10
erasure_code/aarch64/gf_vect_mul_sve.S
View File

@ -53,12 +53,13 @@ x_len .req x0
x_tbl .req x1 x_tbl .req x1
x_src .req x2 x_src .req x2
x_dest .req x3 x_dest .req x3
x_tmp .req x4
/* returns */ /* returns */
w_ret .req w0 w_ret .req w0
/* local variables */ /* local variables */
x_pos .req x4 x_pos .req x5
/* vectors */ /* vectors */
z_mask0f .req z0 z_mask0f .req z0
@ -77,9 +78,10 @@ q_gft1_lo .req q6
q_gft1_hi .req q7 q_gft1_hi .req q7
cdecl(gf_vect_mul_sve): cdecl(gf_vect_mul_sve):
/* less than 32 bytes, return_fail */ /* len not aligned to 32B, return_fail */
cmp x_len, #32 and x_tmp, x_len, #0x1f
blt .return_fail cmp x_tmp, #0
bne .return_fail
mov z_mask0f.b, #0x0f /* z_mask0f = 0x0F0F...0F */ mov z_mask0f.b, #0x0f /* z_mask0f = 0x0F0F...0F */
mov x_pos, #0 mov x_pos, #0

4
erasure_code/gf_vect_mul_test.c
View File

@ -171,7 +171,7 @@ int main(int argc, char *argv[])
#endif #endif
} }
#if !defined(aarch64) && !defined(ppc64le) #if !defined(ppc64le)
// Test all unsupported sizes up to TEST_SIZE // Test all unsupported sizes up to TEST_SIZE
for (size = 0; size < TEST_SIZE; size++) { for (size = 0; size < TEST_SIZE; size++) {
if (size % align != 0 && gf_vect_mul(size, gf_const_tbl, buff1, buff2) == 0) { if (size % align != 0 && gf_vect_mul(size, gf_const_tbl, buff1, buff2) == 0) {
@ -183,7 +183,7 @@ int main(int argc, char *argv[])
} }
#else #else
printf printf
("WARNING: Test disabled on ARM & PPC due to known issue https://github.com/intel/isa-l/issues/263\n"); ("WARNING: Test disabled on PPC due to known issue https://github.com/intel/isa-l/issues/263\n");
#endif #endif
printf(" done: Pass\n"); printf(" done: Pass\n");
fflush(0); fflush(0);