PPC asm for AV_RL*()
PPC is normally big endian but has special little endian load/store instructions. Using these avoids a separate byteswap. This makes the vorbis decoder about 5% faster. Not much else uses little-endian read/write extensively. GCC generates horrible PPC code for the default AV_[RW]B64 (which uses a packed struct), so we override it with a plain pointer cast. Originally committed as revision 18602 to svn://svn.ffmpeg.org/ffmpeg/trunk
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3
configure
vendored
3
configure
vendored
@ -890,6 +890,7 @@ HAVE_LIST="
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getrusage
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inet_aton
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inline_asm
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ldbrx
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libdc1394_1
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libdc1394_2
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llrint
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@ -1807,7 +1808,7 @@ if test $cpu != "generic"; then
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Cell|CELL|cell)
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add_cflags -mcpu=cell
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warn_altivec disabled Cell
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enable ppc64
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enable ppc64 ldbrx
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;;
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# targets that do NOT support conditional mov (cmov)
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i[345]86|pentium|pentium-mmx|k6|k6-[23]|winchip-c6|winchip2|c3)
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@ -31,6 +31,8 @@
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#if ARCH_ARM
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# include "arm/intreadwrite.h"
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#elif ARCH_PPC
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# include "ppc/intreadwrite.h"
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#endif
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/*
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libavutil/ppc/intreadwrite.h
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104
libavutil/ppc/intreadwrite.h
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@ -0,0 +1,104 @@
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/*
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* Copyright (c) 2008 Mans Rullgard <mans@mansr.com>
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*
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* This file is part of FFmpeg.
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*
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* FFmpeg is free software; you can redistribute it and/or
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* modify it under the terms of the GNU Lesser General Public
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* License as published by the Free Software Foundation; either
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* version 2.1 of the License, or (at your option) any later version.
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*
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* FFmpeg is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
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* Lesser General Public License for more details.
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*
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* You should have received a copy of the GNU Lesser General Public
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* License along with FFmpeg; if not, write to the Free Software
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* Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA
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*/
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#ifndef AVUTIL_PPC_INTREADWRITE_H
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#define AVUTIL_PPC_INTREADWRITE_H
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#include <stdint.h>
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#include "config.h"
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#define AV_RL16 AV_RL16
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static inline uint16_t AV_RL16(const void *p)
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{
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uint16_t v;
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__asm__ ("lhbrx %0, %y1" : "=r"(v) : "Z"(*(const uint16_t*)p));
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return v;
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}
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#define AV_WL16 AV_WL16
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static inline void AV_WL16(void *p, uint16_t v)
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{
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__asm__ ("sthbrx %1, %y0" : "=Z"(*(uint16_t*)p) : "r"(v));
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}
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#define AV_RL32 AV_RL32
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static inline uint32_t AV_RL32(const void *p)
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{
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uint32_t v;
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__asm__ ("lwbrx %0, %y1" : "=r"(v) : "Z"(*(const uint32_t*)p));
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return v;
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}
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#define AV_WL32 AV_WL32
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static inline void AV_WL32(void *p, uint32_t v)
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{
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__asm__ ("stwbrx %1, %y0" : "=Z"(*(uint32_t*)p) : "r"(v));
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}
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#if HAVE_LDBRX
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#define AV_RL64 AV_RL64
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static inline uint64_t AV_RL64(const void *p)
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{
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uint64_t v;
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__asm__ ("ldbrx %0, %y1" : "=r"(v) : "Z"(*(const uint64_t*)p));
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return v;
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}
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#define AV_WL64 AV_WL64
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static inline void AV_WL64(void *p, uint64_t v)
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{
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__asm__ ("stdbrx %1, %y0" : "=Z"(*(uint64_t*)p) : "r"(v));
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}
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#else
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#define AV_RL64 AV_RL64
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static inline uint64_t AV_RL64(const void *p)
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{
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union { uint64_t v; uint32_t hl[2]; } v;
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__asm__ ("lwbrx %0, %y2 \n\t"
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"lwbrx %1, %y3 \n\t"
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: "=r"(v.hl[1]), "=r"(v.hl[0])
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: "Z"(*(const uint32_t*)p), "Z"(*((const uint32_t*)p+1)));
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return v.v;
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}
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#define AV_WL64 AV_WL64
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static inline void AV_WL64(void *p, uint64_t v)
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{
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union { uint64_t v; uint32_t hl[2]; } vv = { v };
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__asm__ ("stwbrx %2, %y0 \n\t"
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"stwbrx %3, %y1 \n\t"
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: "=Z"(*(uint32_t*)p), "=Z"(*((uint32_t*)p+1))
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: "r"(vv.hl[1]), "r"(vv.hl[0]));
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}
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#endif /* HAVE_LDBRX */
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/*
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* GCC fails miserably on the packed struct version which is used by
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* default, so we override it here.
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*/
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#define AV_RB64(p) (*(const uint64_t *)(p))
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#define AV_WB64(p, v) (*(uint64_t *)(p) = (v))
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#endif /* AVUTIL_PPC_INTREADWRITE_H */
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