MMX idct_add for VP8.
Originally committed as revision 23886 to svn://svn.ffmpeg.org/ffmpeg/trunk
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@ -196,6 +196,7 @@ HVBILIN(ssse3, 8, 16, 16)
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extern void ff_vp8_idct_dc_add_mmx(uint8_t *dst, DCTELEM block[16], int stride);
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extern void ff_vp8_idct_dc_add_sse4(uint8_t *dst, DCTELEM block[16], int stride);
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extern void ff_vp8_luma_dc_wht_mmxext(DCTELEM block[4][4][16], DCTELEM dc[16]);
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extern void ff_vp8_idct_add_mmx(uint8_t *dst, DCTELEM block[16], int stride);
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#endif
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#define VP8_LUMA_MC_FUNC(IDX, SIZE, OPT) \
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@ -229,6 +230,7 @@ av_cold void ff_vp8dsp_init_x86(VP8DSPContext* c)
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#if HAVE_YASM
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if (mm_flags & FF_MM_MMX) {
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c->vp8_idct_dc_add = ff_vp8_idct_dc_add_mmx;
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c->vp8_idct_add = ff_vp8_idct_add_mmx;
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c->put_vp8_epel_pixels_tab[0][0][0] =
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c->put_vp8_bilinear_pixels_tab[0][0][0] = ff_put_vp8_pixels16_mmx;
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c->put_vp8_epel_pixels_tab[1][0][0] =
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@ -142,6 +142,9 @@ filter_h6_shuf1: db 0, 5, 1, 6, 2, 7, 3, 8, 4, 9, 5, 10, 6, 11, 7, 12
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filter_h6_shuf2: db 1, 2, 2, 3, 3, 4, 4, 5, 5, 6, 6, 7, 7, 8, 8, 9
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filter_h6_shuf3: db 3, 4, 4, 5, 5, 6, 6, 7, 7, 8, 8, 9, 9, 10, 10, 11
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pw_20091: times 4 dw 20091
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pw_17734: times 4 dw 17734
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cextern pw_3
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cextern pw_4
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cextern pw_64
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@ -923,6 +926,92 @@ cglobal vp8_idct_dc_add_sse4, 3, 3, 6
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pextrd [r1+r2], xmm2, 3
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RET
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;-----------------------------------------------------------------------------
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; void vp8_idct_add_<opt>(uint8_t *dst, DCTELEM block[16], int stride);
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;-----------------------------------------------------------------------------
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; calculate %1=%2+%1; %2=%2-%1, with %3=temp register
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%macro SUMSUB 3
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mova %3, %1
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paddw %1, %2
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psubw %2, %3
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%endmacro
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; calculate %1=mul_35468(%1)-mul_20091(%2); %2=mul_20091(%1)+mul_35468(%2)
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; this macro assumes that m6/m7 have words for 20091/17734 loaded
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%macro VP8_MULTIPLY_SUMSUB 4
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mova %3, %1
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mova %4, %2
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pmulhw %3, m6 ;20091(1)
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pmulhw %4, m6 ;20091(2)
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paddw %3, %1
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paddw %4, %2
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psllw %1, 1
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psllw %2, 1
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pmulhw %1, m7 ;35468(1)
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pmulhw %2, m7 ;35468(2)
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psubw %1, %4
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paddw %2, %3
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%endmacro
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; calculate x0=%1+%3; x1=%1-%3
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; x2=mul_35468(%2)-mul_20091(%4); x3=mul_20091(%2)+mul_35468(%4)
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; %1=x0+x3 (tmp0); %2=x1+x2 (tmp1); %3=x1-x2 (tmp2); %4=x0-x3 (tmp3)
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; %5/%6 are temporary registers
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; we assume m6/m7 have constant words 20091/17734 loaded in them
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%macro VP8_IDCT_TRANSFORM4x4_1D 6
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SUMSUB_BA m%3, m%1, m%5 ;t0, t1
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VP8_MULTIPLY_SUMSUB m%2, m%4, m%5,m%6 ;t2, t3
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SUMSUB_BA m%4, m%3, m%5 ;tmp0, tmp3
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SUMSUB_BA m%2, m%1, m%5 ;tmp1, tmp2
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SWAP %4, %1
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SWAP %4, %3
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%endmacro
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; transpose a 4x4 table
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%macro TRANSPOSE4x4 5 ; output in %1/%4/%5/%3
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mova m%5, m%1
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punpcklwd m%1, m%2
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punpckhwd m%5, m%2
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mova m%2, m%3
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punpcklwd m%3, m%4
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punpckhwd m%2, m%4
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mova m%4, m%1
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punpckldq m%1, m%3 ;col0
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punpckhdq m%4, m%3 ;col1
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mova m%3, m%5
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punpckldq m%5, m%2 ;col2
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punpckhdq m%3, m%2 ;col3
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SWAP %4, %2
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SWAP %4, %5
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SWAP %4, %3
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%endmacro
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INIT_MMX
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cglobal vp8_idct_add_mmx, 3, 3
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; load block data
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movq m0, [r1]
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movq m1, [r1+8]
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movq m2, [r1+16]
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movq m3, [r1+24]
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movq m6, [pw_20091]
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movq m7, [pw_17734]
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; actual IDCT
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VP8_IDCT_TRANSFORM4x4_1D 0, 1, 2, 3, 4, 5
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TRANSPOSE4x4W 0, 1, 2, 3, 4
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paddw m0, [pw_4]
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VP8_IDCT_TRANSFORM4x4_1D 0, 1, 2, 3, 4, 5
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TRANSPOSE4x4W 0, 1, 2, 3, 4
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; store
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pxor m4, m4
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lea r1, [r0+2*r2]
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STORE_DIFFx2 m0, m1, m6, m7, m4, 3, r0, r2
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STORE_DIFFx2 m2, m3, m6, m7, m4, 3, r1, r2
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RET
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;-----------------------------------------------------------------------------
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; void vp8_luma_dc_wht_mmxext(DCTELEM block[4][4][16], DCTELEM dc[16])
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;-----------------------------------------------------------------------------
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@ -365,3 +365,18 @@
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packuswb %1, %1
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movh %4, %1
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%endmacro
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%macro STORE_DIFFx2 8 ; add1, add2, reg1, reg2, zero, shift, source, stride
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movh %3, [%7]
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movh %4, [%7+%8]
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punpcklbw %3, %5
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punpcklbw %4, %5
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psraw %1, %6
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psraw %2, %6
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paddw %3, %1
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paddw %4, %2
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packuswb %3, %5
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packuswb %4, %5
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movh [%7], %3
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movh [%7+%8], %4
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%endmacro
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