76ec6891e2
ARMv6 onwards. These architectures provide the load-linked, store-conditional pair of ldrex/strex whose use is recommended in place of 'swp'. Also, the description of the 'swp' instruction in the ARMv6 reference manual states that the swap operation does not include any memory barrier guarantees.This fix attempts to address these issues by providing an atomic swap implementation using ldrex/strex under _ARM_HAVE_LDREX_STREX macro. This Fix is verified on ST Ericsson's U8500 platform and Submitted on behalf of a third-party: Surinder-pal SINGH from STMicroelectronics. |
||
|---|---|---|
| .. | ||
| bionic | ||
| include | ||
| syscalls | ||
| syscalls.mk | ||