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ARM architecture reference manuals for ARMv6 & ARMv7 state that the use of 'swp' instruction is deprecated

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ARMv6 onwards. These architectures provide the load-linked, store-conditional pair of ldrex/strex whose use
is recommended in place of 'swp'. Also, the description of the 'swp' instruction in the ARMv6 reference
manual states that the swap operation does not include any memory barrier guarantees.This fix attempts to
address these issues by providing an atomic swap implementation using ldrex/strex under _ARM_HAVE_LDREX_STREX
macro.  This Fix is verified on ST Ericsson's U8500 platform and Submitted on behalf of a third-party:
Surinder-pal SINGH from STMicroelectronics.
This commit is contained in:
vinay harugop 2009-09-09 20:53:39 +05:30
parent a90528ad34
commit 76ec6891e2
2 changed files with 17 additions and 0 deletions
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10
libc/arch-arm/bionic/atomics_arm.S
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@ -129,8 +129,18 @@ __atomic_inc:
#endif
/* r0(new) r1(addr) -> r0(old) */
/* replaced swp instruction with ldrex/strex for ARMv6 & ARMv7 */
__atomic_swap:
#if defined (_ARM_HAVE_LDREX_STREX)
1: ldrex r2, [r1]
strex r3, r0, [r1]
teq r3, #0
bne 1b
mov r0, r2
mcr p15, 0, r0, c7, c10, 5 /* or, use dmb */
#else
swp r0, r0, [r1]
#endif
bx lr
/* __futex_wait(*ftx, val, *timespec) */

7
libc/arch-arm/include/machine/cpu-features.h
View File

@ -149,6 +149,13 @@
# define __ARM_HAVE_PC_INTERWORK
#endif
/* define _ARM_HAVE_LDREX_STREX for ARMv6 and ARMv7 architecure to be
* used in replacement of depricated swp instruction
*/
#if __ARM_ARCH__ >= 6
# define _ARM_HAVE_LDREX_STREX
#endif
/* Assembly-only macros */