Compare commits
2 Commits
android-4.
...
jb-mr1-dev
| Author | SHA1 | Date | |
|---|---|---|---|
|
f7a9a681ab | ||
|
|
1d69ab1de9 |
15
ABI-bugs.txt
15
ABI-bugs.txt
@@ -1,15 +0,0 @@
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||||
KNOWN ABI BUGS
|
||||
--------------
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||||
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||||
time_t is 32-bit. http://b/5819737
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||||
|
||||
off_t is 32-bit. There is off64_t, but no _FILE_OFFSET_BITS support.
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||||
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||||
sigset_t is too small on ARM and x86 (but correct on MIPS), so support
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for real-time signals is broken. http://b/5828899
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||||
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Too few TLS slots mean we can't allocate 128 pthread_key_t instances,
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which POSIX says should be the minimum.
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||||
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||||
atexit(3) handlers registered by a shared library aren't called on
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dlclose(3); this only affects ARM. http://b/4998315
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||||
641
libc/Android.mk
641
libc/Android.mk
@@ -8,12 +8,68 @@ libc_common_src_files := \
|
||||
$(syscall_src) \
|
||||
unistd/abort.c \
|
||||
unistd/alarm.c \
|
||||
unistd/brk.c \
|
||||
unistd/daemon.c \
|
||||
unistd/eventfd.c \
|
||||
unistd/exec.c \
|
||||
unistd/fcntl.c \
|
||||
unistd/fnmatch.c \
|
||||
unistd/fstatfs.c \
|
||||
unistd/ftime.c \
|
||||
unistd/ftok.c \
|
||||
unistd/getdtablesize.c \
|
||||
unistd/gethostname.c \
|
||||
unistd/getopt_long.c \
|
||||
unistd/getpgrp.c \
|
||||
unistd/getpriority.c \
|
||||
unistd/getpt.c \
|
||||
unistd/initgroups.c \
|
||||
unistd/isatty.c \
|
||||
unistd/issetugid.c \
|
||||
unistd/killpg.c \
|
||||
unistd/lseek64.c \
|
||||
unistd/mmap.c \
|
||||
unistd/open.c \
|
||||
unistd/openat.c \
|
||||
unistd/opendir.c \
|
||||
unistd/pathconf.c \
|
||||
unistd/perror.c \
|
||||
unistd/popen.c \
|
||||
unistd/pread.c \
|
||||
unistd/pselect.c \
|
||||
unistd/ptsname.c \
|
||||
unistd/ptsname_r.c \
|
||||
unistd/pwrite.c \
|
||||
unistd/raise.c \
|
||||
unistd/reboot.c \
|
||||
unistd/recv.c \
|
||||
unistd/sbrk.c \
|
||||
unistd/send.c \
|
||||
unistd/setegid.c \
|
||||
unistd/setuid.c \
|
||||
unistd/seteuid.c \
|
||||
unistd/setreuid.c \
|
||||
unistd/setresuid.c \
|
||||
unistd/setpgrp.c \
|
||||
unistd/sigblock.c \
|
||||
unistd/siginterrupt.c \
|
||||
unistd/siglist.c \
|
||||
unistd/signal.c \
|
||||
unistd/signame.c \
|
||||
unistd/sigsetmask.c \
|
||||
unistd/sigsuspend.c \
|
||||
unistd/sigwait.c \
|
||||
unistd/sleep.c \
|
||||
unistd/statfs.c \
|
||||
unistd/syslog.c \
|
||||
unistd/system.c \
|
||||
unistd/tcgetpgrp.c \
|
||||
unistd/tcsetpgrp.c \
|
||||
unistd/time.c \
|
||||
unistd/umount.c \
|
||||
unistd/unlockpt.c \
|
||||
unistd/usleep.c \
|
||||
unistd/wait.c \
|
||||
stdio/asprintf.c \
|
||||
stdio/clrerr.c \
|
||||
stdio/fclose.c \
|
||||
@@ -28,6 +84,7 @@ libc_common_src_files := \
|
||||
stdio/fileno.c \
|
||||
stdio/findfp.c \
|
||||
stdio/flags.c \
|
||||
stdio/flockfile.c \
|
||||
stdio/fopen.c \
|
||||
stdio/fprintf.c \
|
||||
stdio/fpurge.c \
|
||||
@@ -66,6 +123,7 @@ libc_common_src_files := \
|
||||
stdio/sscanf.c \
|
||||
stdio/stdio.c \
|
||||
stdio/tempnam.c \
|
||||
stdio/tmpfile.c \
|
||||
stdio/tmpnam.c \
|
||||
stdio/ungetc.c \
|
||||
stdio/vasprintf.c \
|
||||
@@ -78,13 +136,37 @@ libc_common_src_files := \
|
||||
stdio/vsscanf.c \
|
||||
stdio/wbuf.c \
|
||||
stdio/wsetup.c \
|
||||
stdio/__fgets_chk.c \
|
||||
stdio/__snprintf_chk.c \
|
||||
stdio/__sprintf_chk.c \
|
||||
stdio/__vsnprintf_chk.c \
|
||||
stdio/__vsprintf_chk.c \
|
||||
stdlib/_rand48.c \
|
||||
stdlib/assert.c \
|
||||
stdlib/atexit.c \
|
||||
stdlib/atoi.c \
|
||||
stdlib/atol.c \
|
||||
stdlib/atoll.c \
|
||||
stdlib/bsearch.c \
|
||||
stdlib/ctype_.c \
|
||||
stdlib/div.c \
|
||||
stdlib/exit.c \
|
||||
stdlib/getenv.c \
|
||||
stdlib/jrand48.c \
|
||||
stdlib/ldiv.c \
|
||||
stdlib/lldiv.c \
|
||||
stdlib/locale.c \
|
||||
stdlib/lrand48.c \
|
||||
stdlib/mrand48.c \
|
||||
stdlib/nrand48.c \
|
||||
stdlib/putenv.c \
|
||||
stdlib/qsort.c \
|
||||
stdlib/seed48.c \
|
||||
stdlib/setenv.c \
|
||||
stdlib/setjmperr.c \
|
||||
stdlib/srand48.c \
|
||||
stdlib/strntoimax.c \
|
||||
stdlib/strntoumax.c \
|
||||
stdlib/strtod.c \
|
||||
stdlib/strtoimax.c \
|
||||
stdlib/strtol.c \
|
||||
@@ -94,117 +176,131 @@ libc_common_src_files := \
|
||||
stdlib/strtoumax.c \
|
||||
stdlib/tolower_.c \
|
||||
stdlib/toupper_.c \
|
||||
stdlib/wchar.c \
|
||||
string/index.c \
|
||||
string/memccpy.c \
|
||||
string/memchr.c \
|
||||
string/memmem.c \
|
||||
string/memrchr.c \
|
||||
string/memswap.c \
|
||||
string/strcasecmp.c \
|
||||
string/strcasestr.c \
|
||||
string/strcat.c \
|
||||
string/strchr.c \
|
||||
string/strcoll.c \
|
||||
string/strcspn.c \
|
||||
string/strdup.c \
|
||||
string/strlcat.c \
|
||||
string/strlcpy.c \
|
||||
string/strncat.c \
|
||||
string/strncpy.c \
|
||||
string/strndup.c \
|
||||
string/strnlen.c \
|
||||
string/strpbrk.c \
|
||||
string/strrchr.c \
|
||||
string/strsep.c \
|
||||
string/strspn.c \
|
||||
string/strstr.c \
|
||||
string/strtok.c \
|
||||
string/strtotimeval.c \
|
||||
string/__memcpy_chk.c \
|
||||
string/__memmove_chk.c \
|
||||
string/__memset_chk.c \
|
||||
string/__strcat_chk.c \
|
||||
string/__strcpy_chk.c \
|
||||
string/__strlcat_chk.c \
|
||||
string/__strlcpy_chk.c \
|
||||
string/__strlen_chk.c \
|
||||
string/__strncat_chk.c \
|
||||
string/__strncpy_chk.c \
|
||||
wchar/wcpcpy.c \
|
||||
wchar/wcpncpy.c \
|
||||
wchar/wcscasecmp.c \
|
||||
wchar/wcscat.c \
|
||||
wchar/wcschr.c \
|
||||
wchar/wcscmp.c \
|
||||
wchar/wcscoll.c \
|
||||
wchar/wcscpy.c \
|
||||
wchar/wcscspn.c \
|
||||
wchar/wcsdup.c \
|
||||
wchar/wcslcat.c \
|
||||
wchar/wcslcpy.c \
|
||||
wchar/wcslen.c \
|
||||
wchar/wcsncasecmp.c \
|
||||
wchar/wcsncat.c \
|
||||
wchar/wcsncmp.c \
|
||||
wchar/wcsncpy.c \
|
||||
wchar/wcsnlen.c \
|
||||
wchar/wcspbrk.c \
|
||||
wchar/wcsrchr.c \
|
||||
wchar/wcsspn.c \
|
||||
wchar/wcsstr.c \
|
||||
wchar/wcstok.c \
|
||||
wchar/wcswidth.c \
|
||||
wchar/wcsxfrm.c \
|
||||
wchar/wmemchr.c \
|
||||
wchar/wmemcmp.c \
|
||||
wchar/wmemcpy.c \
|
||||
wchar/wmemmove.c \
|
||||
wchar/wmemset.c \
|
||||
inet/bindresvport.c \
|
||||
inet/inet_addr.c \
|
||||
inet/inet_aton.c \
|
||||
inet/inet_ntoa.c \
|
||||
inet/inet_ntop.c \
|
||||
inet/inet_pton.c \
|
||||
inet/ether_aton.c \
|
||||
inet/ether_ntoa.c \
|
||||
tzcode/asctime.c \
|
||||
tzcode/difftime.c \
|
||||
tzcode/localtime.c \
|
||||
tzcode/strftime.c \
|
||||
tzcode/strptime.c \
|
||||
bionic/arc4random.c \
|
||||
bionic/atoi.c \
|
||||
bionic/atol.c \
|
||||
bionic/atoll.c \
|
||||
bionic/bindresvport.c \
|
||||
bionic/__set_errno.c \
|
||||
bionic/bionic_clone.c \
|
||||
bionic/clearenv.c \
|
||||
bionic/cpuacct.c \
|
||||
bionic/daemon.c \
|
||||
bionic/arc4random.c \
|
||||
bionic/basename.c \
|
||||
bionic/basename_r.c \
|
||||
bionic/clearenv.c \
|
||||
bionic/dirname.c \
|
||||
bionic/dirname_r.c \
|
||||
bionic/drand48.c \
|
||||
bionic/erand48.c \
|
||||
bionic/err.c \
|
||||
bionic/ether_aton.c \
|
||||
bionic/ether_ntoa.c \
|
||||
bionic/fcntl.c \
|
||||
bionic/fdprintf.c \
|
||||
bionic/flockfile.c \
|
||||
bionic/fork.c \
|
||||
bionic/fstatfs.c \
|
||||
bionic/ftime.c \
|
||||
bionic/ftok.c \
|
||||
bionic/fts.c \
|
||||
bionic/getdtablesize.c \
|
||||
bionic/gethostname.c \
|
||||
bionic/getpgrp.c \
|
||||
bionic/getpriority.c \
|
||||
bionic/getpt.c \
|
||||
bionic/if_indextoname.c \
|
||||
bionic/getcwd.cpp \
|
||||
bionic/if_nametoindex.c \
|
||||
bionic/initgroups.c \
|
||||
bionic/if_indextoname.c \
|
||||
bionic/ioctl.c \
|
||||
bionic/isatty.c \
|
||||
bionic/issetugid.c \
|
||||
bionic/ldexp.c \
|
||||
bionic/lseek64.c \
|
||||
bionic/libc_init_common.c \
|
||||
bionic/logd_write.c \
|
||||
bionic/md5.c \
|
||||
bionic/memchr.c \
|
||||
bionic/memmem.c \
|
||||
bionic/memrchr.c \
|
||||
bionic/memswap.c \
|
||||
bionic/mmap.c \
|
||||
bionic/openat.c \
|
||||
bionic/open.c \
|
||||
bionic/pathconf.c \
|
||||
bionic/perror.c \
|
||||
bionic/pread.c \
|
||||
bionic/pselect.c \
|
||||
bionic/ptsname.c \
|
||||
bionic/ptsname_r.c \
|
||||
bionic/memmove_words.c \
|
||||
bionic/pututline.c \
|
||||
bionic/pwrite.c \
|
||||
bionic/reboot.c \
|
||||
bionic/recv.c \
|
||||
bionic/sched_cpualloc.c \
|
||||
bionic/sched_cpucount.c \
|
||||
bionic/realpath.c \
|
||||
bionic/sched_getaffinity.c \
|
||||
bionic/sched_getcpu.c \
|
||||
bionic/sched_cpualloc.c \
|
||||
bionic/sched_cpucount.c \
|
||||
bionic/semaphore.c \
|
||||
bionic/send.c \
|
||||
bionic/setegid.c \
|
||||
bionic/seteuid.c \
|
||||
bionic/setpgrp.c \
|
||||
bionic/setresuid.c \
|
||||
bionic/setreuid.c \
|
||||
bionic/setuid.c \
|
||||
bionic/sigblock.c \
|
||||
bionic/siginterrupt.c \
|
||||
bionic/siglist.c \
|
||||
bionic/signal.c \
|
||||
bionic/signame.c \
|
||||
bionic/sigsetmask.c \
|
||||
bionic/sigsuspend.c \
|
||||
bionic/sleep.c \
|
||||
bionic/statfs.c \
|
||||
bionic/strndup.c \
|
||||
bionic/strnlen.c \
|
||||
bionic/strntoimax.c \
|
||||
bionic/strntoumax.c \
|
||||
bionic/strtotimeval.c \
|
||||
bionic/sha1.c \
|
||||
bionic/strerror.cpp \
|
||||
bionic/strerror_r.cpp \
|
||||
bionic/strsignal.cpp \
|
||||
bionic/stubs.cpp \
|
||||
bionic/system_properties.c \
|
||||
bionic/tcgetpgrp.c \
|
||||
bionic/tcsetpgrp.c \
|
||||
bionic/thread_atexit.c \
|
||||
bionic/tdestroy.c \
|
||||
bionic/time64.c \
|
||||
bionic/umount.c \
|
||||
bionic/unlockpt.c \
|
||||
bionic/usleep.c \
|
||||
bionic/thread_atexit.c \
|
||||
bionic/utime.c \
|
||||
bionic/utmp.c \
|
||||
bionic/wcscoll.c \
|
||||
netbsd/gethnamaddr.c \
|
||||
netbsd/isc/ev_timers.c \
|
||||
netbsd/isc/ev_streams.c \
|
||||
netbsd/inet/nsap_addr.c \
|
||||
netbsd/resolv/__dn_comp.c \
|
||||
netbsd/resolv/__res_close.c \
|
||||
@@ -233,142 +329,69 @@ libc_common_src_files := \
|
||||
netbsd/nameser/ns_print.c \
|
||||
netbsd/nameser/ns_samedomain.c \
|
||||
|
||||
libc_bionic_src_files := \
|
||||
bionic/assert.cpp \
|
||||
bionic/brk.cpp \
|
||||
bionic/dirent.cpp \
|
||||
bionic/__errno.c \
|
||||
bionic/eventfd_read.cpp \
|
||||
bionic/eventfd_write.cpp \
|
||||
bionic/__fgets_chk.cpp \
|
||||
bionic/getauxval.cpp \
|
||||
bionic/getcwd.cpp \
|
||||
bionic/libc_init_common.cpp \
|
||||
bionic/libc_logging.cpp \
|
||||
bionic/libgen.cpp \
|
||||
bionic/__memcpy_chk.cpp \
|
||||
bionic/__memmove_chk.cpp \
|
||||
bionic/__memset_chk.cpp \
|
||||
bionic/pthread_attr.cpp \
|
||||
bionic/pthread_detach.cpp \
|
||||
bionic/pthread_equal.cpp \
|
||||
bionic/pthread_getcpuclockid.cpp \
|
||||
bionic/pthread_getschedparam.cpp \
|
||||
bionic/pthread_internals.cpp \
|
||||
bionic/pthread_join.cpp \
|
||||
bionic/pthread_kill.cpp \
|
||||
bionic/pthread_self.cpp \
|
||||
bionic/pthread_setname_np.cpp \
|
||||
bionic/pthread_setschedparam.cpp \
|
||||
bionic/pthread_sigmask.cpp \
|
||||
bionic/raise.cpp \
|
||||
bionic/sbrk.cpp \
|
||||
bionic/scandir.cpp \
|
||||
bionic/__set_errno.cpp \
|
||||
bionic/setlocale.cpp \
|
||||
bionic/signalfd.cpp \
|
||||
bionic/sigwait.cpp \
|
||||
bionic/__strcat_chk.cpp \
|
||||
bionic/__strcpy_chk.cpp \
|
||||
bionic/strerror.cpp \
|
||||
bionic/strerror_r.cpp \
|
||||
bionic/__strlcat_chk.cpp \
|
||||
bionic/__strlcpy_chk.cpp \
|
||||
bionic/__strlen_chk.cpp \
|
||||
bionic/__strncat_chk.cpp \
|
||||
bionic/__strncpy_chk.cpp \
|
||||
bionic/strsignal.cpp \
|
||||
bionic/stubs.cpp \
|
||||
bionic/sysconf.cpp \
|
||||
bionic/tdestroy.cpp \
|
||||
bionic/tmpfile.cpp \
|
||||
bionic/__umask_chk.cpp \
|
||||
bionic/__vsnprintf_chk.cpp \
|
||||
bionic/__vsprintf_chk.cpp \
|
||||
bionic/wait.cpp \
|
||||
bionic/wchar.cpp \
|
||||
|
||||
libc_upstream_freebsd_src_files := \
|
||||
upstream-freebsd/lib/libc/stdlib/realpath.c \
|
||||
upstream-freebsd/lib/libc/string/wcpcpy.c \
|
||||
upstream-freebsd/lib/libc/string/wcpncpy.c \
|
||||
upstream-freebsd/lib/libc/string/wcscasecmp.c \
|
||||
upstream-freebsd/lib/libc/string/wcscat.c \
|
||||
upstream-freebsd/lib/libc/string/wcschr.c \
|
||||
upstream-freebsd/lib/libc/string/wcscmp.c \
|
||||
upstream-freebsd/lib/libc/string/wcscpy.c \
|
||||
upstream-freebsd/lib/libc/string/wcscspn.c \
|
||||
upstream-freebsd/lib/libc/string/wcsdup.c \
|
||||
upstream-freebsd/lib/libc/string/wcslcat.c \
|
||||
upstream-freebsd/lib/libc/string/wcslcpy.c \
|
||||
upstream-freebsd/lib/libc/string/wcslen.c \
|
||||
upstream-freebsd/lib/libc/string/wcsncasecmp.c \
|
||||
upstream-freebsd/lib/libc/string/wcsncat.c \
|
||||
upstream-freebsd/lib/libc/string/wcsncmp.c \
|
||||
upstream-freebsd/lib/libc/string/wcsncpy.c \
|
||||
upstream-freebsd/lib/libc/string/wcsnlen.c \
|
||||
upstream-freebsd/lib/libc/string/wcspbrk.c \
|
||||
upstream-freebsd/lib/libc/string/wcsrchr.c \
|
||||
upstream-freebsd/lib/libc/string/wcsspn.c \
|
||||
upstream-freebsd/lib/libc/string/wcsstr.c \
|
||||
upstream-freebsd/lib/libc/string/wcstok.c \
|
||||
upstream-freebsd/lib/libc/string/wmemchr.c \
|
||||
upstream-freebsd/lib/libc/string/wmemcmp.c \
|
||||
upstream-freebsd/lib/libc/string/wmemcpy.c \
|
||||
upstream-freebsd/lib/libc/string/wmemmove.c \
|
||||
upstream-freebsd/lib/libc/string/wmemset.c \
|
||||
|
||||
libc_upstream_netbsd_src_files := \
|
||||
upstream-netbsd/common/lib/libc/hash/sha1/sha1.c \
|
||||
upstream-netbsd/common/lib/libc/inet/inet_addr.c \
|
||||
upstream-netbsd/libc/compat-43/creat.c \
|
||||
upstream-netbsd/libc/gen/ftw.c \
|
||||
upstream-netbsd/libc/gen/nftw.c \
|
||||
upstream-netbsd/libc/gen/nice.c \
|
||||
upstream-netbsd/libc/gen/popen.c \
|
||||
upstream-netbsd/libc/gen/psignal.c \
|
||||
upstream-netbsd/libc/gen/setjmperr.c \
|
||||
upstream-netbsd/libc/gen/utime.c \
|
||||
upstream-netbsd/libc/inet/inet_ntoa.c \
|
||||
upstream-netbsd/libc/inet/inet_ntop.c \
|
||||
upstream-netbsd/libc/inet/inet_pton.c \
|
||||
upstream-netbsd/libc/isc/ev_streams.c \
|
||||
upstream-netbsd/libc/isc/ev_timers.c \
|
||||
upstream-netbsd/libc/regex/regcomp.c \
|
||||
upstream-netbsd/libc/regex/regerror.c \
|
||||
upstream-netbsd/libc/regex/regexec.c \
|
||||
upstream-netbsd/libc/regex/regfree.c \
|
||||
upstream-netbsd/libc/stdio/getdelim.c \
|
||||
upstream-netbsd/libc/stdio/getline.c \
|
||||
upstream-netbsd/libc/stdlib/bsearch.c \
|
||||
upstream-netbsd/libc/stdlib/div.c \
|
||||
upstream-netbsd/libc/stdlib/drand48.c \
|
||||
upstream-netbsd/libc/stdlib/erand48.c \
|
||||
upstream-netbsd/libc/stdlib/jrand48.c \
|
||||
upstream-netbsd/libc/stdlib/ldiv.c \
|
||||
upstream-netbsd/libc/stdlib/lldiv.c \
|
||||
upstream-netbsd/libc/stdlib/lrand48.c \
|
||||
upstream-netbsd/libc/stdlib/mrand48.c \
|
||||
upstream-netbsd/libc/stdlib/nrand48.c \
|
||||
upstream-netbsd/libc/stdlib/_rand48.c \
|
||||
upstream-netbsd/libc/stdlib/seed48.c \
|
||||
upstream-netbsd/libc/stdlib/srand48.c \
|
||||
upstream-netbsd/libc/stdlib/tdelete.c \
|
||||
upstream-netbsd/libc/stdlib/tfind.c \
|
||||
upstream-netbsd/libc/stdlib/tsearch.c \
|
||||
upstream-netbsd/libc/string/memccpy.c \
|
||||
upstream-netbsd/libc/string/strcasestr.c \
|
||||
upstream-netbsd/libc/string/strcoll.c \
|
||||
upstream-netbsd/libc/string/strxfrm.c \
|
||||
upstream-netbsd/libc/unistd/killpg.c \
|
||||
upstream-netbsd/libc/compat-43/creat.c \
|
||||
upstream-netbsd/libc/gen/ftw.c \
|
||||
upstream-netbsd/libc/gen/nftw.c \
|
||||
upstream-netbsd/libc/gen/nice.c \
|
||||
upstream-netbsd/libc/gen/psignal.c \
|
||||
upstream-netbsd/libc/regex/regcomp.c \
|
||||
upstream-netbsd/libc/regex/regerror.c \
|
||||
upstream-netbsd/libc/regex/regexec.c \
|
||||
upstream-netbsd/libc/regex/regfree.c \
|
||||
upstream-netbsd/libc/stdlib/tdelete.c \
|
||||
upstream-netbsd/libc/stdlib/tfind.c \
|
||||
upstream-netbsd/libc/stdlib/tsearch.c \
|
||||
upstream-netbsd/libc/string/strxfrm.c \
|
||||
|
||||
# The following files are common, but must be compiled
|
||||
# with different C flags when building a static C library.
|
||||
#
|
||||
# The reason for this is the implementation of __get_tls()
|
||||
# that will differ between the shared and static versions
|
||||
# of the library.
|
||||
#
|
||||
# See comments in private/bionic_tls.h for more details.
|
||||
#
|
||||
# NOTE: bionic/pthread.c is added later to this list
|
||||
# because it needs special handling on ARM, see
|
||||
# below.
|
||||
#
|
||||
libc_static_common_src_files := \
|
||||
unistd/sysconf.c \
|
||||
bionic/__errno.c \
|
||||
|
||||
# Architecture specific source files go here
|
||||
# =========================================================
|
||||
ifeq ($(TARGET_ARCH),arm)
|
||||
libc_common_src_files += \
|
||||
bionic/memmove.c.arm \
|
||||
arch-arm/bionic/__get_sp.S \
|
||||
arch-arm/bionic/_exit_with_stack_teardown.S \
|
||||
arch-arm/bionic/_setjmp.S \
|
||||
arch-arm/bionic/abort_arm.S \
|
||||
arch-arm/bionic/atomics_arm.c \
|
||||
arch-arm/bionic/clone.S \
|
||||
arch-arm/bionic/eabi.c \
|
||||
arch-arm/bionic/ffs.S \
|
||||
arch-arm/bionic/futex_arm.S \
|
||||
arch-arm/bionic/kill.S \
|
||||
arch-arm/bionic/libgcc_compat.c \
|
||||
arch-arm/bionic/tkill.S \
|
||||
arch-arm/bionic/tgkill.S \
|
||||
arch-arm/bionic/memcmp.S \
|
||||
arch-arm/bionic/memcmp16.S \
|
||||
arch-arm/bionic/memcpy.S \
|
||||
arch-arm/bionic/memset.S \
|
||||
arch-arm/bionic/setjmp.S \
|
||||
arch-arm/bionic/sigsetjmp.S \
|
||||
arch-arm/bionic/strlen.c.arm \
|
||||
arch-arm/bionic/strcpy.S \
|
||||
arch-arm/bionic/strcmp.S \
|
||||
arch-arm/bionic/syscall.S \
|
||||
string/memmove.c.arm \
|
||||
string/bcopy.c \
|
||||
string/strncmp.c \
|
||||
unistd/socketcalls.c
|
||||
|
||||
# These files need to be arm so that gdbserver
|
||||
# can set breakpoints in them without messing
|
||||
@@ -380,31 +403,81 @@ libc_common_src_files += \
|
||||
bionic/ptrace.c.arm
|
||||
|
||||
libc_static_common_src_files += \
|
||||
bionic/pthread.c.arm \
|
||||
bionic/pthread_create.cpp.arm \
|
||||
bionic/pthread_key.cpp.arm \
|
||||
bionic/pthread.c.arm \
|
||||
|
||||
# these are used by the static and dynamic versions of the libc
|
||||
# respectively
|
||||
libc_arch_static_src_files := \
|
||||
arch-arm/bionic/exidx_static.c
|
||||
|
||||
libc_arch_dynamic_src_files := \
|
||||
arch-arm/bionic/exidx_dynamic.c
|
||||
endif # arm
|
||||
|
||||
ifeq ($(TARGET_ARCH),x86)
|
||||
libc_common_src_files += \
|
||||
bionic/pthread-atfork.c \
|
||||
bionic/pthread-rwlocks.c \
|
||||
bionic/pthread-timers.c \
|
||||
bionic/ptrace.c \
|
||||
string/strcpy.c \
|
||||
arch-x86/bionic/__get_sp.S \
|
||||
arch-x86/bionic/__get_tls.c \
|
||||
arch-x86/bionic/__set_tls.c \
|
||||
arch-x86/bionic/clone.S \
|
||||
arch-x86/bionic/_exit_with_stack_teardown.S \
|
||||
arch-x86/bionic/futex_x86.S \
|
||||
arch-x86/bionic/setjmp.S \
|
||||
arch-x86/bionic/_setjmp.S \
|
||||
arch-x86/bionic/sigsetjmp.S \
|
||||
arch-x86/bionic/vfork.S \
|
||||
arch-x86/bionic/syscall.S \
|
||||
arch-x86/string/bcopy_wrapper.S \
|
||||
arch-x86/string/memcpy_wrapper.S \
|
||||
arch-x86/string/memmove_wrapper.S \
|
||||
arch-x86/string/bzero_wrapper.S \
|
||||
arch-x86/string/memcmp_wrapper.S \
|
||||
arch-x86/string/memset_wrapper.S \
|
||||
arch-x86/string/strcmp_wrapper.S \
|
||||
arch-x86/string/strncmp_wrapper.S \
|
||||
arch-x86/string/strlen_wrapper.S \
|
||||
string/strcpy.c \
|
||||
bionic/pthread-atfork.c \
|
||||
bionic/pthread-rwlocks.c \
|
||||
bionic/pthread-timers.c \
|
||||
bionic/ptrace.c
|
||||
|
||||
libc_static_common_src_files += \
|
||||
bionic/pthread.c \
|
||||
bionic/pthread_create.cpp \
|
||||
bionic/pthread_key.cpp \
|
||||
bionic/pthread.c \
|
||||
|
||||
libc_arch_static_src_files := \
|
||||
bionic/dl_iterate_phdr_static.c
|
||||
|
||||
libc_arch_dynamic_src_files :=
|
||||
endif # x86
|
||||
|
||||
ifeq ($(TARGET_ARCH),mips)
|
||||
libc_common_src_files += \
|
||||
bionic/memcmp.c \
|
||||
arch-mips/bionic/__get_sp.S \
|
||||
arch-mips/bionic/__get_tls.c \
|
||||
arch-mips/bionic/__set_tls.c \
|
||||
arch-mips/bionic/_exit_with_stack_teardown.S \
|
||||
arch-mips/bionic/_setjmp.S \
|
||||
arch-mips/bionic/futex_mips.S \
|
||||
arch-mips/bionic/bzero.S \
|
||||
arch-mips/bionic/cacheflush.c \
|
||||
arch-mips/bionic/clone.S \
|
||||
arch-mips/bionic/ffs.S \
|
||||
arch-mips/bionic/memcmp16.S \
|
||||
arch-mips/bionic/memmove.c \
|
||||
arch-mips/bionic/pipe.S \
|
||||
arch-mips/bionic/setjmp.S \
|
||||
arch-mips/bionic/sigsetjmp.S \
|
||||
arch-mips/bionic/vfork.S
|
||||
|
||||
libc_common_src_files += \
|
||||
arch-mips/string/memset.S \
|
||||
arch-mips/string/memcpy.S \
|
||||
arch-mips/string/mips_strlen.c
|
||||
|
||||
libc_common_src_files += \
|
||||
string/bcopy.c \
|
||||
string/memcmp.c \
|
||||
string/strcmp.c \
|
||||
string/strcpy.c \
|
||||
string/strncmp.c
|
||||
@@ -416,46 +489,14 @@ libc_common_src_files += \
|
||||
bionic/ptrace.c
|
||||
|
||||
libc_static_common_src_files += \
|
||||
bionic/pthread.c \
|
||||
bionic/pthread_create.cpp \
|
||||
bionic/pthread_key.cpp \
|
||||
bionic/pthread.c
|
||||
|
||||
libc_arch_static_src_files := \
|
||||
bionic/dl_iterate_phdr_static.c
|
||||
|
||||
libc_arch_dynamic_src_files :=
|
||||
endif # mips
|
||||
|
||||
ifeq ($(strip $(TARGET_CPU_VARIANT)),)
|
||||
$(warning TARGET_CPU_VARIANT is not defined)
|
||||
endif
|
||||
|
||||
###########################################################
|
||||
## Add cpu specific source files.
|
||||
##
|
||||
## This can be called multiple times, but it will only add
|
||||
## the first source file for each unique $(1).
|
||||
## $(1): Unique identifier to identify the cpu variant
|
||||
## implementation.
|
||||
## $(2): Cpu specific source file.
|
||||
###########################################################
|
||||
|
||||
define libc-add-cpu-variant-src
|
||||
$(if $(filter true,$(_LIBC_ARCH_CPU_VARIANT_HAS_$(1))), \
|
||||
, \
|
||||
$(eval _LIBC_ARCH_CPU_VARIANT_HAS_$(1) := true) \
|
||||
$(eval _LIBC_ARCH_CPU_VARIANT_SRC_FILE.$(1) := $(2)) \
|
||||
$(eval _LIBC_ARCH_CPU_VARIANT_SRC_FILES += $(2)) \
|
||||
)
|
||||
endef
|
||||
|
||||
_LIBC_ARCH_COMMON_SRC_FILES :=
|
||||
_LIBC_ARCH_CPU_VARIANT_SRC_FILES :=
|
||||
_LIBC_ARCH_STATIC_SRC_FILES :=
|
||||
_LIBC_ARCH_DYNAMIC_SRC_FILES :=
|
||||
include bionic/libc/arch-$(TARGET_ARCH)/$(TARGET_ARCH).mk
|
||||
|
||||
libc_common_src_files += $(_LIBC_ARCH_COMMON_SRC_FILES)
|
||||
libc_common_src_files += $(_LIBC_ARCH_CPU_VARIANT_SRC_FILES)
|
||||
libc_arch_static_src_files := $(_LIBC_ARCH_STATIC_SRC_FILES)
|
||||
libc_arch_dynamic_src_files := $(_LIBC_ARCH_DYNAMIC_SRC_FILES)
|
||||
|
||||
# Define some common cflags
|
||||
# ========================================================
|
||||
libc_common_cflags := \
|
||||
@@ -467,6 +508,7 @@ libc_common_cflags := \
|
||||
-I$(LOCAL_PATH)/private \
|
||||
-DPOSIX_MISTAKE \
|
||||
-DLOG_ON_HEAP_ERROR \
|
||||
-std=gnu99 \
|
||||
-Wall -Wextra
|
||||
|
||||
# these macro definitions are required to implement the
|
||||
@@ -492,6 +534,27 @@ ifeq ($(TARGET_ARCH),arm)
|
||||
libc_common_cflags += -DSOFTFLOAT
|
||||
libc_common_cflags += -fstrict-aliasing
|
||||
libc_crt_target_cflags := -mthumb-interwork
|
||||
#
|
||||
# Define HAVE_ARM_TLS_REGISTER macro to indicate to the C library
|
||||
# that it should access the hardware TLS register directly in
|
||||
# private/bionic_tls.h
|
||||
#
|
||||
# The value must match your kernel configuration
|
||||
#
|
||||
ifeq ($(ARCH_ARM_HAVE_TLS_REGISTER),true)
|
||||
libc_common_cflags += -DHAVE_ARM_TLS_REGISTER
|
||||
endif
|
||||
#
|
||||
# Define HAVE_32_BYTE_CACHE_LINES to indicate to C
|
||||
# library it should use to 32-byte version of memcpy, and not
|
||||
# the 64-byte version.
|
||||
#
|
||||
ifeq ($(ARCH_ARM_HAVE_32_BYTE_CACHE_LINES),true)
|
||||
libc_common_cflags += -DHAVE_32_BYTE_CACHE_LINE
|
||||
endif
|
||||
ifeq ($(ARCH_ARM_USE_NON_NEON_MEMCPY),true)
|
||||
libc_common_cflags += -DARCH_ARM_USE_NON_NEON_MEMCPY
|
||||
endif
|
||||
endif # !arm
|
||||
|
||||
ifeq ($(TARGET_ARCH),x86)
|
||||
@@ -562,7 +625,7 @@ ifeq ($(TARGET_ARCH),mips)
|
||||
libc_crt_target_so_cflags := -fPIC
|
||||
endif
|
||||
ifeq ($(TARGET_ARCH),x86)
|
||||
libc_crtbegin_extension := c
|
||||
libc_crtbegin_extension := S
|
||||
libc_crt_target_so_cflags := -fPIC
|
||||
endif
|
||||
ifeq ($(libc_crtbegin_extension),)
|
||||
@@ -676,8 +739,8 @@ WITH_MALLOC_CHECK_LIBC_A := $(strip $(WITH_MALLOC_CHECK_LIBC_A))
|
||||
|
||||
include $(CLEAR_VARS)
|
||||
|
||||
LOCAL_SRC_FILES := bionic/__stack_chk_fail.cpp
|
||||
LOCAL_CFLAGS := $(libc_common_cflags) -fno-stack-protector -Werror
|
||||
LOCAL_SRC_FILES := bionic/ssp.c
|
||||
LOCAL_CFLAGS := $(libc_common_cflags) -fno-stack-protector
|
||||
LOCAL_C_INCLUDES := $(libc_common_c_includes)
|
||||
LOCAL_MODULE := libbionic_ssp
|
||||
LOCAL_ADDITIONAL_DEPENDENCIES := $(LOCAL_PATH)/Android.mk
|
||||
@@ -686,29 +749,6 @@ LOCAL_SYSTEM_SHARED_LIBRARIES :=
|
||||
include $(BUILD_STATIC_LIBRARY)
|
||||
|
||||
|
||||
# ========================================================
|
||||
# libc_freebsd.a - upstream FreeBSD C library code
|
||||
# ========================================================
|
||||
#
|
||||
# These files are built with the freebsd-compat.h header file
|
||||
# automatically included.
|
||||
|
||||
include $(CLEAR_VARS)
|
||||
|
||||
LOCAL_SRC_FILES := $(libc_upstream_freebsd_src_files)
|
||||
LOCAL_CFLAGS := \
|
||||
$(libc_common_cflags) \
|
||||
-I$(LOCAL_PATH)/upstream-freebsd \
|
||||
-I$(LOCAL_PATH)/upstream-freebsd/libc/include \
|
||||
-include upstream-freebsd/freebsd-compat.h
|
||||
LOCAL_C_INCLUDES := $(libc_common_c_includes)
|
||||
LOCAL_MODULE := libc_freebsd
|
||||
LOCAL_ADDITIONAL_DEPENDENCIES := $(LOCAL_PATH)/Android.mk
|
||||
LOCAL_SYSTEM_SHARED_LIBRARIES :=
|
||||
|
||||
include $(BUILD_STATIC_LIBRARY)
|
||||
|
||||
|
||||
# ========================================================
|
||||
# libc_netbsd.a - upstream NetBSD C library code
|
||||
# ========================================================
|
||||
@@ -722,7 +762,6 @@ LOCAL_SRC_FILES := $(libc_upstream_netbsd_src_files)
|
||||
LOCAL_CFLAGS := \
|
||||
$(libc_common_cflags) \
|
||||
-I$(LOCAL_PATH)/upstream-netbsd \
|
||||
-I$(LOCAL_PATH)/upstream-netbsd/libc/include \
|
||||
-include upstream-netbsd/netbsd-compat.h
|
||||
LOCAL_C_INCLUDES := $(libc_common_c_includes)
|
||||
LOCAL_MODULE := libc_netbsd
|
||||
@@ -732,22 +771,6 @@ LOCAL_SYSTEM_SHARED_LIBRARIES :=
|
||||
include $(BUILD_STATIC_LIBRARY)
|
||||
|
||||
|
||||
# ========================================================
|
||||
# libc_bionic.a - home-grown C library code
|
||||
# ========================================================
|
||||
#
|
||||
include $(CLEAR_VARS)
|
||||
|
||||
LOCAL_SRC_FILES := $(libc_bionic_src_files)
|
||||
LOCAL_CFLAGS := $(libc_common_cflags) -Werror
|
||||
LOCAL_C_INCLUDES := $(libc_common_c_includes)
|
||||
LOCAL_MODULE := libc_bionic
|
||||
LOCAL_ADDITIONAL_DEPENDENCIES := $(LOCAL_PATH)/Android.mk
|
||||
LOCAL_SYSTEM_SHARED_LIBRARIES :=
|
||||
|
||||
include $(BUILD_STATIC_LIBRARY)
|
||||
|
||||
|
||||
# ========================================================
|
||||
# libc_common.a
|
||||
# ========================================================
|
||||
@@ -755,18 +778,13 @@ include $(BUILD_STATIC_LIBRARY)
|
||||
include $(CLEAR_VARS)
|
||||
|
||||
LOCAL_SRC_FILES := $(libc_common_src_files)
|
||||
LOCAL_CFLAGS := $(libc_common_cflags) \
|
||||
-std=gnu99 \
|
||||
-I$(LOCAL_PATH)/upstream-netbsd/libc/include # for netbsd private headers
|
||||
LOCAL_CFLAGS := $(libc_common_cflags)
|
||||
LOCAL_C_INCLUDES := $(libc_common_c_includes)
|
||||
LOCAL_MODULE := libc_common
|
||||
LOCAL_ADDITIONAL_DEPENDENCIES := $(LOCAL_PATH)/Android.mk
|
||||
LOCAL_WHOLE_STATIC_LIBRARIES := libbionic_ssp libc_bionic libc_freebsd libc_netbsd
|
||||
LOCAL_WHOLE_STATIC_LIBRARIES := libbionic_ssp libc_netbsd
|
||||
LOCAL_SYSTEM_SHARED_LIBRARIES :=
|
||||
|
||||
# TODO: split out the asflags.
|
||||
LOCAL_ASFLAGS := $(LOCAL_CFLAGS)
|
||||
|
||||
include $(BUILD_STATIC_LIBRARY)
|
||||
|
||||
|
||||
@@ -775,22 +793,21 @@ include $(BUILD_STATIC_LIBRARY)
|
||||
# ========================================================
|
||||
#
|
||||
# This is a version of the static C library that does not
|
||||
# include malloc. It's useful in situations when the user wants
|
||||
# to provide their own malloc implementation, or wants to
|
||||
# explicitly disallow the use of the use of malloc,
|
||||
# such as in the dynamic loader.
|
||||
# include malloc. It's useful in situations when calling
|
||||
# the user wants to provide their own malloc implementation,
|
||||
# or wants to explicitly disallow the use of the use of malloc,
|
||||
# like the dynamic loader.
|
||||
|
||||
include $(CLEAR_VARS)
|
||||
|
||||
LOCAL_SRC_FILES := \
|
||||
$(libc_arch_static_src_files) \
|
||||
$(libc_static_common_src_files) \
|
||||
bionic/libc_init_static.cpp
|
||||
bionic/libc_init_static.c
|
||||
|
||||
LOCAL_C_INCLUDES := $(libc_common_c_includes)
|
||||
LOCAL_CFLAGS := $(libc_common_cflags) \
|
||||
-DLIBC_STATIC \
|
||||
-std=gnu99
|
||||
-DLIBC_STATIC
|
||||
|
||||
LOCAL_MODULE := libc_nomalloc
|
||||
LOCAL_ADDITIONAL_DEPENDENCIES := $(LOCAL_PATH)/Android.mk
|
||||
@@ -810,11 +827,10 @@ LOCAL_SRC_FILES := \
|
||||
$(libc_static_common_src_files) \
|
||||
bionic/dlmalloc.c \
|
||||
bionic/malloc_debug_common.cpp \
|
||||
bionic/libc_init_static.cpp
|
||||
bionic/libc_init_static.c
|
||||
|
||||
LOCAL_CFLAGS := $(libc_common_cflags) \
|
||||
-DLIBC_STATIC \
|
||||
-std=gnu99
|
||||
-DLIBC_STATIC
|
||||
LOCAL_C_INCLUDES := $(libc_common_c_includes)
|
||||
LOCAL_MODULE := libc
|
||||
LOCAL_ADDITIONAL_DEPENDENCIES := $(LOCAL_PATH)/Android.mk
|
||||
@@ -835,7 +851,7 @@ include $(CLEAR_VARS)
|
||||
# Since this code is experimental it is disabled by default.
|
||||
# see libc/bionic/pthread_debug.c for details
|
||||
|
||||
LOCAL_CFLAGS := $(libc_common_cflags) -std=gnu99 -DPTHREAD_DEBUG -DPTHREAD_DEBUG_ENABLED=0
|
||||
LOCAL_CFLAGS := $(libc_common_cflags) -DPTHREAD_DEBUG -DPTHREAD_DEBUG_ENABLED=0
|
||||
LOCAL_C_INCLUDES := $(libc_common_c_includes)
|
||||
|
||||
LOCAL_SRC_FILES := \
|
||||
@@ -843,8 +859,8 @@ LOCAL_SRC_FILES := \
|
||||
$(libc_static_common_src_files) \
|
||||
bionic/dlmalloc.c \
|
||||
bionic/malloc_debug_common.cpp \
|
||||
bionic/pthread_debug.cpp \
|
||||
bionic/libc_init_dynamic.cpp
|
||||
bionic/pthread_debug.c \
|
||||
bionic/libc_init_dynamic.c
|
||||
|
||||
ifeq ($(TARGET_ARCH),arm)
|
||||
LOCAL_NO_CRT := true
|
||||
@@ -859,7 +875,6 @@ endif
|
||||
|
||||
LOCAL_MODULE:= libc
|
||||
LOCAL_ADDITIONAL_DEPENDENCIES := $(LOCAL_PATH)/Android.mk
|
||||
LOCAL_REQUIRED_MODULES := tzdata
|
||||
|
||||
# WARNING: The only library libc.so should depend on is libdl.so! If you add other libraries,
|
||||
# make sure to add -Wl,--exclude-libs=libgcc.a to the LOCAL_LDFLAGS for those libraries. This
|
||||
@@ -896,10 +911,10 @@ LOCAL_CFLAGS := \
|
||||
LOCAL_C_INCLUDES := $(libc_common_c_includes)
|
||||
|
||||
LOCAL_SRC_FILES := \
|
||||
bionic/debug_mapinfo.cpp \
|
||||
bionic/debug_stacktrace.cpp \
|
||||
bionic/malloc_debug_leak.cpp \
|
||||
bionic/malloc_debug_check.cpp \
|
||||
bionic/malloc_debug_check_mapinfo.cpp \
|
||||
bionic/malloc_debug_stacktrace.cpp
|
||||
|
||||
LOCAL_MODULE:= libc_malloc_debug_leak
|
||||
LOCAL_ADDITIONAL_DEPENDENCIES := $(LOCAL_PATH)/Android.mk
|
||||
|
||||
357
libc/NOTICE
357
libc/NOTICE
@@ -37,40 +37,6 @@ SUCH DAMAGE.
|
||||
|
||||
-------------------------------------------------------------------
|
||||
|
||||
Copyright (C) 2004, 2005, 2008 Internet Systems Consortium, Inc. ("ISC")
|
||||
Copyright (C) 1995-1999, 2001, 2003 Internet Software Consortium.
|
||||
|
||||
Permission to use, copy, modify, and/or distribute this software for any
|
||||
purpose with or without fee is hereby granted, provided that the above
|
||||
copyright notice and this permission notice appear in all copies.
|
||||
|
||||
THE SOFTWARE IS PROVIDED "AS IS" AND ISC DISCLAIMS ALL WARRANTIES WITH
|
||||
REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF MERCHANTABILITY
|
||||
AND FITNESS. IN NO EVENT SHALL ISC BE LIABLE FOR ANY SPECIAL, DIRECT,
|
||||
INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES WHATSOEVER RESULTING FROM
|
||||
LOSS OF USE, DATA OR PROFITS, WHETHER IN AN ACTION OF CONTRACT, NEGLIGENCE
|
||||
OR OTHER TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR
|
||||
PERFORMANCE OF THIS SOFTWARE.
|
||||
|
||||
-------------------------------------------------------------------
|
||||
|
||||
Copyright (C) 2004, 2005, 2008 Internet Systems Consortium, Inc. ("ISC")
|
||||
Copyright (C) 1997-2001 Internet Software Consortium.
|
||||
|
||||
Permission to use, copy, modify, and/or distribute this software for any
|
||||
purpose with or without fee is hereby granted, provided that the above
|
||||
copyright notice and this permission notice appear in all copies.
|
||||
|
||||
THE SOFTWARE IS PROVIDED "AS IS" AND ISC DISCLAIMS ALL WARRANTIES WITH
|
||||
REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF MERCHANTABILITY
|
||||
AND FITNESS. IN NO EVENT SHALL ISC BE LIABLE FOR ANY SPECIAL, DIRECT,
|
||||
INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES WHATSOEVER RESULTING FROM
|
||||
LOSS OF USE, DATA OR PROFITS, WHETHER IN AN ACTION OF CONTRACT, NEGLIGENCE
|
||||
OR OTHER TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR
|
||||
PERFORMANCE OF THIS SOFTWARE.
|
||||
|
||||
-------------------------------------------------------------------
|
||||
|
||||
Copyright (C) 2006 The Android Open Source Project
|
||||
All rights reserved.
|
||||
|
||||
@@ -99,6 +65,22 @@ SUCH DAMAGE.
|
||||
|
||||
-------------------------------------------------------------------
|
||||
|
||||
Copyright (C) 2007 The Android Open Source Project
|
||||
|
||||
Licensed under the Apache License, Version 2.0 (the "License");
|
||||
you may not use this file except in compliance with the License.
|
||||
You may obtain a copy of the License at
|
||||
|
||||
http://www.apache.org/licenses/LICENSE-2.0
|
||||
|
||||
Unless required by applicable law or agreed to in writing, software
|
||||
distributed under the License is distributed on an "AS IS" BASIS,
|
||||
WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
|
||||
See the License for the specific language governing permissions and
|
||||
limitations under the License.
|
||||
|
||||
-------------------------------------------------------------------
|
||||
|
||||
Copyright (C) 2008 The Android Open Source Project
|
||||
All rights reserved.
|
||||
|
||||
@@ -346,50 +328,6 @@ SUCH DAMAGE.
|
||||
|
||||
-------------------------------------------------------------------
|
||||
|
||||
Copyright (C) 2013 The Android Open Source Project
|
||||
|
||||
Licensed under the Apache License, Version 2.0 (the "License");
|
||||
you may not use this file except in compliance with the License.
|
||||
You may obtain a copy of the License at
|
||||
|
||||
http://www.apache.org/licenses/LICENSE-2.0
|
||||
|
||||
Unless required by applicable law or agreed to in writing, software
|
||||
distributed under the License is distributed on an "AS IS" BASIS,
|
||||
WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
|
||||
See the License for the specific language governing permissions and
|
||||
limitations under the License.
|
||||
|
||||
-------------------------------------------------------------------
|
||||
|
||||
Copyright (C) 2013 The Android Open Source Project
|
||||
All rights reserved.
|
||||
|
||||
Redistribution and use in source and binary forms, with or without
|
||||
modification, are permitted provided that the following conditions
|
||||
are met:
|
||||
Redistributions of source code must retain the above copyright
|
||||
notice, this list of conditions and the following disclaimer.
|
||||
Redistributions in binary form must reproduce the above copyright
|
||||
notice, this list of conditions and the following disclaimer in
|
||||
the documentation and/or other materials provided with the
|
||||
distribution.
|
||||
|
||||
THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
|
||||
"AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
|
||||
LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
|
||||
FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
|
||||
COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
|
||||
INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
|
||||
BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
|
||||
OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
|
||||
AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
|
||||
OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT
|
||||
OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
|
||||
SUCH DAMAGE.
|
||||
|
||||
-------------------------------------------------------------------
|
||||
|
||||
Copyright (c) 1980, 1983, 1988, 1993
|
||||
The Regents of the University of California. All rights reserved.
|
||||
|
||||
@@ -500,40 +438,6 @@ SUCH DAMAGE.
|
||||
|
||||
-------------------------------------------------------------------
|
||||
|
||||
Copyright (c) 1982, 1986, 1993
|
||||
The Regents of the University of California. All rights reserved.
|
||||
(c) UNIX System Laboratories, Inc.
|
||||
All or some portions of this file are derived from material licensed
|
||||
to the University of California by American Telephone and Telegraph
|
||||
Co. or Unix System Laboratories, Inc. and are reproduced herein with
|
||||
the permission of UNIX System Laboratories, Inc.
|
||||
|
||||
Redistribution and use in source and binary forms, with or without
|
||||
modification, are permitted provided that the following conditions
|
||||
are met:
|
||||
1. Redistributions of source code must retain the above copyright
|
||||
notice, this list of conditions and the following disclaimer.
|
||||
2. Redistributions in binary form must reproduce the above copyright
|
||||
notice, this list of conditions and the following disclaimer in the
|
||||
documentation and/or other materials provided with the distribution.
|
||||
3. Neither the name of the University nor the names of its contributors
|
||||
may be used to endorse or promote products derived from this software
|
||||
without specific prior written permission.
|
||||
|
||||
THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
|
||||
ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
|
||||
IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
|
||||
ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
|
||||
FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
|
||||
DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
|
||||
OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
|
||||
HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
|
||||
LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
|
||||
OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
|
||||
SUCH DAMAGE.
|
||||
|
||||
-------------------------------------------------------------------
|
||||
|
||||
Copyright (c) 1983, 1987, 1989
|
||||
The Regents of the University of California. All rights reserved.
|
||||
|
||||
@@ -665,11 +569,7 @@ are met:
|
||||
2. Redistributions in binary form must reproduce the above copyright
|
||||
notice, this list of conditions and the following disclaimer in the
|
||||
documentation and/or other materials provided with the distribution.
|
||||
3. All advertising materials mentioning features or use of this software
|
||||
must display the following acknowledgement:
|
||||
This product includes software developed by the University of
|
||||
California, Berkeley and its contributors.
|
||||
4. Neither the name of the University nor the names of its contributors
|
||||
3. Neither the name of the University nor the names of its contributors
|
||||
may be used to endorse or promote products derived from this software
|
||||
without specific prior written permission.
|
||||
|
||||
@@ -685,6 +585,24 @@ LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
|
||||
OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
|
||||
SUCH DAMAGE.
|
||||
|
||||
Portions Copyright (c) 1993 by Digital Equipment Corporation.
|
||||
|
||||
Permission to use, copy, modify, and distribute this software for any
|
||||
purpose with or without fee is hereby granted, provided that the above
|
||||
copyright notice and this permission notice appear in all copies, and that
|
||||
the name of Digital Equipment Corporation not be used in advertising or
|
||||
publicity pertaining to distribution of the document or software without
|
||||
specific, written prior permission.
|
||||
|
||||
THE SOFTWARE IS PROVIDED "AS IS" AND DIGITAL EQUIPMENT CORP. DISCLAIMS ALL
|
||||
WARRANTIES WITH REGARD TO THIS SOFTWARE, INCLUDING ALL IMPLIED WARRANTIES
|
||||
OF MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL DIGITAL EQUIPMENT
|
||||
CORPORATION BE LIABLE FOR ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL
|
||||
DAMAGES OR ANY DAMAGES WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR
|
||||
PROFITS, WHETHER IN AN ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS
|
||||
ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS
|
||||
SOFTWARE.
|
||||
|
||||
-------------------------------------------------------------------
|
||||
|
||||
Copyright (c) 1983, 1993
|
||||
@@ -1488,6 +1406,38 @@ SUCH DAMAGE.
|
||||
|
||||
-------------------------------------------------------------------
|
||||
|
||||
Copyright (c) 1990 Regents of the University of California.
|
||||
All rights reserved.
|
||||
|
||||
This code is derived from software contributed to Berkeley by
|
||||
Chris Torek.
|
||||
|
||||
Redistribution and use in source and binary forms, with or without
|
||||
modification, are permitted provided that the following conditions
|
||||
are met:
|
||||
1. Redistributions of source code must retain the above copyright
|
||||
notice, this list of conditions and the following disclaimer.
|
||||
2. Redistributions in binary form must reproduce the above copyright
|
||||
notice, this list of conditions and the following disclaimer in the
|
||||
documentation and/or other materials provided with the distribution.
|
||||
3. Neither the name of the University nor the names of its contributors
|
||||
may be used to endorse or promote products derived from this software
|
||||
without specific prior written permission.
|
||||
|
||||
THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
|
||||
ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
|
||||
IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
|
||||
ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
|
||||
FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
|
||||
DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
|
||||
OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
|
||||
HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
|
||||
LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
|
||||
OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
|
||||
SUCH DAMAGE.
|
||||
|
||||
-------------------------------------------------------------------
|
||||
|
||||
Copyright (c) 1990 The Regents of the University of California.
|
||||
All rights reserved.
|
||||
|
||||
@@ -1641,6 +1591,35 @@ SUCH DAMAGE.
|
||||
|
||||
-------------------------------------------------------------------
|
||||
|
||||
Copyright (c) 1990, 1993
|
||||
The Regents of the University of California. All rights reserved.
|
||||
|
||||
Redistribution and use in source and binary forms, with or without
|
||||
modification, are permitted provided that the following conditions
|
||||
are met:
|
||||
1. Redistributions of source code must retain the above copyright
|
||||
notice, this list of conditions and the following disclaimer.
|
||||
2. Redistributions in binary form must reproduce the above copyright
|
||||
notice, this list of conditions and the following disclaimer in the
|
||||
documentation and/or other materials provided with the distribution.
|
||||
4. Neither the name of the University nor the names of its contributors
|
||||
may be used to endorse or promote products derived from this software
|
||||
without specific prior written permission.
|
||||
|
||||
THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
|
||||
ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
|
||||
IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
|
||||
ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
|
||||
FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
|
||||
DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
|
||||
OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
|
||||
HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
|
||||
LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
|
||||
OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
|
||||
SUCH DAMAGE.
|
||||
|
||||
-------------------------------------------------------------------
|
||||
|
||||
Copyright (c) 1990, 1993
|
||||
The Regents of the University of California. All rights reserved.
|
||||
|
||||
@@ -2397,35 +2376,6 @@ to anyone/anything when using this software.
|
||||
|
||||
-------------------------------------------------------------------
|
||||
|
||||
Copyright (c) 1994 The NetBSD Foundation, Inc.
|
||||
All rights reserved.
|
||||
|
||||
This code is derived from software contributed to The NetBSD Foundation
|
||||
by Christos Zoulas.
|
||||
|
||||
Redistribution and use in source and binary forms, with or without
|
||||
modification, are permitted provided that the following conditions
|
||||
are met:
|
||||
1. Redistributions of source code must retain the above copyright
|
||||
notice, this list of conditions and the following disclaimer.
|
||||
2. Redistributions in binary form must reproduce the above copyright
|
||||
notice, this list of conditions and the following disclaimer in the
|
||||
documentation and/or other materials provided with the distribution.
|
||||
|
||||
THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
|
||||
``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
|
||||
TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
|
||||
PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
|
||||
BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
|
||||
CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
|
||||
SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
|
||||
INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
|
||||
CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
|
||||
ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
|
||||
POSSIBILITY OF SUCH DAMAGE.
|
||||
|
||||
-------------------------------------------------------------------
|
||||
|
||||
Copyright (c) 1995 - 2001 Kungliga Tekniska Högskolan
|
||||
(Royal Institute of Technology, Stockholm, Sweden).
|
||||
All rights reserved.
|
||||
@@ -2513,6 +2463,32 @@ rights to redistribute these changes.
|
||||
|
||||
-------------------------------------------------------------------
|
||||
|
||||
Copyright (c) 1995, 1996 Erik Theisen. All rights reserved.
|
||||
|
||||
Redistribution and use in source and binary forms, with or without
|
||||
modification, are permitted provided that the following conditions
|
||||
are met:
|
||||
1. Redistributions of source code must retain the above copyright
|
||||
notice, this list of conditions and the following disclaimer.
|
||||
2. Redistributions in binary form must reproduce the above copyright
|
||||
notice, this list of conditions and the following disclaimer in the
|
||||
documentation and/or other materials provided with the distribution.
|
||||
3. The name of the author may not be used to endorse or promote products
|
||||
derived from this software without specific prior written permission
|
||||
|
||||
THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
|
||||
IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
|
||||
OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
|
||||
IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
|
||||
INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
|
||||
NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
|
||||
DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
|
||||
THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
|
||||
(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
|
||||
THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
|
||||
|
||||
-------------------------------------------------------------------
|
||||
|
||||
Copyright (c) 1996 by Internet Software Consortium.
|
||||
|
||||
Permission to use, copy, modify, and distribute this software for any
|
||||
@@ -3620,6 +3596,23 @@ OF OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
|
||||
|
||||
-------------------------------------------------------------------
|
||||
|
||||
Copyright (c) 2004 by Internet Systems Consortium, Inc. ("ISC")
|
||||
Copyright (c) 1997-1999 by Internet Software Consortium.
|
||||
|
||||
Permission to use, copy, modify, and distribute this software for any
|
||||
purpose with or without fee is hereby granted, provided that the above
|
||||
copyright notice and this permission notice appear in all copies.
|
||||
|
||||
THE SOFTWARE IS PROVIDED "AS IS" AND ISC DISCLAIMS ALL WARRANTIES
|
||||
WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
|
||||
MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL ISC BE LIABLE FOR
|
||||
ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
|
||||
WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
|
||||
ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT
|
||||
OF OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
|
||||
|
||||
-------------------------------------------------------------------
|
||||
|
||||
Copyright (c) 2004 by Internet Systems Consortium, Inc. ("ISC")
|
||||
Copyright (c) 1999 by Internet Software Consortium.
|
||||
|
||||
@@ -3680,23 +3673,6 @@ SUCH DAMAGE.
|
||||
|
||||
-------------------------------------------------------------------
|
||||
|
||||
Copyright (c) 2005 by Internet Systems Consortium, Inc. ("ISC")
|
||||
Copyright (c) 1995-1999 by Internet Software Consortium
|
||||
|
||||
Permission to use, copy, modify, and distribute this software for any
|
||||
purpose with or without fee is hereby granted, provided that the above
|
||||
copyright notice and this permission notice appear in all copies.
|
||||
|
||||
THE SOFTWARE IS PROVIDED "AS IS" AND ISC DISCLAIMS ALL WARRANTIES
|
||||
WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
|
||||
MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL ISC BE LIABLE FOR
|
||||
ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
|
||||
WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
|
||||
ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT
|
||||
OF OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
|
||||
|
||||
-------------------------------------------------------------------
|
||||
|
||||
Copyright (c) 2007-2008 Michael G Schwern
|
||||
|
||||
This software originally derived from Paul Sheer's pivotal_gmtime_r.c.
|
||||
@@ -3857,33 +3833,6 @@ SUCH DAMAGE.
|
||||
|
||||
-------------------------------------------------------------------
|
||||
|
||||
Copyright (c) 2009 The NetBSD Foundation, Inc.
|
||||
|
||||
This code is derived from software contributed to The NetBSD Foundation
|
||||
by Roy Marples.
|
||||
|
||||
Redistribution and use in source and binary forms, with or without
|
||||
modification, are permitted provided that the following conditions
|
||||
are met:
|
||||
1. Redistributions of source code must retain the above copyright
|
||||
notice, this list of conditions and the following disclaimer.
|
||||
2. Redistributions in binary form must reproduce the above copyright
|
||||
notice, this list of conditions and the following disclaimer in the
|
||||
documentation and/or other materials provided with the distribution.
|
||||
|
||||
THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
|
||||
IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
|
||||
OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
|
||||
IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
|
||||
INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
|
||||
NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
|
||||
DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
|
||||
THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
|
||||
(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
|
||||
THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
|
||||
|
||||
-------------------------------------------------------------------
|
||||
|
||||
Copyright (c) 2010 MIPS Technologies, Inc.
|
||||
|
||||
All rights reserved.
|
||||
@@ -4030,34 +3979,6 @@ SUCH DAMAGE.
|
||||
|
||||
-------------------------------------------------------------------
|
||||
|
||||
Copyright (c) 2013 ARM Ltd
|
||||
All rights reserved.
|
||||
|
||||
Redistribution and use in source and binary forms, with or without
|
||||
modification, are permitted provided that the following conditions
|
||||
are met:
|
||||
1. Redistributions of source code must retain the above copyright
|
||||
notice, this list of conditions and the following disclaimer.
|
||||
2. Redistributions in binary form must reproduce the above copyright
|
||||
notice, this list of conditions and the following disclaimer in the
|
||||
documentation and/or other materials provided with the distribution.
|
||||
3. The name of the company may not be used to endorse or promote
|
||||
products derived from this software without specific prior written
|
||||
permission.
|
||||
|
||||
THIS SOFTWARE IS PROVIDED BY ARM LTD ``AS IS'' AND ANY EXPRESS OR IMPLIED
|
||||
WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
|
||||
MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
|
||||
IN NO EVENT SHALL ARM LTD BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
|
||||
SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED
|
||||
TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR
|
||||
PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF
|
||||
LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING
|
||||
NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
|
||||
SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
|
||||
|
||||
-------------------------------------------------------------------
|
||||
|
||||
Copyright (c)1999 Citrus Project,
|
||||
All rights reserved.
|
||||
|
||||
|
||||
54
libc/README
Normal file
54
libc/README
Normal file
@@ -0,0 +1,54 @@
|
||||
Welcome to Bionic, Android's small and custom C library for the Android
|
||||
platform.
|
||||
|
||||
Bionic is mainly a port of the BSD C library to our Linux kernel with the
|
||||
following additions/changes:
|
||||
|
||||
- no support for locales
|
||||
- no support for wide chars (i.e. multi-byte characters)
|
||||
- its own smallish implementation of pthreads based on Linux futexes
|
||||
- support for x86, ARM and ARM thumb CPU instruction sets and kernel interfaces
|
||||
|
||||
Bionic is released under the standard 3-clause BSD License
|
||||
|
||||
Bionic doesn't want to implement all features of a traditional C library, we only
|
||||
add features to it as we need them, and we try to keep things as simple and small
|
||||
as possible. Our goal is not to support scaling to thousands of concurrent threads
|
||||
on multi-processors machines; we're running this on cell-phones, damnit !!
|
||||
|
||||
Note that Bionic doesn't provide a libthread_db or a libm implementation.
|
||||
|
||||
|
||||
Adding new syscalls:
|
||||
====================
|
||||
|
||||
Bionic provides the gensyscalls.py Python script to automatically generate syscall
|
||||
stubs from the list defined in the file SYSCALLS.TXT. You can thus add a new syscall
|
||||
by doing the following:
|
||||
|
||||
- edit SYSCALLS.TXT
|
||||
- add a new line describing your syscall, it should look like:
|
||||
|
||||
return_type syscall_name(parameters) syscall_number
|
||||
|
||||
- in the event where you want to differentiate the syscall function from its entry name,
|
||||
use the alternate:
|
||||
|
||||
return_type funcname:syscall_name(parameters) syscall_number
|
||||
|
||||
- additionally, if the syscall number is different between ARM and x86, use:
|
||||
|
||||
return_type funcname[:syscall_name](parameters) arm_number,x86_number
|
||||
|
||||
- a syscall number can be -1 to indicate that the syscall is not implemented on
|
||||
a given platform, for example:
|
||||
|
||||
void __set_tls(void*) arm_number,-1
|
||||
|
||||
|
||||
the comments in SYSCALLS.TXT contain more information about the line format
|
||||
|
||||
You can also use the 'checksyscalls.py' script to check that all the syscall
|
||||
numbers you entered are correct. It does so by looking at the values defined in
|
||||
your Linux kernel headers. The script indicates where the values are incorrect
|
||||
and what is expected instead.
|
||||
@@ -1,11 +1,13 @@
|
||||
# This file is used to automatically generate bionic's the system calls stubs.
|
||||
# this file is used to list all the syscalls that will be supported by
|
||||
# the Bionic C library. It is used to automatically generate the syscall
|
||||
# stubs, the list of syscall constants (__NR_xxxx) and the content of <linux/_unistd.h>
|
||||
#
|
||||
# Each non comment line has the following format:
|
||||
# each non comment line has the following format:
|
||||
#
|
||||
# return_type func_name[:syscall_name[:call_id]]([parameter_list]) (1|-1|"stub")
|
||||
# return_type func_name[:syscall_name[:call_id]]([parameter_list]) (syscall_number|"stub")
|
||||
#
|
||||
# Note that:
|
||||
# - syscall_name corresponds to the name of the syscall, which may differ from
|
||||
# note that:
|
||||
# - syscall_name correspond to the name of the syscall, which may differ from
|
||||
# the exported function name (example: the exit syscall is implemented by the _exit()
|
||||
# function, which is not the same as the standard C exit() function which calls it)
|
||||
# The call_id parameter, given that func_name and syscall_name have
|
||||
@@ -16,306 +18,298 @@
|
||||
# - each parameter type is assumed to be stored on 32 bits, there is no plan to support
|
||||
# 64-bit architectures at the moment
|
||||
#
|
||||
# - the final field can be "1", meaning: generate a stub for each architecture,
|
||||
# taking the constants from the kernel header files.
|
||||
# - it there is "stub" instead of a syscall number, the tool will not generate any
|
||||
# assembler template for the syscall; it's up to the bionic implementation to provide
|
||||
# a relevant C stub
|
||||
#
|
||||
# - the final field can be "stub" meaning: do not generate any stubs ---
|
||||
# in this case, a hand-written custom stub must be provided.
|
||||
# TODO: replace this with something like "custom" or "none", or remove
|
||||
# it entirely.
|
||||
# - additionally, if the syscall number is different amoung ARM, and x86, MIPS use:
|
||||
# return_type funcname[:syscall_name](parameters) arm_number,x86_number,mips_number
|
||||
#
|
||||
# - the final field can be a three-element list of 1s and -1 meaning:
|
||||
# this system call is only available on some of the architectures (1),
|
||||
# and no stub should be generated for those architectures marked with -1.
|
||||
# the order is arm,x86,mips.
|
||||
# TODO: replace this with something more readable like "-arm,-mips" (meaning x86 only).
|
||||
#
|
||||
# This file is processed by a python script named gensyscalls.py.
|
||||
# the file is processed by a python script named gensyscalls.py
|
||||
#
|
||||
|
||||
# process management
|
||||
void _exit:exit_group (int) 1
|
||||
void _exit:exit_group (int) 248,252,246
|
||||
void _exit_thread:exit (int) 1
|
||||
pid_t __fork:fork (void) 1
|
||||
pid_t _waitpid:waitpid (pid_t, int*, int, struct rusage*) -1,1,1
|
||||
int __waitid:waitid(int, pid_t, struct siginfo_t*, int,void*) 1
|
||||
pid_t wait4(pid_t pid, int *status, int options, struct rusage *rusage) 1
|
||||
pid_t __fork:fork (void) 2
|
||||
pid_t _waitpid:waitpid (pid_t, int*, int, struct rusage*) -1,7,7
|
||||
int __waitid:waitid(int, pid_t, struct siginfo_t*, int,void*) 280,284,278
|
||||
|
||||
# NOTE: this system call is never called directly, but we list it there
|
||||
# to have __NR_clone properly defined.
|
||||
#
|
||||
pid_t __sys_clone:clone (int, void*, int*, void*, int*) 1
|
||||
pid_t __sys_clone:clone (int, void*, int*, void*, int*) 120
|
||||
|
||||
int execve (const char*, char* const*, char* const*) 1
|
||||
int execve (const char*, char* const*, char* const*) 11
|
||||
|
||||
int __setuid:setuid32 (uid_t) 1,1,-1
|
||||
int __setuid:setuid (uid_t) -1,-1,1
|
||||
uid_t getuid:getuid32 () 1,1,-1
|
||||
uid_t getuid:getuid () -1,-1,1
|
||||
gid_t getgid:getgid32 () 1,1,-1
|
||||
gid_t getgid:getgid () -1,-1,1
|
||||
uid_t geteuid:geteuid32 () 1,1,-1
|
||||
uid_t geteuid:geteuid () -1,-1,1
|
||||
gid_t getegid:getegid32 () 1,1,-1
|
||||
gid_t getegid:getegid () -1,-1,1
|
||||
uid_t getresuid:getresuid32 (uid_t *ruid, uid_t *euid, uid_t *suid) 1,1,-1
|
||||
uid_t getresuid:getresuid (uid_t *ruid, uid_t *euid, uid_t *suid) -1,-1,1
|
||||
gid_t getresgid:getresgid32 (gid_t *rgid, gid_t *egid, gid_t *sgid) 1,1,-1
|
||||
gid_t getresgid:getresgid (gid_t *rgid, gid_t *egid, gid_t *sgid) -1,-1,1
|
||||
pid_t gettid() 1
|
||||
ssize_t readahead(int, off64_t, size_t) 1
|
||||
int getgroups:getgroups32(int, gid_t *) 1,1,-1
|
||||
int getgroups:getgroups(int, gid_t *) -1,-1,1
|
||||
pid_t getpgid(pid_t) 1
|
||||
pid_t getppid() 1
|
||||
pid_t getsid(pid_t) 1
|
||||
pid_t setsid() 1
|
||||
int setgid:setgid32(gid_t) 1,1,-1
|
||||
int setgid:setgid(gid_t) -1,-1,1
|
||||
int __setuid:setuid32 (uid_t) 213,213,-1
|
||||
int __setuid:setuid (uid_t) -1,-1,23
|
||||
uid_t getuid:getuid32 () 199,199,-1
|
||||
uid_t getuid:getuid () -1,-1,24
|
||||
gid_t getgid:getgid32 () 200,200,-1
|
||||
gid_t getgid:getgid () -1,-1,47
|
||||
uid_t geteuid:geteuid32 () 201,201,-1
|
||||
uid_t geteuid:geteuid () -1,-1,49
|
||||
gid_t getegid:getegid32 () 202,202,-1
|
||||
gid_t getegid:getegid () -1,-1,50
|
||||
uid_t getresuid:getresuid32 (uid_t *ruid, uid_t *euid, uid_t *suid) 209,209,-1
|
||||
uid_t getresuid:getresuid (uid_t *ruid, uid_t *euid, uid_t *suid) -1,-1,186
|
||||
gid_t getresgid:getresgid32 (gid_t *rgid, gid_t *egid, gid_t *sgid) 211,211,-1
|
||||
gid_t getresgid:getresgid (gid_t *rgid, gid_t *egid, gid_t *sgid) -1,-1,191
|
||||
pid_t gettid() 224,224,222
|
||||
ssize_t readahead(int, off64_t, size_t) 225,225,223
|
||||
int getgroups:getgroups32(int, gid_t *) 205,205,-1
|
||||
int getgroups:getgroups(int, gid_t *) -1,-1,80
|
||||
pid_t getpgid(pid_t) 132
|
||||
pid_t getppid() 64
|
||||
pid_t getsid(pid_t) 147
|
||||
pid_t setsid() 66
|
||||
int setgid:setgid32(gid_t) 214,214,-1
|
||||
int setgid:setgid(gid_t) -1,-1,46
|
||||
int seteuid:seteuid32(uid_t) stub
|
||||
int __setreuid:setreuid32(uid_t, uid_t) 1,1,-1
|
||||
int __setreuid:setreuid(uid_t, uid_t) -1,-1,1
|
||||
int __setresuid:setresuid32(uid_t, uid_t, uid_t) 1,1,-1
|
||||
int __setresuid:setresuid(uid_t, uid_t, uid_t) -1,-1,1
|
||||
int setresgid:setresgid32(gid_t, gid_t, gid_t) 1,1,-1
|
||||
int setresgid:setresgid(gid_t, gid_t, gid_t) -1,-1,1
|
||||
void* __brk:brk(void*) 1
|
||||
int __setreuid:setreuid32(uid_t, uid_t) 203,203,-1
|
||||
int __setreuid:setreuid(uid_t, uid_t) -1,-1,70
|
||||
int __setresuid:setresuid32(uid_t, uid_t, uid_t) 208,208,-1
|
||||
int __setresuid:setresuid(uid_t, uid_t, uid_t) -1,-1,185
|
||||
int setresgid:setresgid32(gid_t, gid_t, gid_t) 210,210,-1
|
||||
int setresgid:setresgid(gid_t, gid_t, gid_t) -1,-1,190
|
||||
void* __brk:brk(void*) 45
|
||||
# see comments in arch-arm/bionic/kill.S to understand why we don't generate an ARM stub for kill/tkill
|
||||
int kill(pid_t, int) -1,1,1
|
||||
int tkill(pid_t tid, int sig) -1,1,1
|
||||
int tgkill(pid_t tgid, pid_t tid, int sig) -1,1,1
|
||||
int __ptrace:ptrace(int request, int pid, void* addr, void* data) 1
|
||||
int __set_thread_area:set_thread_area(void* user_desc) -1,1,1
|
||||
int __getpriority:getpriority(int, int) 1
|
||||
int setpriority(int, int, int) 1
|
||||
int setrlimit(int resource, const struct rlimit *rlp) 1
|
||||
int getrlimit:ugetrlimit(int resource, struct rlimit *rlp) 1,1,-1
|
||||
int getrlimit:getrlimit(int resource, struct rlimit *rlp) -1,-1,1
|
||||
int getrusage(int who, struct rusage* r_usage) 1
|
||||
int setgroups:setgroups32(int, const gid_t *) 1,1,-1
|
||||
int setgroups:setgroups(int, const gid_t *) -1,-1,1
|
||||
int kill(pid_t, int) -1,37,37
|
||||
int tkill(pid_t tid, int sig) -1,238,236
|
||||
int tgkill(pid_t tgid, pid_t tid, int sig) -1,270,266
|
||||
int __ptrace:ptrace(int request, int pid, void* addr, void* data) 26
|
||||
int __set_thread_area:set_thread_area(void* user_desc) -1,243,283
|
||||
int __getpriority:getpriority(int, int) 96
|
||||
int setpriority(int, int, int) 97
|
||||
int setrlimit(int resource, const struct rlimit *rlp) 75
|
||||
int getrlimit:ugetrlimit(int resource, struct rlimit *rlp) 191,191,-1
|
||||
int getrlimit:getrlimit(int resource, struct rlimit *rlp) -1,-1,76
|
||||
int getrusage(int who, struct rusage* r_usage) 77
|
||||
int setgroups:setgroups32(int, const gid_t *) 206,206,-1
|
||||
int setgroups:setgroups(int, const gid_t *) -1,-1,81
|
||||
pid_t getpgrp(void) stub
|
||||
int setpgid(pid_t, pid_t) 1
|
||||
pid_t vfork(void) 1,-1,-1
|
||||
int setregid:setregid32(gid_t, gid_t) 1,1,-1
|
||||
int setregid:setregid(gid_t, gid_t) -1,-1,1
|
||||
int chroot(const char *) 1
|
||||
int setpgid(pid_t, pid_t) 57
|
||||
pid_t vfork(void) 190,-1,-1
|
||||
int setregid:setregid32(gid_t, gid_t) 204,204,-1
|
||||
int setregid:setregid(gid_t, gid_t) -1,-1,71
|
||||
int chroot(const char *) 61
|
||||
# IMPORTANT: Even though <sys/prctl.h> declares prctl(int,...), the syscall stub must take 6 arguments
|
||||
# to match the kernel implementation.
|
||||
int prctl(int option, unsigned int arg2, unsigned int arg3, unsigned int arg4, unsigned int arg5) 1
|
||||
int capget(cap_user_header_t header, cap_user_data_t data) 1
|
||||
int capset(cap_user_header_t header, const cap_user_data_t data) 1
|
||||
int sigaltstack(const stack_t*, stack_t*) 1
|
||||
int acct(const char* filepath) 1
|
||||
int prctl(int option, unsigned int arg2, unsigned int arg3, unsigned int arg4, unsigned int arg5) 172,172,192
|
||||
int capget(cap_user_header_t header, cap_user_data_t data) 184,184,204
|
||||
int capset(cap_user_header_t header, const cap_user_data_t data) 185,185,205
|
||||
int sigaltstack(const stack_t*, stack_t*) 186,186,206
|
||||
int acct(const char* filepath) 51
|
||||
|
||||
# file descriptors
|
||||
ssize_t read (int, void*, size_t) 1
|
||||
ssize_t write (int, const void*, size_t) 1
|
||||
ssize_t pread64 (int, void *, size_t, off64_t) 1
|
||||
ssize_t pwrite64 (int, void *, size_t, off64_t) 1
|
||||
int __open:open (const char*, int, mode_t) 1
|
||||
int __openat:openat (int, const char*, int, mode_t) 1
|
||||
int close (int) 1
|
||||
ssize_t read (int, void*, size_t) 3
|
||||
ssize_t write (int, const void*, size_t) 4
|
||||
ssize_t pread64 (int, void *, size_t, off64_t) 180,180,200
|
||||
ssize_t pwrite64 (int, void *, size_t, off64_t) 181,181,201
|
||||
int __open:open (const char*, int, mode_t) 5
|
||||
int __openat:openat (int, const char*, int, mode_t) 322,295,288
|
||||
int close (int) 6
|
||||
int creat(const char*, mode_t) stub
|
||||
off_t lseek(int, off_t, int) 1
|
||||
int __llseek:_llseek (int, unsigned long, unsigned long, loff_t*, int) 1
|
||||
pid_t getpid () 1
|
||||
off_t lseek(int, off_t, int) 19
|
||||
int __llseek:_llseek (int, unsigned long, unsigned long, loff_t*, int) 140
|
||||
pid_t getpid () 20
|
||||
void * mmap(void *, size_t, int, int, int, long) stub
|
||||
void * __mmap2:mmap2(void*, size_t, int, int, int, long) 1
|
||||
int munmap(void *, size_t) 1
|
||||
void * mremap(void *, size_t, size_t, unsigned long) 1
|
||||
int msync(const void *, size_t, int) 1
|
||||
int mprotect(const void *, size_t, int) 1
|
||||
int madvise(const void *, size_t, int) 1
|
||||
int mlock(const void *addr, size_t len) 1
|
||||
int munlock(const void *addr, size_t len) 1
|
||||
int mlockall(int flags) 1
|
||||
int munlockall() 1
|
||||
int mincore(void* start, size_t length, unsigned char* vec) 1
|
||||
int __ioctl:ioctl(int, int, void *) 1
|
||||
int readv(int, const struct iovec *, int) 1
|
||||
int writev(int, const struct iovec *, int) 1
|
||||
int __fcntl:fcntl(int, int, void*) 1
|
||||
int flock(int, int) 1
|
||||
int fchmod(int, mode_t) 1
|
||||
int dup(int) 1
|
||||
int pipe(int *) 1,1,-1
|
||||
int pipe2(int *, int) 1
|
||||
int dup2(int, int) 1
|
||||
int select:_newselect(int, struct fd_set *, struct fd_set *, struct fd_set *, struct timeval *) 1
|
||||
int ftruncate(int, off_t) 1
|
||||
int ftruncate64(int, off64_t) 1
|
||||
int getdents:getdents64(unsigned int, struct dirent *, unsigned int) 1
|
||||
int fsync(int) 1
|
||||
int fdatasync(int) 1
|
||||
int fchown:fchown32(int, uid_t, gid_t) 1,1,-1
|
||||
int fchown:fchown(int, uid_t, gid_t) -1,-1,1
|
||||
void sync(void) 1
|
||||
int __fcntl64:fcntl64(int, int, void *) 1
|
||||
int __fstatfs64:fstatfs64(int, size_t, struct statfs *) 1
|
||||
ssize_t sendfile(int out_fd, int in_fd, off_t *offset, size_t count) 1
|
||||
int fstatat:fstatat64(int dirfd, const char *path, struct stat *buf, int flags) 1
|
||||
int mkdirat(int dirfd, const char *pathname, mode_t mode) 1
|
||||
int fchownat(int dirfd, const char *path, uid_t owner, gid_t group, int flags) 1
|
||||
int fchmodat(int dirfd, const char *path, mode_t mode, int flags) 1
|
||||
int renameat(int olddirfd, const char *oldpath, int newdirfd, const char *newpath) 1
|
||||
int fsetxattr(int, const char *, const void *, size_t, int) 1
|
||||
ssize_t fgetxattr(int, const char *, void *, size_t) 1
|
||||
ssize_t flistxattr(int, char *, size_t) 1
|
||||
int fremovexattr(int, const char *) 1
|
||||
void * __mmap2:mmap2(void*, size_t, int, int, int, long) 192,192,210
|
||||
int munmap(void *, size_t) 91
|
||||
void * mremap(void *, size_t, size_t, unsigned long) 163,163,167
|
||||
int msync(const void *, size_t, int) 144
|
||||
int mprotect(const void *, size_t, int) 125
|
||||
int madvise(const void *, size_t, int) 220,219,218
|
||||
int mlock(const void *addr, size_t len) 150,150,154
|
||||
int munlock(const void *addr, size_t len) 151,151,155
|
||||
int mlockall(int flags) 152,152,156
|
||||
int munlockall() 153,153,157
|
||||
int mincore(void* start, size_t length, unsigned char* vec) 219,218,217
|
||||
int __ioctl:ioctl(int, int, void *) 54
|
||||
int readv(int, const struct iovec *, int) 145
|
||||
int writev(int, const struct iovec *, int) 146
|
||||
int __fcntl:fcntl(int, int, void*) 55
|
||||
int flock(int, int) 143
|
||||
int fchmod(int, mode_t) 94
|
||||
int dup(int) 41
|
||||
int pipe(int *) 42,42,-1
|
||||
int pipe2(int *, int) 359,331,328
|
||||
int dup2(int, int) 63
|
||||
int select:_newselect(int, struct fd_set *, struct fd_set *, struct fd_set *, struct timeval *) 142
|
||||
int ftruncate(int, off_t) 93
|
||||
int ftruncate64(int, off64_t) 194,194,212
|
||||
int getdents:getdents64(unsigned int, struct dirent *, unsigned int) 217,220,219
|
||||
int fsync(int) 118
|
||||
int fdatasync(int) 148,148,152
|
||||
int fchown:fchown32(int, uid_t, gid_t) 207,207,-1
|
||||
int fchown:fchown(int, uid_t, gid_t) -1,-1,95
|
||||
void sync(void) 36
|
||||
int __fcntl64:fcntl64(int, int, void *) 221,221,220
|
||||
int __fstatfs64:fstatfs64(int, size_t, struct statfs *) 267,269,256
|
||||
ssize_t sendfile(int out_fd, int in_fd, off_t *offset, size_t count) 187,187,207
|
||||
int fstatat:fstatat64(int dirfd, const char *path, struct stat *buf, int flags) 327,300,293
|
||||
int mkdirat(int dirfd, const char *pathname, mode_t mode) 323,296,289
|
||||
int fchownat(int dirfd, const char *path, uid_t owner, gid_t group, int flags) 325,298,291
|
||||
int fchmodat(int dirfd, const char *path, mode_t mode, int flags) 333,306,299
|
||||
int renameat(int olddirfd, const char *oldpath, int newdirfd, const char *newpath) 329,302,295
|
||||
int fsetxattr(int, const char *, const void *, size_t, int) 228,228,226
|
||||
ssize_t fgetxattr(int, const char *, void *, size_t) 231,231,229
|
||||
ssize_t flistxattr(int, char *, size_t) 234,234,232
|
||||
int fremovexattr(int, const char *) 237,237,235
|
||||
|
||||
# file system
|
||||
int link (const char*, const char*) 1
|
||||
int unlink (const char*) 1
|
||||
int unlinkat (int, const char *, int) 1
|
||||
int chdir (const char*) 1
|
||||
int mknod (const char*, mode_t, dev_t) 1
|
||||
int chmod (const char*,mode_t) 1
|
||||
int chown:chown32(const char *, uid_t, gid_t) 1,1,-1
|
||||
int chown:chown(const char *, uid_t, gid_t) -1,-1,1
|
||||
int lchown:lchown32 (const char*, uid_t, gid_t) 1,1,-1
|
||||
int lchown:lchown (const char*, uid_t, gid_t) -1,-1,1
|
||||
int mount (const char*, const char*, const char*, unsigned long, const void*) 1
|
||||
int link (const char*, const char*) 9
|
||||
int unlink (const char*) 10
|
||||
int unlinkat (int, const char *, int) 328,301,294
|
||||
int chdir (const char*) 12
|
||||
int mknod (const char*, mode_t, dev_t) 14
|
||||
int chmod (const char*,mode_t) 15
|
||||
int chown:chown32(const char *, uid_t, gid_t) 212,212,-1
|
||||
int chown:chown(const char *, uid_t, gid_t) -1,-1,202
|
||||
int lchown:lchown32 (const char*, uid_t, gid_t) 198,198,-1
|
||||
int lchown:lchown (const char*, uid_t, gid_t) -1,-1,16
|
||||
int mount (const char*, const char*, const char*, unsigned long, const void*) 21
|
||||
int umount(const char*) stub
|
||||
int umount2 (const char*, int) 1
|
||||
int fstat:fstat64(int, struct stat*) 1
|
||||
int stat:stat64(const char *, struct stat *) 1
|
||||
int lstat:lstat64(const char *, struct stat *) 1
|
||||
int mkdir(const char *, mode_t) 1
|
||||
int readlink(const char *, char *, size_t) 1
|
||||
int rmdir(const char *) 1
|
||||
int rename(const char *, const char *) 1
|
||||
int __getcwd:getcwd(char * buf, size_t size) 1
|
||||
int access(const char *, int) 1
|
||||
int faccessat(int, const char *, int, int) 1
|
||||
int symlink(const char *, const char *) 1
|
||||
int fchdir(int) 1
|
||||
int truncate(const char*, off_t) 1
|
||||
int setxattr(const char *, const char *, const void *, size_t, int) 1
|
||||
int lsetxattr(const char *, const char *, const void *, size_t, int) 1
|
||||
ssize_t getxattr(const char *, const char *, void *, size_t) 1
|
||||
ssize_t lgetxattr(const char *, const char *, void *, size_t) 1
|
||||
ssize_t listxattr(const char *, char *, size_t) 1
|
||||
ssize_t llistxattr(const char *, char *, size_t) 1
|
||||
int removexattr(const char *, const char *) 1
|
||||
int lremovexattr(const char *, const char *) 1
|
||||
int __statfs64:statfs64(const char *, size_t, struct statfs *) 1
|
||||
long unshare(unsigned long) 1
|
||||
int umount2 (const char*, int) 52
|
||||
int fstat:fstat64(int, struct stat*) 197,197,215
|
||||
int stat:stat64(const char *, struct stat *) 195,195,213
|
||||
int lstat:lstat64(const char *, struct stat *) 196,196,214
|
||||
int mkdir(const char *, mode_t) 39
|
||||
int readlink(const char *, char *, size_t) 85
|
||||
int rmdir(const char *) 40
|
||||
int rename(const char *, const char *) 38
|
||||
int __getcwd:getcwd(char * buf, size_t size) 183,183,203
|
||||
int access(const char *, int) 33
|
||||
int faccessat(int, const char *, int, int) 334,307,300
|
||||
int symlink(const char *, const char *) 83
|
||||
int fchdir(int) 133
|
||||
int truncate(const char*, off_t) 92
|
||||
int setxattr(const char *, const char *, const void *, size_t, int) 226,226,224
|
||||
int lsetxattr(const char *, const char *, const void *, size_t, int) 227,227,225
|
||||
ssize_t getxattr(const char *, const char *, void *, size_t) 229,229,227
|
||||
ssize_t lgetxattr(const char *, const char *, void *, size_t) 230,230,228
|
||||
ssize_t listxattr(const char *, char *, size_t) 232,232,230
|
||||
ssize_t llistxattr(const char *, char *, size_t) 233,233,231
|
||||
int removexattr(const char *, const char *) 235,235,233
|
||||
int lremovexattr(const char *, const char *) 236,236,234
|
||||
int __statfs64:statfs64(const char *, size_t, struct statfs *) 266,268,255
|
||||
long unshare(unsigned long) 337,310,303
|
||||
|
||||
# time
|
||||
int pause () 1
|
||||
int gettimeofday(struct timeval*, struct timezone*) 1
|
||||
int settimeofday(const struct timeval*, const struct timezone*) 1
|
||||
clock_t times(struct tms *) 1
|
||||
int nanosleep(const struct timespec *, struct timespec *) 1
|
||||
int clock_gettime(clockid_t clk_id, struct timespec *tp) 1
|
||||
int clock_settime(clockid_t clk_id, const struct timespec *tp) 1
|
||||
int clock_getres(clockid_t clk_id, struct timespec *res) 1
|
||||
int clock_nanosleep(clockid_t clock_id, int flags, const struct timespec *req, struct timespec *rem) 1
|
||||
int getitimer(int, const struct itimerval *) 1
|
||||
int setitimer(int, const struct itimerval *, struct itimerval *) 1
|
||||
int __timer_create:timer_create(clockid_t clockid, struct sigevent *evp, timer_t *timerid) 1
|
||||
int __timer_settime:timer_settime(timer_t, int, const struct itimerspec*, struct itimerspec*) 1
|
||||
int __timer_gettime:timer_gettime(timer_t, struct itimerspec*) 1
|
||||
int __timer_getoverrun:timer_getoverrun(timer_t) 1
|
||||
int __timer_delete:timer_delete(timer_t) 1
|
||||
int utimes(const char*, const struct timeval tvp[2]) 1
|
||||
int utimensat(int, const char *, const struct timespec times[2], int) 1
|
||||
int pause () 29
|
||||
int gettimeofday(struct timeval*, struct timezone*) 78
|
||||
int settimeofday(const struct timeval*, const struct timezone*) 79
|
||||
clock_t times(struct tms *) 43
|
||||
int nanosleep(const struct timespec *, struct timespec *) 162,162,166
|
||||
int clock_gettime(clockid_t clk_id, struct timespec *tp) 263,265,263
|
||||
int clock_settime(clockid_t clk_id, const struct timespec *tp) 262,264,262
|
||||
int clock_getres(clockid_t clk_id, struct timespec *res) 264,266,264
|
||||
int clock_nanosleep(clockid_t clock_id, int flags, const struct timespec *req, struct timespec *rem) 265,267,265
|
||||
int getitimer(int, const struct itimerval *) 105
|
||||
int setitimer(int, const struct itimerval *, struct itimerval *) 104
|
||||
int __timer_create:timer_create(clockid_t clockid, struct sigevent *evp, timer_t *timerid) 257,259,257
|
||||
int __timer_settime:timer_settime(timer_t, int, const struct itimerspec*, struct itimerspec*) 258,260,258
|
||||
int __timer_gettime:timer_gettime(timer_t, struct itimerspec*) 259,261,259
|
||||
int __timer_getoverrun:timer_getoverrun(timer_t) 260,262,260
|
||||
int __timer_delete:timer_delete(timer_t) 261,263,261
|
||||
int utimes(const char*, const struct timeval tvp[2]) 269,271,267
|
||||
int utimensat(int, const char *, const struct timespec times[2], int) 348,320,316
|
||||
|
||||
# signals
|
||||
int sigaction(int, const struct sigaction *, struct sigaction *) 1
|
||||
int sigprocmask(int, const sigset_t *, sigset_t *) 1
|
||||
int __sigsuspend:sigsuspend(int unused1, int unused2, unsigned mask) 1,1,-1
|
||||
int __sigsuspend:sigsuspend(const sigset_t *mask) -1,-1,1
|
||||
int __rt_sigaction:rt_sigaction (int sig, const struct sigaction *act, struct sigaction *oact, size_t sigsetsize) 1
|
||||
int __rt_sigprocmask:rt_sigprocmask (int how, const sigset_t *set, sigset_t *oset, size_t sigsetsize) 1
|
||||
int __rt_sigtimedwait:rt_sigtimedwait(const sigset_t *set, struct siginfo_t *info, struct timespec_t *timeout, size_t sigset_size) 1
|
||||
int sigpending(sigset_t *) 1
|
||||
int signalfd4(int fd, const sigset_t *mask, size_t sizemask, int flags) 1
|
||||
int sigaction(int, const struct sigaction *, struct sigaction *) 67
|
||||
int sigprocmask(int, const sigset_t *, sigset_t *) 126
|
||||
int __sigsuspend:sigsuspend(int unused1, int unused2, unsigned mask) 72,72,-1
|
||||
int __sigsuspend:sigsuspend(const sigset_t *mask) -1,-1,72
|
||||
int __rt_sigaction:rt_sigaction (int sig, const struct sigaction *act, struct sigaction *oact, size_t sigsetsize) 174,174,194
|
||||
int __rt_sigprocmask:rt_sigprocmask (int how, const sigset_t *set, sigset_t *oset, size_t sigsetsize) 175,175,195
|
||||
int __rt_sigtimedwait:rt_sigtimedwait(const sigset_t *set, struct siginfo_t *info, struct timespec_t *timeout, size_t sigset_size) 177,177,197
|
||||
int sigpending(sigset_t *) 73
|
||||
|
||||
# sockets
|
||||
int socket(int, int, int) 1,-1,1
|
||||
int socketpair(int, int, int, int*) 1,-1,1
|
||||
int bind(int, struct sockaddr *, int) 1,-1,1
|
||||
int connect(int, struct sockaddr *, socklen_t) 1,-1,1
|
||||
int listen(int, int) 1,-1,1
|
||||
int accept(int, struct sockaddr *, socklen_t *) 1,-1,1
|
||||
int getsockname(int, struct sockaddr *, socklen_t *) 1,-1,1
|
||||
int getpeername(int, struct sockaddr *, socklen_t *) 1,-1,1
|
||||
int sendto(int, const void *, size_t, int, const struct sockaddr *, socklen_t) 1,-1,1
|
||||
int recvfrom(int, void *, size_t, unsigned int, struct sockaddr *, socklen_t *) 1,-1,1
|
||||
int shutdown(int, int) 1,-1,1
|
||||
int setsockopt(int, int, int, const void *, socklen_t) 1,-1,1
|
||||
int getsockopt(int, int, int, void *, socklen_t *) 1,-1,1
|
||||
int sendmsg(int, const struct msghdr *, unsigned int) 1,-1,1
|
||||
int recvmsg(int, struct msghdr *, unsigned int) 1,-1,1
|
||||
int socket(int, int, int) 281,-1,183
|
||||
int socketpair(int, int, int, int*) 288,-1,184
|
||||
int bind(int, struct sockaddr *, int) 282,-1,169
|
||||
int connect(int, struct sockaddr *, socklen_t) 283,-1,170
|
||||
int listen(int, int) 284,-1,174
|
||||
int accept(int, struct sockaddr *, socklen_t *) 285,-1,168
|
||||
int getsockname(int, struct sockaddr *, socklen_t *) 286,-1,172
|
||||
int getpeername(int, struct sockaddr *, socklen_t *) 287,-1,171
|
||||
int sendto(int, const void *, size_t, int, const struct sockaddr *, socklen_t) 290,-1,180
|
||||
int recvfrom(int, void *, size_t, unsigned int, struct sockaddr *, socklen_t *) 292,-1,176
|
||||
int shutdown(int, int) 293,-1,182
|
||||
int setsockopt(int, int, int, const void *, socklen_t) 294,-1,181
|
||||
int getsockopt(int, int, int, void *, socklen_t *) 295,-1,173
|
||||
int sendmsg(int, const struct msghdr *, unsigned int) 296,-1,179
|
||||
int recvmsg(int, struct msghdr *, unsigned int) 297,-1,177
|
||||
|
||||
# sockets for x86. These are done as an "indexed" call to socketcall syscall.
|
||||
int socket:socketcall:1 (int, int, int) -1,1,-1
|
||||
int bind:socketcall:2 (int, struct sockaddr *, int) -1,1,-1
|
||||
int connect:socketcall:3(int, struct sockaddr *, socklen_t) -1,1,-1
|
||||
int listen:socketcall:4(int, int) -1,1,-1
|
||||
int accept:socketcall:5(int, struct sockaddr *, socklen_t *) -1,1,-1
|
||||
int getsockname:socketcall:6(int, struct sockaddr *, socklen_t *) -1,1,-1
|
||||
int getpeername:socketcall:7(int, struct sockaddr *, socklen_t *) -1,1,-1
|
||||
int socketpair:socketcall:8(int, int, int, int*) -1,1,-1
|
||||
int sendto:socketcall:11(int, const void *, size_t, int, const struct sockaddr *, socklen_t) -1,1,-1
|
||||
int recvfrom:socketcall:12(int, void *, size_t, unsigned int, struct sockaddr *, socklen_t *) -1,1,-1
|
||||
int shutdown:socketcall:13(int, int) -1,1,-1
|
||||
int setsockopt:socketcall:14(int, int, int, const void *, socklen_t) -1,1,-1
|
||||
int getsockopt:socketcall:15(int, int, int, void *, socklen_t *) -1,1,-1
|
||||
int sendmsg:socketcall:16(int, const struct msghdr *, unsigned int) -1,1,-1
|
||||
int recvmsg:socketcall:17(int, struct msghdr *, unsigned int) -1,1,-1
|
||||
int socket:socketcall:1 (int, int, int) -1,102,-1
|
||||
int bind:socketcall:2 (int, struct sockaddr *, int) -1,102,-1
|
||||
int connect:socketcall:3(int, struct sockaddr *, socklen_t) -1,102,-1
|
||||
int listen:socketcall:4(int, int) -1,102,-1
|
||||
int accept:socketcall:5(int, struct sockaddr *, socklen_t *) -1,102,-1
|
||||
int getsockname:socketcall:6(int, struct sockaddr *, socklen_t *) -1,102,-1
|
||||
int getpeername:socketcall:7(int, struct sockaddr *, socklen_t *) -1,102,-1
|
||||
int socketpair:socketcall:8(int, int, int, int*) -1,102,-1
|
||||
int sendto:socketcall:11(int, const void *, size_t, int, const struct sockaddr *, socklen_t) -1,102,-1
|
||||
int recvfrom:socketcall:12(int, void *, size_t, unsigned int, struct sockaddr *, socklen_t *) -1,102,-1
|
||||
int shutdown:socketcall:13(int, int) -1,102,-1
|
||||
int setsockopt:socketcall:14(int, int, int, const void *, socklen_t) -1,102,-1
|
||||
int getsockopt:socketcall:15(int, int, int, void *, socklen_t *) -1,102,-1
|
||||
int sendmsg:socketcall:16(int, const struct msghdr *, unsigned int) -1,102,-1
|
||||
int recvmsg:socketcall:17(int, struct msghdr *, unsigned int) -1,102,-1
|
||||
|
||||
# scheduler & real-time
|
||||
int sched_setscheduler(pid_t pid, int policy, const struct sched_param *param) 1
|
||||
int sched_getscheduler(pid_t pid) 1
|
||||
int sched_yield(void) 1
|
||||
int sched_setparam(pid_t pid, const struct sched_param *param) 1
|
||||
int sched_getparam(pid_t pid, struct sched_param *param) 1
|
||||
int sched_get_priority_max(int policy) 1
|
||||
int sched_get_priority_min(int policy) 1
|
||||
int sched_rr_get_interval(pid_t pid, struct timespec *interval) 1
|
||||
int sched_setaffinity(pid_t pid, size_t setsize, const cpu_set_t* set) 1
|
||||
int __sched_getaffinity:sched_getaffinity(pid_t pid, size_t setsize, cpu_set_t* set) 1
|
||||
int __getcpu:getcpu(unsigned *cpu, unsigned *node, void *unused) 1
|
||||
int sched_setscheduler(pid_t pid, int policy, const struct sched_param *param) 156,156,160
|
||||
int sched_getscheduler(pid_t pid) 157,157,161
|
||||
int sched_yield(void) 158,158,162
|
||||
int sched_setparam(pid_t pid, const struct sched_param *param) 154,154,158
|
||||
int sched_getparam(pid_t pid, struct sched_param *param) 155,155,159
|
||||
int sched_get_priority_max(int policy) 159,159,163
|
||||
int sched_get_priority_min(int policy) 160,160,164
|
||||
int sched_rr_get_interval(pid_t pid, struct timespec *interval) 161,161,165
|
||||
int sched_setaffinity(pid_t pid, size_t setsize, const cpu_set_t* set) 241,241,239
|
||||
int __sched_getaffinity:sched_getaffinity(pid_t pid, size_t setsize, cpu_set_t* set) 242,242,240
|
||||
int __getcpu:getcpu(unsigned *cpu, unsigned *node, void *unused) 345,318,312
|
||||
|
||||
# io priorities
|
||||
int ioprio_set(int which, int who, int ioprio) 1
|
||||
int ioprio_get(int which, int who) 1
|
||||
int ioprio_set(int which, int who, int ioprio) 314,289,314
|
||||
int ioprio_get(int which, int who) 315,290,315
|
||||
|
||||
# other
|
||||
int uname(struct utsname *) 1
|
||||
mode_t umask(mode_t) 1
|
||||
int __reboot:reboot(int, int, int, void *) 1
|
||||
int __syslog:syslog(int, char *, int) 1
|
||||
int init_module(void *, unsigned long, const char *) 1
|
||||
int delete_module(const char*, unsigned int) 1
|
||||
int klogctl:syslog(int, char *, int) 1
|
||||
int sysinfo(struct sysinfo *) 1
|
||||
int personality(unsigned long) 1
|
||||
long perf_event_open(struct perf_event_attr *attr_uptr, pid_t pid, int cpu, int group_fd, unsigned long flags) 1
|
||||
int uname(struct utsname *) 122
|
||||
pid_t __wait4:wait4(pid_t pid, int *status, int options, struct rusage *rusage) 114
|
||||
mode_t umask(mode_t) 60
|
||||
int __reboot:reboot(int, int, int, void *) 88
|
||||
int __syslog:syslog(int, char *, int) 103
|
||||
int init_module(void *, unsigned long, const char *) 128
|
||||
int delete_module(const char*, unsigned int) 129
|
||||
int klogctl:syslog(int, char *, int) 103
|
||||
int sysinfo(struct sysinfo *) 116
|
||||
int personality(unsigned long) 136
|
||||
long perf_event_open(struct perf_event_attr *attr_uptr, pid_t pid, int cpu, int group_fd, unsigned long flags) 364
|
||||
|
||||
# futex
|
||||
int futex(void *, int, int, void *, void *, int) 1
|
||||
int futex(void *, int, int, void *, void *, int) 240,240,238
|
||||
|
||||
# epoll
|
||||
int epoll_create(int size) 1
|
||||
int epoll_ctl(int epfd, int op, int fd, struct epoll_event *event) 1
|
||||
int epoll_wait(int epfd, struct epoll_event *events, int max, int timeout) 1
|
||||
int epoll_create(int size) 250,254,248
|
||||
int epoll_ctl(int epfd, int op, int fd, struct epoll_event *event) 251,255,249
|
||||
int epoll_wait(int epfd, struct epoll_event *events, int max, int timeout) 252,256,250
|
||||
|
||||
int inotify_init(void) 1
|
||||
int inotify_add_watch(int, const char *, unsigned int) 1
|
||||
int inotify_rm_watch(int, unsigned int) 1
|
||||
int inotify_init(void) 316,291,284
|
||||
int inotify_add_watch(int, const char *, unsigned int) 317,292,285
|
||||
int inotify_rm_watch(int, unsigned int) 318,293,286
|
||||
|
||||
int poll(struct pollfd *, unsigned int, long) 1
|
||||
int poll(struct pollfd *, unsigned int, long) 168,168,188
|
||||
|
||||
int eventfd:eventfd2(unsigned int, int) 1
|
||||
int eventfd:eventfd2(unsigned int, int) 356,328,325
|
||||
|
||||
# ARM-specific ARM_NR_BASE == 0x0f0000 == 983040
|
||||
int __set_tls:__ARM_NR_set_tls(void*) 1,-1,-1
|
||||
int cacheflush:__ARM_NR_cacheflush(long start, long end, long flags) 1,-1,-1
|
||||
int __set_tls:ARM_set_tls(void*) 983045,-1,-1
|
||||
int cacheflush:ARM_cacheflush(long start, long end, long flags) 983042,-1,-1
|
||||
|
||||
# MIPS-specific
|
||||
int _flush_cache:cacheflush(char *addr, const int nbytes, const int op) -1,-1,1
|
||||
int syscall(int number,...) -1,-1,1
|
||||
int _flush_cache:cacheflush(char *addr, const int nbytes, const int op) -1,-1,147
|
||||
int syscall(int number,...) -1,-1,0
|
||||
|
||||
@@ -1,35 +0,0 @@
|
||||
_LIBC_ARCH_COMMON_SRC_FILES := \
|
||||
arch-arm/bionic/abort_arm.S \
|
||||
arch-arm/bionic/atomics_arm.c \
|
||||
arch-arm/bionic/clone.S \
|
||||
arch-arm/bionic/eabi.c \
|
||||
arch-arm/bionic/_exit_with_stack_teardown.S \
|
||||
arch-arm/bionic/ffs.S \
|
||||
arch-arm/bionic/futex_arm.S \
|
||||
arch-arm/bionic/__get_sp.S \
|
||||
arch-arm/bionic/kill.S \
|
||||
arch-arm/bionic/libgcc_compat.c \
|
||||
arch-arm/bionic/memcmp16.S \
|
||||
arch-arm/bionic/memcmp.S \
|
||||
arch-arm/bionic/_setjmp.S \
|
||||
arch-arm/bionic/setjmp.S \
|
||||
arch-arm/bionic/sigsetjmp.S \
|
||||
arch-arm/bionic/strcpy.S \
|
||||
arch-arm/bionic/strlen.c.arm \
|
||||
arch-arm/bionic/syscall.S \
|
||||
arch-arm/bionic/tgkill.S \
|
||||
arch-arm/bionic/tkill.S \
|
||||
|
||||
# These are used by the static and dynamic versions of the libc
|
||||
# respectively.
|
||||
_LIBC_ARCH_STATIC_SRC_FILES := \
|
||||
arch-arm/bionic/exidx_static.c
|
||||
|
||||
_LIBC_ARCH_DYNAMIC_SRC_FILES := \
|
||||
arch-arm/bionic/exidx_dynamic.c
|
||||
|
||||
ifeq ($(strip $(wildcard bionic/libc/arch-arm/$(TARGET_CPU_VARIANT)/$(TARGET_CPU_VARIANT).mk)),)
|
||||
$(error "TARGET_CPU_VARIANT not set or set to an unknown value. Possible values are cortex-a9, cortex-a15, krait. Use generic for devices that do not have a CPU similar to any of the supported cpu variants.")
|
||||
endif
|
||||
|
||||
include bionic/libc/arch-arm/$(TARGET_CPU_VARIANT)/$(TARGET_CPU_VARIANT).mk
|
||||
@@ -25,10 +25,10 @@
|
||||
* OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
|
||||
* SUCH DAMAGE.
|
||||
*/
|
||||
.global __get_sp
|
||||
.type __get_sp, %function
|
||||
|
||||
#include <machine/asm.h>
|
||||
__get_sp:
|
||||
mov r0, sp
|
||||
bx lr
|
||||
|
||||
ENTRY(__get_sp)
|
||||
mov r0, sp
|
||||
bx lr
|
||||
END(__get_sp)
|
||||
|
||||
@@ -25,20 +25,27 @@
|
||||
* OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
|
||||
* SUCH DAMAGE.
|
||||
*/
|
||||
|
||||
#include <machine/asm.h>
|
||||
#include <asm/unistd.h>
|
||||
#include <machine/asm.h>
|
||||
|
||||
// void _exit_with_stack_teardown(void* stackBase, int stackSize, int retCode)
|
||||
@ void _exit_with_stack_teardown(void * stackBase, int stackSize, int retCode)
|
||||
ENTRY(_exit_with_stack_teardown)
|
||||
|
||||
#if __ARM_EABI__
|
||||
mov lr, r2
|
||||
ldr r7, =__NR_munmap
|
||||
swi #0 // the stack is destroyed by this call
|
||||
swi #0 @ the stack is destroyed by this call
|
||||
mov r0, lr
|
||||
ldr r7, =__NR_exit
|
||||
swi #0
|
||||
#else
|
||||
mov lr, r2
|
||||
swi # __NR_munmap @ the stack is destroyed by this call
|
||||
mov r0, lr
|
||||
swi # __NR_exit
|
||||
#endif
|
||||
|
||||
// exit() should never return, cause a crash if it does
|
||||
mov r0, #0
|
||||
ldr r0, [r0]
|
||||
@ exit() should never return, cause a crash if it does
|
||||
mov r0, #0
|
||||
ldr r0, [r0]
|
||||
END(_exit_with_stack_teardown)
|
||||
|
||||
@@ -27,7 +27,7 @@
|
||||
*/
|
||||
|
||||
#include <sys/types.h>
|
||||
#include <private/libc_logging.h>
|
||||
#include <private/logd.h>
|
||||
#include <stdio.h>
|
||||
|
||||
/*
|
||||
@@ -50,9 +50,10 @@ atexit(void (*func)(void))
|
||||
* calling library may have been dlclose()'d, causing the program to
|
||||
* crash.
|
||||
*/
|
||||
static char const warning[] = "WARNING: generic atexit() called from legacy shared library\n";
|
||||
static char const warning[] =
|
||||
"WARNING: generic atexit() called from legacy shared library\n";
|
||||
|
||||
__libc_format_log(ANDROID_LOG_WARN, "libc", warning);
|
||||
__libc_android_log_print(ANDROID_LOG_WARN, "libc", warning);
|
||||
fprintf(stderr, warning);
|
||||
|
||||
return (__cxa_atexit((void (*)(void *))func, NULL, NULL));
|
||||
|
||||
@@ -25,42 +25,47 @@
|
||||
* OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
|
||||
* SUCH DAMAGE.
|
||||
*/
|
||||
|
||||
#include <linux/err.h>
|
||||
#include <sys/linux-syscalls.h>
|
||||
#include <machine/asm.h>
|
||||
#include <asm/unistd.h>
|
||||
|
||||
// int __pthread_clone(void* (*fn)(void*), void* child_stack, int flags, void* arg);
|
||||
ENTRY(__pthread_clone)
|
||||
# Copy the args onto the new stack.
|
||||
stmdb r1!, {r0, r3}
|
||||
@ insert the args onto the new stack
|
||||
stmdb r1!, {r0, r3}
|
||||
|
||||
@ do the system call
|
||||
@ get flags
|
||||
|
||||
# The sys_clone system call only takes two arguments: 'flags' and 'child_stack'.
|
||||
# 'child_stack' is already in r1, but we need to move 'flags' into position.
|
||||
mov r0, r2
|
||||
stmfd sp!, {r4, r7}
|
||||
|
||||
# System call.
|
||||
@ new sp is already in r1
|
||||
|
||||
#if __ARM_EABI__
|
||||
stmfd sp!, {r4, r7}
|
||||
ldr r7, =__NR_clone
|
||||
swi #0
|
||||
#else
|
||||
swi #__NR_clone
|
||||
#endif
|
||||
|
||||
movs r0, r0
|
||||
beq 1f
|
||||
#if __ARM_EABI__
|
||||
ldmnefd sp!, {r4, r7}
|
||||
#endif
|
||||
blt __error
|
||||
bxne lr
|
||||
|
||||
# In parent, reload saved registers then either return or set errno.
|
||||
ldmfd sp!, {r4, r7}
|
||||
cmn r0, #(MAX_ERRNO + 1)
|
||||
bxls lr
|
||||
neg r0, r0
|
||||
b __set_errno
|
||||
|
||||
1: # The child.
|
||||
# pick the function arg and call address off the stack and jump
|
||||
# to the C __thread_entry function which does some setup and then
|
||||
# calls the thread's start function
|
||||
@ pick the function arg and call address off the stack and jump
|
||||
@ to the C __thread_entry function which does some setup and then
|
||||
@ calls the thread's start function
|
||||
|
||||
pop {r0, r1}
|
||||
# __thread_entry needs the TLS pointer
|
||||
mov r2, sp
|
||||
mov r2, sp @ __thread_entry needs the TLS pointer
|
||||
b __thread_entry
|
||||
|
||||
__error:
|
||||
mov r0, #-1
|
||||
bx lr
|
||||
END(__pthread_clone)
|
||||
|
||||
|
||||
@@ -71,8 +76,8 @@ END(__pthread_clone)
|
||||
# pid_t *pid, void *tls, pid_t *ctid,
|
||||
# int (*fn)(void *), void* arg );
|
||||
#
|
||||
# NOTE: This is not the same signature as the glibc
|
||||
# __clone function. Placing 'fn' and 'arg'
|
||||
# NOTE: This is not the same signature than the GLibc
|
||||
# __clone function here !! Placing 'fn' and 'arg'
|
||||
# at the end of the parameter list makes the
|
||||
# implementation much simpler.
|
||||
#
|
||||
@@ -91,20 +96,20 @@ ENTRY(__bionic_clone)
|
||||
str r5, [r1, #-4]
|
||||
str r6, [r1, #-8]
|
||||
|
||||
# System call
|
||||
# system call
|
||||
ldr r7, =__NR_clone
|
||||
swi #0
|
||||
movs r0, r0
|
||||
beq 1f
|
||||
|
||||
# In the parent, reload saved registers then either return or set errno.
|
||||
# in parent, reload saved registers
|
||||
# then either exit or error
|
||||
#
|
||||
ldmfd sp!, {r4, r5, r6, r7}
|
||||
cmn r0, #(MAX_ERRNO + 1)
|
||||
bxls lr
|
||||
neg r0, r0
|
||||
b __set_errno
|
||||
bxne lr
|
||||
b __set_syscall_errno
|
||||
|
||||
1: # The child.
|
||||
1: # in the child - pick arguments
|
||||
ldr r0, [sp, #-4]
|
||||
ldr r1, [sp, #-8]
|
||||
b __bionic_clone_entry
|
||||
|
||||
@@ -26,9 +26,21 @@
|
||||
* SUCH DAMAGE.
|
||||
*/
|
||||
|
||||
#include "../../bionic/libc_init_common.h"
|
||||
#include <stddef.h>
|
||||
#include <stdint.h>
|
||||
typedef struct
|
||||
{
|
||||
void (**preinit_array)(void);
|
||||
void (**init_array)(void);
|
||||
void (**fini_array)(void);
|
||||
} structors_array_t;
|
||||
|
||||
extern int main(int argc, char **argv, char **env);
|
||||
|
||||
extern void __libc_init(
|
||||
unsigned int *elfdata,
|
||||
void (*onexit)(void),
|
||||
int (*slingshot)(int, char**, char**),
|
||||
structors_array_t const * const structors
|
||||
);
|
||||
|
||||
__attribute__ ((section (".preinit_array")))
|
||||
void (*__PREINIT_ARRAY__)(void) = (void (*)(void)) -1;
|
||||
@@ -39,14 +51,17 @@ void (*__INIT_ARRAY__)(void) = (void (*)(void)) -1;
|
||||
__attribute__ ((section (".fini_array")))
|
||||
void (*__FINI_ARRAY__)(void) = (void (*)(void)) -1;
|
||||
|
||||
__LIBC_HIDDEN__ void _start() {
|
||||
__attribute__((visibility("hidden")))
|
||||
void _start() {
|
||||
structors_array_t array;
|
||||
array.preinit_array = &__PREINIT_ARRAY__;
|
||||
array.init_array = &__INIT_ARRAY__;
|
||||
array.fini_array = &__FINI_ARRAY__;
|
||||
void *elfdata;
|
||||
|
||||
void* raw_args = (void*) ((uintptr_t) __builtin_frame_address(0) + sizeof(void*));
|
||||
__libc_init(raw_args, NULL, &main, &array);
|
||||
array.preinit_array = &__PREINIT_ARRAY__;
|
||||
array.init_array = &__INIT_ARRAY__;
|
||||
array.fini_array = &__FINI_ARRAY__;
|
||||
|
||||
elfdata = __builtin_frame_address(0) + sizeof(void *);
|
||||
__libc_init(elfdata, (void *) 0, &main, &array);
|
||||
}
|
||||
|
||||
#include "__dso_handle.h"
|
||||
|
||||
@@ -31,11 +31,55 @@
|
||||
#include <machine/asm.h>
|
||||
#include <machine/cpu-features.h>
|
||||
|
||||
/*
|
||||
* ffs - find first set bit, this algorithm isolates the first set
|
||||
* bit, then multiplies the number by 0x0450fbaf which leaves the top
|
||||
* 6 bits as an index into the table. This algorithm should be a win
|
||||
* over the checking each bit in turn as per the C compiled version.
|
||||
*
|
||||
* Some newer ARM architectures have an instruction named
|
||||
* CLZ (count leading Zero's) that is used
|
||||
*
|
||||
* This is the ffs algorithm devised by d.seal and posted to comp.sys.arm on
|
||||
* 16 Feb 1994.
|
||||
*/
|
||||
|
||||
ENTRY(ffs)
|
||||
/* Standard trick to isolate bottom bit in r0 or 0 if r0 = 0 on entry */
|
||||
rsb r1, r0, #0
|
||||
ands r0, r0, r1
|
||||
#ifndef __ARM_HAVE_CLZ
|
||||
/*
|
||||
* now r0 has at most one set bit, call this X
|
||||
* if X = 0, all further instructions are skipped
|
||||
*/
|
||||
adrne r2, .L_ffs_table
|
||||
orrne r0, r0, r0, lsl #4 /* r0 = X * 0x11 */
|
||||
orrne r0, r0, r0, lsl #6 /* r0 = X * 0x451 */
|
||||
rsbne r0, r0, r0, lsl #16 /* r0 = X * 0x0450fbaf */
|
||||
|
||||
/* now lookup in table indexed on top 6 bits of r0 */
|
||||
ldrneb r0, [ r2, r0, lsr #26 ]
|
||||
|
||||
bx lr
|
||||
END(ffs)
|
||||
|
||||
.text;
|
||||
.type .L_ffs_table, _ASM_TYPE_OBJECT;
|
||||
.L_ffs_table:
|
||||
/* 0 1 2 3 4 5 6 7 */
|
||||
.byte 0, 1, 2, 13, 3, 7, 0, 14 /* 0- 7 */
|
||||
.byte 4, 0, 8, 0, 0, 0, 0, 15 /* 8-15 */
|
||||
.byte 11, 5, 0, 0, 9, 0, 0, 26 /* 16-23 */
|
||||
.byte 0, 0, 0, 0, 0, 22, 28, 16 /* 24-31 */
|
||||
.byte 32, 12, 6, 0, 0, 0, 0, 0 /* 32-39 */
|
||||
.byte 10, 0, 0, 25, 0, 0, 21, 27 /* 40-47 */
|
||||
.byte 31, 0, 0, 0, 0, 24, 0, 20 /* 48-55 */
|
||||
.byte 30, 0, 23, 19, 29, 18, 17, 0 /* 56-63 */
|
||||
#else /* !defined(__ARM_HAVE_CLZ) */
|
||||
clzne r0, r0
|
||||
rsbne r0, r0, #32
|
||||
bx lr
|
||||
END(ffs)
|
||||
#endif /* !defined(__ARM_HAVE_CLZ) */
|
||||
|
||||
|
||||
@@ -25,14 +25,32 @@
|
||||
* OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
|
||||
* SUCH DAMAGE.
|
||||
*/
|
||||
|
||||
#include <asm/unistd.h>
|
||||
#include <sys/linux-syscalls.h>
|
||||
#include <machine/asm.h>
|
||||
#include <machine/cpu-features.h>
|
||||
|
||||
#define FUTEX_WAIT 0
|
||||
#define FUTEX_WAKE 1
|
||||
|
||||
// __futex_syscall3(*ftx, op, val)
|
||||
/* __futex_wait(*ftx, val, *timespec) */
|
||||
/* __futex_wake(*ftx, counter) */
|
||||
/* __futex_syscall3(*ftx, op, val) */
|
||||
/* __futex_syscall4(*ftx, op, val, *timespec) */
|
||||
|
||||
.global __futex_wait
|
||||
.type __futex_wait, %function
|
||||
|
||||
.global __futex_wake
|
||||
.type __futex_wake, %function
|
||||
|
||||
.global __futex_syscall3
|
||||
.type __futex_syscall3, %function
|
||||
|
||||
.global __futex_syscall4
|
||||
.type __futex_syscall4, %function
|
||||
|
||||
#if __ARM_EABI__
|
||||
|
||||
ENTRY(__futex_syscall3)
|
||||
stmdb sp!, {r4, r7}
|
||||
.save {r4, r7}
|
||||
@@ -42,12 +60,6 @@ ENTRY(__futex_syscall3)
|
||||
bx lr
|
||||
END(__futex_syscall3)
|
||||
|
||||
// __futex_syscall4(*ftx, op, val, *timespec)
|
||||
ENTRY(__futex_syscall4)
|
||||
b __futex_syscall3
|
||||
END(__futex_syscall4)
|
||||
|
||||
// __futex_wait(*ftx, val, *timespec)
|
||||
ENTRY(__futex_wait)
|
||||
stmdb sp!, {r4, r7}
|
||||
.save {r4, r7}
|
||||
@@ -60,7 +72,6 @@ ENTRY(__futex_wait)
|
||||
bx lr
|
||||
END(__futex_wait)
|
||||
|
||||
// __futex_wake(*ftx, counter)
|
||||
ENTRY(__futex_wake)
|
||||
.save {r4, r7}
|
||||
stmdb sp!, {r4, r7}
|
||||
@@ -71,3 +82,31 @@ ENTRY(__futex_wake)
|
||||
ldmia sp!, {r4, r7}
|
||||
bx lr
|
||||
END(__futex_wake)
|
||||
|
||||
#else
|
||||
|
||||
ENTRY(__futex_syscall3)
|
||||
swi #__NR_futex
|
||||
bx lr
|
||||
END(__futex_syscall3)
|
||||
|
||||
ENTRY(__futex_wait)
|
||||
mov r3, r2
|
||||
mov r2, r1
|
||||
mov r1, #FUTEX_WAIT
|
||||
swi #__NR_futex
|
||||
bx lr
|
||||
END(__futex_wait)
|
||||
|
||||
ENTRY(__futex_wake)
|
||||
mov r2, r1
|
||||
mov r1, #FUTEX_WAKE
|
||||
swi #__NR_futex
|
||||
bx lr
|
||||
END(__futex_wake)
|
||||
|
||||
#endif
|
||||
|
||||
ENTRY(__futex_syscall4)
|
||||
b __futex_syscall3
|
||||
END(__futex_syscall4)
|
||||
|
||||
@@ -25,11 +25,6 @@
|
||||
* OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
|
||||
* SUCH DAMAGE.
|
||||
*/
|
||||
|
||||
#include <linux/err.h>
|
||||
#include <asm/unistd.h>
|
||||
#include <machine/asm.h>
|
||||
|
||||
/* unlike our auto-generated syscall stubs, this code saves lr
|
||||
on the stack, as well as a few other registers. this makes
|
||||
our stack unwinder happy, when we generate debug stack
|
||||
@@ -37,14 +32,19 @@
|
||||
abort due to a fatal runtime error (e.g. detection
|
||||
of a corrupted malloc heap).
|
||||
*/
|
||||
#include <sys/linux-syscalls.h>
|
||||
#include <machine/asm.h>
|
||||
|
||||
#ifndef __NR_kill
|
||||
#define __NR_kill 37
|
||||
#endif
|
||||
|
||||
ENTRY(kill)
|
||||
stmfd sp!, {r4-r7, ip, lr}
|
||||
ldr r7, =__NR_kill
|
||||
swi #0
|
||||
ldmfd sp!, {r4-r7, ip, lr}
|
||||
cmn r0, #(MAX_ERRNO + 1)
|
||||
bxls lr
|
||||
neg r0, r0
|
||||
b __set_errno
|
||||
movs r0, r0
|
||||
bxpl lr
|
||||
b __set_syscall_errno
|
||||
END(kill)
|
||||
|
||||
@@ -110,7 +110,6 @@
|
||||
XX(__aeabi_fsub) \
|
||||
XX(__aeabi_i2d) \
|
||||
XX(__aeabi_i2f) \
|
||||
XX(__aeabi_idiv) \
|
||||
XX(__aeabi_l2d) \
|
||||
XX(__aeabi_l2f) \
|
||||
XX(__aeabi_lmul) \
|
||||
|
||||
@@ -29,93 +29,44 @@
|
||||
#include <machine/cpu-features.h>
|
||||
#include <machine/asm.h>
|
||||
|
||||
|
||||
#ifdef HAVE_32_BYTE_CACHE_LINE
|
||||
#define CACHE_LINE_SIZE 32
|
||||
#else
|
||||
#define CACHE_LINE_SIZE 64
|
||||
#endif
|
||||
|
||||
/*
|
||||
* Optimized memcmp() for Cortex-A9.
|
||||
* Optimized memcmp() for ARM9.
|
||||
* This would not be optimal on XScale or ARM11, where more prefetching
|
||||
* and use of PLD will be needed.
|
||||
* The 2 major optimzations here are
|
||||
* (1) The main loop compares 16 bytes at a time
|
||||
* (2) The loads are scheduled in a way they won't stall
|
||||
*/
|
||||
|
||||
ENTRY(memcmp)
|
||||
pld [r0, #(CACHE_LINE_SIZE * 0)]
|
||||
pld [r0, #(CACHE_LINE_SIZE * 1)]
|
||||
PLD (r0, #0)
|
||||
PLD (r1, #0)
|
||||
|
||||
/* take of the case where length is 0 or the buffers are the same */
|
||||
cmp r0, r1
|
||||
cmpne r2, #0
|
||||
moveq r0, #0
|
||||
bxeq lr
|
||||
|
||||
pld [r1, #(CACHE_LINE_SIZE * 0)]
|
||||
pld [r1, #(CACHE_LINE_SIZE * 1)]
|
||||
|
||||
/* make sure we have at least 8+4 bytes, this simplify things below
|
||||
* and avoid some overhead for small blocks
|
||||
*/
|
||||
cmp r2, #(8+4)
|
||||
bmi 10f
|
||||
/*
|
||||
* Neon optimization
|
||||
* Comparing 32 bytes at a time
|
||||
*/
|
||||
#if defined(__ARM_NEON__) && defined(NEON_UNALIGNED_ACCESS)
|
||||
subs r2, r2, #32
|
||||
blo 3f
|
||||
|
||||
/* preload all the cache lines we need. */
|
||||
pld [r0, #(CACHE_LINE_SIZE * 2)]
|
||||
pld [r1, #(CACHE_LINE_SIZE * 2)]
|
||||
|
||||
1: /* The main loop compares 32 bytes at a time */
|
||||
vld1.8 {d0 - d3}, [r0]!
|
||||
pld [r0, #(CACHE_LINE_SIZE * 2)]
|
||||
vld1.8 {d4 - d7}, [r1]!
|
||||
pld [r1, #(CACHE_LINE_SIZE * 2)]
|
||||
|
||||
/* Start subtracting the values and merge results */
|
||||
vsub.i8 q0, q2
|
||||
vsub.i8 q1, q3
|
||||
vorr q2, q0, q1
|
||||
vorr d4, d5
|
||||
vmov r3, ip, d4
|
||||
/* Check if there are any differences among the 32 bytes */
|
||||
orrs r3, ip
|
||||
bne 2f
|
||||
subs r2, r2, #32
|
||||
bhs 1b
|
||||
b 3f
|
||||
2:
|
||||
/* Check if the difference was in the first or last 16 bytes */
|
||||
sub r0, #32
|
||||
vorr d0, d1
|
||||
sub r1, #32
|
||||
vmov r3, ip, d0
|
||||
orrs r3, ip
|
||||
/* if the first 16 bytes are equal, we only have to rewind 16 bytes */
|
||||
ittt eq
|
||||
subeq r2, #16
|
||||
addeq r0, #16
|
||||
addeq r1, #16
|
||||
|
||||
3: /* fix-up the remaining count */
|
||||
add r2, r2, #32
|
||||
|
||||
cmp r2, #(8+4)
|
||||
bmi 10f
|
||||
#endif
|
||||
|
||||
.save {r4, lr}
|
||||
/* save registers */
|
||||
stmfd sp!, {r4, lr}
|
||||
|
||||
PLD (r0, #32)
|
||||
PLD (r1, #32)
|
||||
|
||||
/* since r0 hold the result, move the first source
|
||||
* pointer somewhere else
|
||||
*/
|
||||
|
||||
mov r4, r0
|
||||
|
||||
|
||||
/* make sure we have at least 8+4 bytes, this simplify things below
|
||||
* and avoid some overhead for small blocks
|
||||
*/
|
||||
cmp r2, #(8+4)
|
||||
bmi 8f
|
||||
|
||||
/* align first pointer to word boundary
|
||||
* offset = -src & 3
|
||||
*/
|
||||
@@ -151,9 +102,9 @@ ENTRY(memcmp)
|
||||
ldr ip, [r1]
|
||||
subs r2, r2, #(32 + 4)
|
||||
bmi 1f
|
||||
|
||||
0: pld [r4, #(CACHE_LINE_SIZE * 2)]
|
||||
pld [r1, #(CACHE_LINE_SIZE * 2)]
|
||||
|
||||
0: PLD (r4, #64)
|
||||
PLD (r1, #64)
|
||||
ldr r0, [r4], #4
|
||||
ldr lr, [r1, #4]!
|
||||
eors r0, r0, ip
|
||||
@@ -178,14 +129,14 @@ ENTRY(memcmp)
|
||||
ldreq r0, [r4], #4
|
||||
ldreq ip, [r1, #4]!
|
||||
eoreqs r0, r0, lr
|
||||
bne 2f
|
||||
bne 2f
|
||||
subs r2, r2, #32
|
||||
bhs 0b
|
||||
|
||||
/* do we have at least 4 bytes left? */
|
||||
1: adds r2, r2, #(32 - 4 + 4)
|
||||
bmi 4f
|
||||
|
||||
|
||||
/* finish off 4 bytes at a time */
|
||||
3: ldr r0, [r4], #4
|
||||
ldr ip, [r1], #4
|
||||
@@ -219,28 +170,19 @@ ENTRY(memcmp)
|
||||
9: /* restore registers and return */
|
||||
ldmfd sp!, {r4, lr}
|
||||
bx lr
|
||||
END(memcmp)
|
||||
|
||||
|
||||
|
||||
|
||||
10: /* process less than 12 bytes */
|
||||
cmp r2, #0
|
||||
moveq r0, #0
|
||||
bxeq lr
|
||||
mov r3, r0
|
||||
11:
|
||||
ldrb r0, [r3], #1
|
||||
ldrb ip, [r1], #1
|
||||
subs r0, ip
|
||||
bxne lr
|
||||
subs r2, r2, #1
|
||||
bne 11b
|
||||
bx lr
|
||||
|
||||
5: /*************** non-congruent case ***************/
|
||||
and r0, r1, #3
|
||||
and r0, r1, #3
|
||||
cmp r0, #2
|
||||
bne 4f
|
||||
|
||||
/* here, offset is 2 (16-bits aligned, special cased) */
|
||||
|
||||
|
||||
/* make sure we have at least 16 bytes to process */
|
||||
subs r2, r2, #16
|
||||
addmi r2, r2, #16
|
||||
@@ -250,8 +192,8 @@ ENTRY(memcmp)
|
||||
bic r1, r1, #3
|
||||
ldr lr, [r1], #4
|
||||
|
||||
6: pld [r1, #(CACHE_LINE_SIZE * 2)]
|
||||
pld [r4, #(CACHE_LINE_SIZE * 2)]
|
||||
6: PLD (r1, #64)
|
||||
PLD (r4, #64)
|
||||
mov ip, lr, lsr #16
|
||||
ldr lr, [r1], #4
|
||||
ldr r0, [r4], #4
|
||||
@@ -338,4 +280,3 @@ ENTRY(memcmp)
|
||||
mov r2, #4
|
||||
ldmfd sp!, {r5, r6, r7}
|
||||
b 8b
|
||||
END(memcmp)
|
||||
|
||||
@@ -37,35 +37,28 @@
|
||||
#ifdef HAVE_32_BYTE_CACHE_LINE
|
||||
/* a prefetch distance of 2 cache-lines */
|
||||
#define CACHE_LINE_SIZE 32
|
||||
#define PREFETCH_DISTANCE (CACHE_LINE_SIZE*2)
|
||||
#else
|
||||
/* a prefetch distance of 4 cache-lines works best experimentally */
|
||||
#define CACHE_LINE_SIZE 64
|
||||
#define PREFETCH_DISTANCE (CACHE_LINE_SIZE*4)
|
||||
#endif
|
||||
|
||||
ENTRY(memcpy)
|
||||
.save {r0, lr}
|
||||
/* start preloading as early as possible */
|
||||
pld [r1, #(CACHE_LINE_SIZE * 0)]
|
||||
pld [r1, #(CACHE_LINE_SIZE*0)]
|
||||
stmfd sp!, {r0, lr}
|
||||
pld [r1, #(CACHE_LINE_SIZE * 1)]
|
||||
pld [r1, #(CACHE_LINE_SIZE*1)]
|
||||
|
||||
/* If Neon supports unaligned access then remove the align code,
|
||||
* unless a size limit has been specified.
|
||||
*/
|
||||
#ifndef NEON_UNALIGNED_ACCESS
|
||||
/* do we have at least 16-bytes to copy (needed for alignment below) */
|
||||
cmp r2, #16
|
||||
blo 5f
|
||||
|
||||
/* check if buffers are aligned. If so, run arm-only version */
|
||||
eor r3, r0, r1
|
||||
ands r3, r3, #0x3
|
||||
beq 11f
|
||||
|
||||
/* align destination to cache-line for the write-buffer */
|
||||
rsb r3, r0, #0
|
||||
ands r3, r3, #0xF
|
||||
beq 2f
|
||||
beq 0f
|
||||
|
||||
/* copy up to 15-bytes (count in r3) */
|
||||
sub r2, r2, r3
|
||||
@@ -86,9 +79,10 @@ ENTRY(memcpy)
|
||||
vld1.8 {d0}, [r1]!
|
||||
vst1.8 {d0}, [r0, :64]!
|
||||
2:
|
||||
/* preload immediately the next cache line, which we may need */
|
||||
pld [r1, #(CACHE_LINE_SIZE * 0)]
|
||||
pld [r1, #(CACHE_LINE_SIZE * 1)]
|
||||
|
||||
0: /* preload immediately the next cache line, which we may need */
|
||||
pld [r1, #(CACHE_LINE_SIZE*0)]
|
||||
pld [r1, #(CACHE_LINE_SIZE*1)]
|
||||
|
||||
#ifdef HAVE_32_BYTE_CACHE_LINE
|
||||
/* make sure we have at least 32 bytes to copy */
|
||||
@@ -114,22 +108,23 @@ ENTRY(memcpy)
|
||||
subs r2, r2, #64
|
||||
blo 2f
|
||||
|
||||
/* preload all the cache lines we need. */
|
||||
pld [r1, #(CACHE_LINE_SIZE * 2)]
|
||||
pld [r1, #(CACHE_LINE_SIZE * 3)]
|
||||
/* preload all the cache lines we need.
|
||||
* NOTE: the number of pld below depends on PREFETCH_DISTANCE,
|
||||
* ideally would would increase the distance in the main loop to
|
||||
* avoid the goofy code below. In practice this doesn't seem to make
|
||||
* a big difference.
|
||||
*/
|
||||
pld [r1, #(CACHE_LINE_SIZE*2)]
|
||||
pld [r1, #(CACHE_LINE_SIZE*3)]
|
||||
pld [r1, #(PREFETCH_DISTANCE)]
|
||||
|
||||
1: /* The main loop copies 64 bytes at a time */
|
||||
vld1.8 {d0 - d3}, [r1]!
|
||||
vld1.8 {d4 - d7}, [r1]!
|
||||
#ifdef HAVE_32_BYTE_CACHE_LINE
|
||||
pld [r1, #(CACHE_LINE_SIZE * 2)]
|
||||
pld [r1, #(CACHE_LINE_SIZE * 3)]
|
||||
#else
|
||||
pld [r1, #(CACHE_LINE_SIZE * 3)]
|
||||
#endif
|
||||
vld1.8 {d0 - d3}, [r1]!
|
||||
vld1.8 {d4 - d7}, [r1]!
|
||||
pld [r1, #(PREFETCH_DISTANCE)]
|
||||
subs r2, r2, #64
|
||||
vst1.8 {d0 - d3}, [r0, :128]!
|
||||
vst1.8 {d4 - d7}, [r0, :128]!
|
||||
vst1.8 {d0 - d3}, [r0, :128]!
|
||||
vst1.8 {d4 - d7}, [r0, :128]!
|
||||
bhs 1b
|
||||
|
||||
2: /* fix-up the remaining count and make sure we have >= 32 bytes left */
|
||||
@@ -138,9 +133,9 @@ ENTRY(memcpy)
|
||||
blo 4f
|
||||
|
||||
3: /* 32 bytes at a time. These cache lines were already preloaded */
|
||||
vld1.8 {d0 - d3}, [r1]!
|
||||
vld1.8 {d0 - d3}, [r1]!
|
||||
subs r2, r2, #32
|
||||
vst1.8 {d0 - d3}, [r0, :128]!
|
||||
vst1.8 {d0 - d3}, [r0, :128]!
|
||||
bhs 3b
|
||||
#endif
|
||||
4: /* less than 32 left */
|
||||
@@ -150,6 +145,7 @@ ENTRY(memcpy)
|
||||
// copies 16 bytes, 128-bits aligned
|
||||
vld1.8 {d0, d1}, [r1]!
|
||||
vst1.8 {d0, d1}, [r0, :128]!
|
||||
|
||||
5: /* copy up to 15-bytes (count in r2) */
|
||||
movs ip, r2, lsl #29
|
||||
bcc 1f
|
||||
@@ -168,164 +164,6 @@ ENTRY(memcpy)
|
||||
|
||||
ldmfd sp!, {r0, lr}
|
||||
bx lr
|
||||
|
||||
#else /* NEON_UNALIGNED_ACCESS */
|
||||
|
||||
// Check so divider is at least 16 bytes, needed for alignment code.
|
||||
cmp r2, #16
|
||||
blo 5f
|
||||
|
||||
#ifdef NEON_MEMCPY_ALIGNMENT_DIVIDER
|
||||
/* Check the upper size limit for Neon unaligned memory access in memcpy */
|
||||
#if NEON_MEMCPY_ALIGNMENT_DIVIDER >= 16
|
||||
cmp r2, #NEON_MEMCPY_ALIGNMENT_DIVIDER
|
||||
blo 3f
|
||||
#endif
|
||||
/* check if buffers are aligned. If so, run arm-only version */
|
||||
eor r3, r0, r1
|
||||
ands r3, r3, #0x3
|
||||
beq 11f
|
||||
|
||||
/* align destination to 16 bytes for the write-buffer */
|
||||
rsb r3, r0, #0
|
||||
ands r3, r3, #0xF
|
||||
beq 3f
|
||||
|
||||
/* copy up to 15-bytes (count in r3) */
|
||||
sub r2, r2, r3
|
||||
movs ip, r3, lsl #31
|
||||
ldrmib lr, [r1], #1
|
||||
strmib lr, [r0], #1
|
||||
ldrcsb ip, [r1], #1
|
||||
ldrcsb lr, [r1], #1
|
||||
strcsb ip, [r0], #1
|
||||
strcsb lr, [r0], #1
|
||||
movs ip, r3, lsl #29
|
||||
bge 1f
|
||||
// copies 4 bytes, destination 32-bits aligned
|
||||
vld1.32 {d0[0]}, [r1]!
|
||||
vst1.32 {d0[0]}, [r0, :32]!
|
||||
1: bcc 2f
|
||||
// copies 8 bytes, destination 64-bits aligned
|
||||
vld1.8 {d0}, [r1]!
|
||||
vst1.8 {d0}, [r0, :64]!
|
||||
2:
|
||||
/* preload immediately the next cache line, which we may need */
|
||||
pld [r1, #(CACHE_LINE_SIZE * 0)]
|
||||
pld [r1, #(CACHE_LINE_SIZE * 1)]
|
||||
3:
|
||||
#endif
|
||||
/* make sure we have at least 64 bytes to copy */
|
||||
subs r2, r2, #64
|
||||
blo 2f
|
||||
|
||||
/* preload all the cache lines we need */
|
||||
pld [r1, #(CACHE_LINE_SIZE * 2)]
|
||||
pld [r1, #(CACHE_LINE_SIZE * 3)]
|
||||
|
||||
1: /* The main loop copies 64 bytes at a time */
|
||||
vld1.8 {d0 - d3}, [r1]!
|
||||
vld1.8 {d4 - d7}, [r1]!
|
||||
#ifdef HAVE_32_BYTE_CACHE_LINE
|
||||
pld [r1, #(CACHE_LINE_SIZE * 2)]
|
||||
pld [r1, #(CACHE_LINE_SIZE * 3)]
|
||||
#else
|
||||
pld [r1, #(CACHE_LINE_SIZE * 3)]
|
||||
#endif
|
||||
subs r2, r2, #64
|
||||
vst1.8 {d0 - d3}, [r0]!
|
||||
vst1.8 {d4 - d7}, [r0]!
|
||||
bhs 1b
|
||||
|
||||
2: /* fix-up the remaining count and make sure we have >= 32 bytes left */
|
||||
add r2, r2, #64
|
||||
subs r2, r2, #32
|
||||
blo 4f
|
||||
|
||||
3: /* 32 bytes at a time. These cache lines were already preloaded */
|
||||
vld1.8 {d0 - d3}, [r1]!
|
||||
subs r2, r2, #32
|
||||
vst1.8 {d0 - d3}, [r0]!
|
||||
bhs 3b
|
||||
|
||||
4: /* less than 32 left */
|
||||
add r2, r2, #32
|
||||
tst r2, #0x10
|
||||
beq 5f
|
||||
// copies 16 bytes, 128-bits aligned
|
||||
vld1.8 {d0, d1}, [r1]!
|
||||
vst1.8 {d0, d1}, [r0]!
|
||||
5: /* copy up to 15-bytes (count in r2) */
|
||||
movs ip, r2, lsl #29
|
||||
bcc 1f
|
||||
vld1.8 {d0}, [r1]!
|
||||
vst1.8 {d0}, [r0]!
|
||||
1: bge 2f
|
||||
vld1.32 {d0[0]}, [r1]!
|
||||
vst1.32 {d0[0]}, [r0]!
|
||||
2: movs ip, r2, lsl #31
|
||||
ldrmib r3, [r1], #1
|
||||
ldrcsb ip, [r1], #1
|
||||
ldrcsb lr, [r1], #1
|
||||
strmib r3, [r0], #1
|
||||
strcsb ip, [r0], #1
|
||||
strcsb lr, [r0], #1
|
||||
|
||||
ldmfd sp!, {r0, lr}
|
||||
bx lr
|
||||
#endif /* NEON_UNALIGNED_ACCESS */
|
||||
11:
|
||||
/* Simple arm-only copy loop to handle aligned copy operations */
|
||||
stmfd sp!, {r4, r5, r6, r7, r8}
|
||||
pld [r1, #(CACHE_LINE_SIZE * 2)]
|
||||
|
||||
/* Check alignment */
|
||||
rsb r3, r1, #0
|
||||
ands r3, #3
|
||||
beq 2f
|
||||
|
||||
/* align source to 32 bits. We need to insert 2 instructions between
|
||||
* a ldr[b|h] and str[b|h] because byte and half-word instructions
|
||||
* stall 2 cycles.
|
||||
*/
|
||||
movs r12, r3, lsl #31
|
||||
sub r2, r2, r3 /* we know that r3 <= r2 because r2 >= 4 */
|
||||
ldrmib r3, [r1], #1
|
||||
ldrcsb r4, [r1], #1
|
||||
ldrcsb r5, [r1], #1
|
||||
strmib r3, [r0], #1
|
||||
strcsb r4, [r0], #1
|
||||
strcsb r5, [r0], #1
|
||||
2:
|
||||
subs r2, #32
|
||||
blt 5f
|
||||
pld [r1, #(CACHE_LINE_SIZE * 3)]
|
||||
3: /* Main copy loop, copying 32 bytes at a time */
|
||||
pld [r1, #(CACHE_LINE_SIZE * 4)]
|
||||
ldmia r1!, {r3, r4, r5, r6, r7, r8, r12, lr}
|
||||
subs r2, r2, #32
|
||||
stmia r0!, {r3, r4, r5, r6, r7, r8, r12, lr}
|
||||
bge 3b
|
||||
5: /* Handle any remaining bytes */
|
||||
adds r2, #32
|
||||
beq 6f
|
||||
|
||||
movs r12, r2, lsl #28
|
||||
ldmcsia r1!, {r3, r4, r5, r6} /* 16 bytes */
|
||||
ldmmiia r1!, {r7, r8} /* 8 bytes */
|
||||
stmcsia r0!, {r3, r4, r5, r6}
|
||||
stmmiia r0!, {r7, r8}
|
||||
movs r12, r2, lsl #30
|
||||
ldrcs r3, [r1], #4 /* 4 bytes */
|
||||
ldrmih r4, [r1], #2 /* 2 bytes */
|
||||
strcs r3, [r0], #4
|
||||
strmih r4, [r0], #2
|
||||
tst r2, #0x1
|
||||
ldrneb r3, [r1] /* last byte */
|
||||
strneb r3, [r0]
|
||||
6:
|
||||
ldmfd sp!, {r4, r5, r6, r7, r8}
|
||||
ldmfd sp!, {r0, pc}
|
||||
END(memcpy)
|
||||
|
||||
|
||||
|
||||
@@ -1,406 +0,0 @@
|
||||
/*
|
||||
* Copyright (c) 2013 ARM Ltd
|
||||
* All rights reserved.
|
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without
|
||||
* modification, are permitted provided that the following conditions
|
||||
* are met:
|
||||
* 1. Redistributions of source code must retain the above copyright
|
||||
* notice, this list of conditions and the following disclaimer.
|
||||
* 2. Redistributions in binary form must reproduce the above copyright
|
||||
* notice, this list of conditions and the following disclaimer in the
|
||||
* documentation and/or other materials provided with the distribution.
|
||||
* 3. The name of the company may not be used to endorse or promote
|
||||
* products derived from this software without specific prior written
|
||||
* permission.
|
||||
*
|
||||
* THIS SOFTWARE IS PROVIDED BY ARM LTD ``AS IS'' AND ANY EXPRESS OR IMPLIED
|
||||
* WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
|
||||
* MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
|
||||
* IN NO EVENT SHALL ARM LTD BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
|
||||
* SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED
|
||||
* TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR
|
||||
* PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF
|
||||
* LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING
|
||||
* NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
|
||||
* SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
|
||||
*/
|
||||
|
||||
/* Prototype: void *memcpy (void *dst, const void *src, size_t count). */
|
||||
|
||||
/* Use the version of memcpy implemented using LDRD and STRD.
|
||||
This version is tuned for Cortex-A15.
|
||||
This might not be the best for other ARMv7-A CPUs,
|
||||
but there is no predefine to distinguish between
|
||||
different CPUs in the same architecture,
|
||||
and this version is better than the plain memcpy provided in newlib.
|
||||
|
||||
Therefore, we use this version for all ARMv7-A CPUS. */
|
||||
|
||||
/* To make the same code compile for both ARM and Thumb instruction
|
||||
sets, switch to unified syntax at the beginning of this function.
|
||||
However, by using the same code, we may be missing optimization
|
||||
opportunities. For instance, in LDRD/STRD instructions, the first
|
||||
destination register must be even and the second consecutive in
|
||||
ARM state, but not in Thumb state. */
|
||||
|
||||
#include <machine/cpu-features.h>
|
||||
#include <machine/asm.h>
|
||||
|
||||
.syntax unified
|
||||
|
||||
ENTRY(memcpy)
|
||||
|
||||
/* Assumes that n >= 0, and dst, src are valid pointers.
|
||||
If there is at least 8 bytes to copy, use LDRD/STRD.
|
||||
If src and dst are misaligned with different offsets,
|
||||
first copy byte by byte until dst is aligned,
|
||||
and then copy using LDRD/STRD and shift if needed.
|
||||
When less than 8 left, copy a word and then byte by byte. */
|
||||
|
||||
/* Save registers (r0 holds the return value):
|
||||
optimized push {r0, r4, r5, r6, r7, lr}.
|
||||
To try and improve performance, stack layout changed,
|
||||
i.e., not keeping the stack looking like users expect
|
||||
(highest numbered register at highest address). */
|
||||
.save {r0, lr}
|
||||
push {r0, lr}
|
||||
.save {r4, r5}
|
||||
strd r4, r5, [sp, #-8]!
|
||||
.save {r6, r7}
|
||||
strd r6, r7, [sp, #-8]!
|
||||
|
||||
/* TODO: Add debug frame directives.
|
||||
We don't need exception unwind directives, because the code below
|
||||
does not throw any exceptions and does not call any other functions.
|
||||
Generally, newlib functions like this lack debug information for
|
||||
assembler source. */
|
||||
|
||||
/* Get copying of tiny blocks out of the way first. */
|
||||
/* Is there at least 4 bytes to copy? */
|
||||
subs r2, r2, #4
|
||||
blt copy_less_than_4 /* If n < 4. */
|
||||
|
||||
/* Check word alignment. */
|
||||
ands ip, r0, #3 /* ip = last 2 bits of dst. */
|
||||
bne dst_not_word_aligned /* If dst is not word-aligned. */
|
||||
|
||||
/* Get here if dst is word-aligned. */
|
||||
ands ip, r1, #3 /* ip = last 2 bits of src. */
|
||||
bne src_not_word_aligned /* If src is not word-aligned. */
|
||||
word_aligned:
|
||||
/* Get here if source and dst both are word-aligned.
|
||||
The number of bytes remaining to copy is r2+4. */
|
||||
|
||||
/* Is there is at least 64 bytes to copy? */
|
||||
subs r2, r2, #60
|
||||
blt copy_less_than_64 /* If r2 + 4 < 64. */
|
||||
|
||||
/* First, align the destination buffer to 8-bytes,
|
||||
to make sure double loads and stores don't cross cache line boundary,
|
||||
as they are then more expensive even if the data is in the cache
|
||||
(require two load/store issue cycles instead of one).
|
||||
If only one of the buffers is not 8-bytes aligned,
|
||||
then it's more important to align dst than src,
|
||||
because there is more penalty for stores
|
||||
than loads that cross cacheline boundary.
|
||||
This check and realignment are only worth doing
|
||||
if there is a lot to copy. */
|
||||
|
||||
/* Get here if dst is word aligned,
|
||||
i.e., the 2 least significant bits are 0.
|
||||
If dst is not 2w aligned (i.e., the 3rd bit is not set in dst),
|
||||
then copy 1 word (4 bytes). */
|
||||
ands r3, r0, #4
|
||||
beq 11f /* If dst already two-word aligned. */
|
||||
ldr r3, [r1], #4
|
||||
str r3, [r0], #4
|
||||
subs r2, r2, #4
|
||||
blt copy_less_than_64
|
||||
|
||||
11:
|
||||
/* TODO: Align to cacheline (useful for PLD optimization). */
|
||||
|
||||
/* Every loop iteration copies 64 bytes. */
|
||||
1:
|
||||
.irp offset, #0, #8, #16, #24, #32, #40, #48, #56
|
||||
ldrd r4, r5, [r1, \offset]
|
||||
strd r4, r5, [r0, \offset]
|
||||
.endr
|
||||
|
||||
add r0, r0, #64
|
||||
add r1, r1, #64
|
||||
subs r2, r2, #64
|
||||
bge 1b /* If there is more to copy. */
|
||||
|
||||
copy_less_than_64:
|
||||
|
||||
/* Get here if less than 64 bytes to copy, -64 <= r2 < 0.
|
||||
Restore the count if there is more than 7 bytes to copy. */
|
||||
adds r2, r2, #56
|
||||
blt copy_less_than_8
|
||||
|
||||
/* Copy 8 bytes at a time. */
|
||||
2:
|
||||
ldrd r4, r5, [r1], #8
|
||||
strd r4, r5, [r0], #8
|
||||
subs r2, r2, #8
|
||||
bge 2b /* If there is more to copy. */
|
||||
|
||||
copy_less_than_8:
|
||||
|
||||
/* Get here if less than 8 bytes to copy, -8 <= r2 < 0.
|
||||
Check if there is more to copy. */
|
||||
cmn r2, #8
|
||||
beq return /* If r2 + 8 == 0. */
|
||||
|
||||
/* Restore the count if there is more than 3 bytes to copy. */
|
||||
adds r2, r2, #4
|
||||
blt copy_less_than_4
|
||||
|
||||
/* Copy 4 bytes. */
|
||||
ldr r3, [r1], #4
|
||||
str r3, [r0], #4
|
||||
|
||||
copy_less_than_4:
|
||||
/* Get here if less than 4 bytes to copy, -4 <= r2 < 0. */
|
||||
|
||||
/* Restore the count, check if there is more to copy. */
|
||||
adds r2, r2, #4
|
||||
beq return /* If r2 == 0. */
|
||||
|
||||
/* Get here with r2 is in {1,2,3}={01,10,11}. */
|
||||
/* Logical shift left r2, insert 0s, update flags. */
|
||||
lsls r2, r2, #31
|
||||
|
||||
/* Copy byte by byte.
|
||||
Condition ne means the last bit of r2 is 0.
|
||||
Condition cs means the second to last bit of r2 is set,
|
||||
i.e., r2 is 1 or 3. */
|
||||
itt ne
|
||||
ldrbne r3, [r1], #1
|
||||
strbne r3, [r0], #1
|
||||
|
||||
itttt cs
|
||||
ldrbcs r4, [r1], #1
|
||||
ldrbcs r5, [r1]
|
||||
strbcs r4, [r0], #1
|
||||
strbcs r5, [r0]
|
||||
|
||||
return:
|
||||
/* Restore registers: optimized pop {r0, r4, r5, r6, r7, pc} */
|
||||
/* This is the only return point of memcpy. */
|
||||
ldrd r6, r7, [sp], #8
|
||||
ldrd r4, r5, [sp], #8
|
||||
pop {r0, pc}
|
||||
|
||||
#ifndef __ARM_FEATURE_UNALIGNED
|
||||
|
||||
/* The following assembly macro implements misaligned copy in software.
|
||||
Assumes that dst is word aligned, src is at offset "pull" bits from
|
||||
word, push = 32 - pull, and the number of bytes that remain to copy
|
||||
is r2 + 4, r2 >= 0. */
|
||||
|
||||
/* In the code below, r2 is the number of bytes that remain to be
|
||||
written. The number of bytes read is always larger, because we have
|
||||
partial words in the shift queue. */
|
||||
|
||||
.macro miscopy pull push shiftleft shiftright
|
||||
|
||||
/* Align src to the previous word boundary. */
|
||||
bic r1, r1, #3
|
||||
|
||||
/* Initialize the shift queue. */
|
||||
ldr r5, [r1], #4 /* Load a word from source. */
|
||||
|
||||
subs r2, r2, #4
|
||||
blt 6f /* Go to misaligned copy of less than 8 bytes. */
|
||||
|
||||
/* Get here if there is more than 8 bytes to copy.
|
||||
The number of bytes to copy is r2+8, r2 >= 0. */
|
||||
|
||||
subs r2, r2, #56
|
||||
blt 4f /* Go to misaligned copy of less than 64 bytes. */
|
||||
|
||||
3:
|
||||
/* Get here if there is more than 64 bytes to copy.
|
||||
The number of bytes to copy is r2+64, r2 >= 0. */
|
||||
|
||||
/* Copy 64 bytes in every iteration.
|
||||
Use a partial word from the shift queue. */
|
||||
.irp offset, #0, #8, #16, #24, #32, #40, #48, #56
|
||||
mov r6, r5, \shiftleft #\pull
|
||||
ldrd r4, r5, [r1, \offset]
|
||||
orr r6, r6, r4, \shiftright #\push
|
||||
mov r7, r4, \shiftleft #\pull
|
||||
orr r7, r7, r5, \shiftright #\push
|
||||
strd r6, r7, [r0, \offset]
|
||||
.endr
|
||||
|
||||
add r1, r1, #64
|
||||
add r0, r0, #64
|
||||
subs r2, r2, #64
|
||||
bge 3b
|
||||
|
||||
4:
|
||||
/* Get here if there is less than 64 bytes to copy (-64 <= r2 < 0)
|
||||
and they are misaligned. */
|
||||
|
||||
/* Restore the count if there is more than 7 bytes to copy. */
|
||||
adds r2, r2, #56
|
||||
|
||||
blt 6f /* Go to misaligned copy of less than 8 bytes. */
|
||||
|
||||
5:
|
||||
/* Copy 8 bytes at a time.
|
||||
Use a partial word from the shift queue. */
|
||||
mov r6, r5, \shiftleft #\pull
|
||||
ldrd r4, r5, [r1], #8
|
||||
orr r6, r6, r4, \shiftright #\push
|
||||
mov r7, r4, \shiftleft #\pull
|
||||
orr r7, r7, r5, \shiftright #\push
|
||||
strd r6, r7, [r0], #8
|
||||
|
||||
subs r2, r2, #8
|
||||
bge 5b /* If there is more to copy. */
|
||||
|
||||
6:
|
||||
/* Get here if there less than 8 bytes to copy (-8 <= r2 < 0)
|
||||
and they are misaligned. */
|
||||
|
||||
/* Check if there is more to copy. */
|
||||
cmn r2, #8
|
||||
beq return
|
||||
|
||||
/* Check if there is less than 4 bytes to copy. */
|
||||
cmn r2, #4
|
||||
|
||||
itt lt
|
||||
/* Restore src offset from word-align. */
|
||||
sublt r1, r1, #(\push / 8)
|
||||
blt copy_less_than_4
|
||||
|
||||
/* Use a partial word from the shift queue. */
|
||||
mov r3, r5, \shiftleft #\pull
|
||||
/* Load a word from src, but without writeback
|
||||
(this word is not fully written to dst). */
|
||||
ldr r5, [r1]
|
||||
|
||||
/* Restore src offset from word-align. */
|
||||
add r1, r1, #(\pull / 8)
|
||||
|
||||
/* Shift bytes to create one dst word and store it. */
|
||||
orr r3, r3, r5, \shiftright #\push
|
||||
str r3, [r0], #4
|
||||
|
||||
/* Use single byte copying of the remaining bytes. */
|
||||
b copy_less_than_4
|
||||
|
||||
.endm
|
||||
|
||||
#endif /* not __ARM_FEATURE_UNALIGNED */
|
||||
|
||||
dst_not_word_aligned:
|
||||
|
||||
/* Get here when dst is not aligned and ip has the last 2 bits of dst,
|
||||
i.e., ip is the offset of dst from word.
|
||||
The number of bytes that remains to copy is r2 + 4,
|
||||
i.e., there are at least 4 bytes to copy.
|
||||
Write a partial word (0 to 3 bytes), such that dst becomes
|
||||
word-aligned. */
|
||||
|
||||
/* If dst is at ip bytes offset from a word (with 0 < ip < 4),
|
||||
then there are (4 - ip) bytes to fill up to align dst to the next
|
||||
word. */
|
||||
rsb ip, ip, #4 /* ip = #4 - ip. */
|
||||
cmp ip, #2
|
||||
|
||||
/* Copy byte by byte with conditionals. */
|
||||
itt gt
|
||||
ldrbgt r3, [r1], #1
|
||||
strbgt r3, [r0], #1
|
||||
|
||||
itt ge
|
||||
ldrbge r4, [r1], #1
|
||||
strbge r4, [r0], #1
|
||||
|
||||
ldrb lr, [r1], #1
|
||||
strb lr, [r0], #1
|
||||
|
||||
/* Update the count.
|
||||
ip holds the number of bytes we have just copied. */
|
||||
subs r2, r2, ip /* r2 = r2 - ip. */
|
||||
blt copy_less_than_4 /* If r2 < ip. */
|
||||
|
||||
/* Get here if there are more than 4 bytes to copy.
|
||||
Check if src is aligned. If beforehand src and dst were not word
|
||||
aligned but congruent (same offset), then now they are both
|
||||
word-aligned, and we can copy the rest efficiently (without
|
||||
shifting). */
|
||||
ands ip, r1, #3 /* ip = last 2 bits of src. */
|
||||
beq word_aligned /* If r1 is word-aligned. */
|
||||
|
||||
src_not_word_aligned:
|
||||
/* Get here when src is not word-aligned, but dst is word-aligned.
|
||||
The number of bytes that remains to copy is r2+4. */
|
||||
|
||||
#ifdef __ARM_FEATURE_UNALIGNED
|
||||
/* Copy word by word using LDR when alignment can be done in hardware,
|
||||
i.e., SCTLR.A is set, supporting unaligned access in LDR and STR. */
|
||||
subs r2, r2, #60
|
||||
blt 8f
|
||||
|
||||
7:
|
||||
/* Copy 64 bytes in every loop iteration. */
|
||||
.irp offset, #0, #4, #8, #12, #16, #20, #24, #28, #32, #36, #40, #44, #48, #52, #56, #60
|
||||
ldr r3, [r1, \offset]
|
||||
str r3, [r0, \offset]
|
||||
.endr
|
||||
|
||||
add r0, r0, #64
|
||||
add r1, r1, #64
|
||||
subs r2, r2, #64
|
||||
bge 7b
|
||||
|
||||
8:
|
||||
/* Get here if less than 64 bytes to copy, -64 <= r2 < 0.
|
||||
Check if there is more than 3 bytes to copy. */
|
||||
adds r2, r2, #60
|
||||
blt copy_less_than_4
|
||||
|
||||
9:
|
||||
/* Get here if there is less than 64 but at least 4 bytes to copy,
|
||||
where the number of bytes to copy is r2+4. */
|
||||
ldr r3, [r1], #4
|
||||
str r3, [r0], #4
|
||||
subs r2, r2, #4
|
||||
bge 9b
|
||||
|
||||
b copy_less_than_4
|
||||
|
||||
#else /* not __ARM_FEATURE_UNALIGNED */
|
||||
|
||||
/* ip has last 2 bits of src,
|
||||
i.e., ip is the offset of src from word, and ip > 0.
|
||||
Compute shifts needed to copy from src to dst. */
|
||||
cmp ip, #2
|
||||
beq miscopy_16_16 /* If ip == 2. */
|
||||
bge miscopy_24_8 /* If ip == 3. */
|
||||
|
||||
/* Get here if ip == 1. */
|
||||
|
||||
/* Endian independent macros for shifting bytes within registers. */
|
||||
|
||||
#ifndef __ARMEB__
|
||||
miscopy_8_24: miscopy pull=8 push=24 shiftleft=lsr shiftright=lsl
|
||||
miscopy_16_16: miscopy pull=16 push=16 shiftleft=lsr shiftright=lsl
|
||||
miscopy_24_8: miscopy pull=24 push=8 shiftleft=lsr shiftright=lsl
|
||||
#else /* not __ARMEB__ */
|
||||
miscopy_8_24: miscopy pull=8 push=24 shiftleft=lsl shiftright=lsr
|
||||
miscopy_16_16: miscopy pull=16 push=16 shiftleft=lsl shiftright=lsr
|
||||
miscopy_24_8: miscopy pull=24 push=8 shiftleft=lsl shiftright=lsr
|
||||
#endif /* not __ARMEB__ */
|
||||
|
||||
#endif /* not __ARM_FEATURE_UNALIGNED */
|
||||
|
||||
END(memcpy)
|
||||
@@ -26,114 +26,23 @@
|
||||
* SUCH DAMAGE.
|
||||
*/
|
||||
|
||||
#include <machine/cpu-features.h>
|
||||
#include <machine/asm.h>
|
||||
|
||||
|
||||
/*
|
||||
* Optimized memset() for ARM.
|
||||
*
|
||||
* memset() returns its first argument.
|
||||
*/
|
||||
|
||||
#if defined(__ARM_NEON__)
|
||||
.fpu neon
|
||||
#endif
|
||||
|
||||
|
||||
ENTRY(bzero)
|
||||
mov r2, r1
|
||||
mov r1, #0
|
||||
// Fall through to memset...
|
||||
END(bzero)
|
||||
|
||||
ENTRY(memset)
|
||||
#if defined(__ARM_NEON__)
|
||||
|
||||
#ifdef NEON_MEMSET_DIVIDER
|
||||
cmp r2, #NEON_MEMSET_DIVIDER
|
||||
bhi 11f
|
||||
#endif
|
||||
.save {r0}
|
||||
stmfd sp!, {r0}
|
||||
|
||||
vdup.8 q0, r1
|
||||
|
||||
#ifndef NEON_UNALIGNED_ACCESS
|
||||
/* do we have at least 16-bytes to write (needed for alignment below) */
|
||||
cmp r2, #16
|
||||
blo 3f
|
||||
|
||||
/* align destination to 16 bytes for the write-buffer */
|
||||
rsb r3, r0, #0
|
||||
ands r3, r3, #0xF
|
||||
beq 2f
|
||||
|
||||
/* write up to 15-bytes (count in r3) */
|
||||
sub r2, r2, r3
|
||||
movs ip, r3, lsl #31
|
||||
strmib r1, [r0], #1
|
||||
strcsb r1, [r0], #1
|
||||
strcsb r1, [r0], #1
|
||||
movs ip, r3, lsl #29
|
||||
bge 1f
|
||||
|
||||
// writes 4 bytes, 32-bits aligned
|
||||
vst1.32 {d0[0]}, [r0, :32]!
|
||||
1: bcc 2f
|
||||
|
||||
// writes 8 bytes, 64-bits aligned
|
||||
vst1.8 {d0}, [r0, :64]!
|
||||
2:
|
||||
#endif
|
||||
/* make sure we have at least 32 bytes to write */
|
||||
subs r2, r2, #32
|
||||
blo 2f
|
||||
vmov q1, q0
|
||||
|
||||
1: /* The main loop writes 32 bytes at a time */
|
||||
subs r2, r2, #32
|
||||
#ifndef NEON_UNALIGNED_ACCESS
|
||||
vst1.8 {d0 - d3}, [r0, :128]!
|
||||
#else
|
||||
vst1.8 {d0 - d3}, [r0]!
|
||||
#endif
|
||||
bhs 1b
|
||||
|
||||
2: /* less than 32 left */
|
||||
add r2, r2, #32
|
||||
tst r2, #0x10
|
||||
beq 3f
|
||||
|
||||
// writes 16 bytes, 128-bits aligned
|
||||
#ifndef NEON_UNALIGNED_ACCESS
|
||||
vst1.8 {d0, d1}, [r0, :128]!
|
||||
#else
|
||||
vst1.8 {d0, d1}, [r0]!
|
||||
#endif
|
||||
3: /* write up to 15-bytes (count in r2) */
|
||||
movs ip, r2, lsl #29
|
||||
bcc 1f
|
||||
vst1.8 {d0}, [r0]!
|
||||
1: bge 2f
|
||||
vst1.32 {d0[0]}, [r0]!
|
||||
2: movs ip, r2, lsl #31
|
||||
strmib r1, [r0], #1
|
||||
strcsb r1, [r0], #1
|
||||
strcsb r1, [r0], #1
|
||||
ldmfd sp!, {r0}
|
||||
bx lr
|
||||
11:
|
||||
#endif
|
||||
|
||||
/*
|
||||
* Optimized memset() for ARM.
|
||||
*
|
||||
* memset() returns its first argument.
|
||||
*/
|
||||
|
||||
/* compute the offset to align the destination
|
||||
* offset = (4-(src&3))&3 = -src & 3
|
||||
*/
|
||||
|
||||
.save {r0, r4-r7, lr}
|
||||
stmfd sp!, {r0, r4-r7, lr}
|
||||
rsb r3, r0, #0
|
||||
@@ -161,7 +70,7 @@ ENTRY(memset)
|
||||
mov r5, r1
|
||||
mov r6, r1
|
||||
mov r7, r1
|
||||
|
||||
|
||||
rsb r3, r0, #0
|
||||
ands r3, r3, #0x1C
|
||||
beq 3f
|
||||
@@ -169,7 +78,7 @@ ENTRY(memset)
|
||||
andhi r3, r2, #0x1C
|
||||
sub r2, r2, r3
|
||||
|
||||
/* conditionally writes 0 to 7 words (length in r3) */
|
||||
/* conditionnaly writes 0 to 7 words (length in r3) */
|
||||
movs r3, r3, lsl #28
|
||||
stmcsia r0!, {r1, lr}
|
||||
stmcsia r0!, {r1, lr}
|
||||
@@ -186,7 +95,7 @@ ENTRY(memset)
|
||||
bhs 1b
|
||||
2: add r2, r2, #32
|
||||
|
||||
/* conditionally stores 0 to 31 bytes */
|
||||
/* conditionnaly stores 0 to 31 bytes */
|
||||
movs r2, r2, lsl #28
|
||||
stmcsia r0!, {r1,r3,r12,lr}
|
||||
stmmiia r0!, {r1, lr}
|
||||
|
||||
@@ -1,787 +0,0 @@
|
||||
/*
|
||||
* Copyright (c) 2013 ARM Ltd
|
||||
* All rights reserved.
|
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without
|
||||
* modification, are permitted provided that the following conditions
|
||||
* are met:
|
||||
* 1. Redistributions of source code must retain the above copyright
|
||||
* notice, this list of conditions and the following disclaimer.
|
||||
* 2. Redistributions in binary form must reproduce the above copyright
|
||||
* notice, this list of conditions and the following disclaimer in the
|
||||
* documentation and/or other materials provided with the distribution.
|
||||
* 3. The name of the company may not be used to endorse or promote
|
||||
* products derived from this software without specific prior written
|
||||
* permission.
|
||||
*
|
||||
* THIS SOFTWARE IS PROVIDED BY ARM LTD ``AS IS'' AND ANY EXPRESS OR IMPLIED
|
||||
* WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
|
||||
* MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
|
||||
* IN NO EVENT SHALL ARM LTD BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
|
||||
* SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED
|
||||
* TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR
|
||||
* PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF
|
||||
* LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING
|
||||
* NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
|
||||
* SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
|
||||
*/
|
||||
|
||||
#include "arm_asm.h"
|
||||
|
||||
#ifdef __ARMEB__
|
||||
#define S2LOMEM lsl
|
||||
#define S2LOMEMEQ lsleq
|
||||
#define S2HIMEM lsr
|
||||
#define MSB 0x000000ff
|
||||
#define LSB 0xff000000
|
||||
#define BYTE0_OFFSET 24
|
||||
#define BYTE1_OFFSET 16
|
||||
#define BYTE2_OFFSET 8
|
||||
#define BYTE3_OFFSET 0
|
||||
#else /* not __ARMEB__ */
|
||||
#define S2LOMEM lsr
|
||||
#define S2LOMEMEQ lsreq
|
||||
#define S2HIMEM lsl
|
||||
#define BYTE0_OFFSET 0
|
||||
#define BYTE1_OFFSET 8
|
||||
#define BYTE2_OFFSET 16
|
||||
#define BYTE3_OFFSET 24
|
||||
#define MSB 0xff000000
|
||||
#define LSB 0x000000ff
|
||||
#endif /* not __ARMEB__ */
|
||||
|
||||
.syntax unified
|
||||
|
||||
#if defined (__thumb__)
|
||||
.thumb
|
||||
.thumb_func
|
||||
#endif
|
||||
.global strcmp
|
||||
.type strcmp, %function
|
||||
strcmp:
|
||||
|
||||
#if (defined (__thumb__) && !defined (__thumb2__))
|
||||
1:
|
||||
ldrb r2, [r0]
|
||||
ldrb r3, [r1]
|
||||
adds r0, r0, #1
|
||||
adds r1, r1, #1
|
||||
cmp r2, #0
|
||||
beq 2f
|
||||
cmp r2, r3
|
||||
beq 1b
|
||||
2:
|
||||
subs r0, r2, r3
|
||||
bx lr
|
||||
#elif (defined (__OPTIMIZE_SIZE__) || defined (PREFER_SIZE_OVER_SPEED))
|
||||
1:
|
||||
ldrb r2, [r0], #1
|
||||
ldrb r3, [r1], #1
|
||||
cmp r2, #1
|
||||
it cs
|
||||
cmpcs r2, r3
|
||||
beq 1b
|
||||
subs r0, r2, r3
|
||||
RETURN
|
||||
|
||||
|
||||
#elif (defined (_ISA_THUMB_2) || defined (_ISA_ARM_6))
|
||||
/* Use LDRD whenever possible. */
|
||||
|
||||
/* The main thing to look out for when comparing large blocks is that
|
||||
the loads do not cross a page boundary when loading past the index
|
||||
of the byte with the first difference or the first string-terminator.
|
||||
|
||||
For example, if the strings are identical and the string-terminator
|
||||
is at index k, byte by byte comparison will not load beyond address
|
||||
s1+k and s2+k; word by word comparison may load up to 3 bytes beyond
|
||||
k; double word - up to 7 bytes. If the load of these bytes crosses
|
||||
a page boundary, it might cause a memory fault (if the page is not mapped)
|
||||
that would not have happened in byte by byte comparison.
|
||||
|
||||
If an address is (double) word aligned, then a load of a (double) word
|
||||
from that address will not cross a page boundary.
|
||||
Therefore, the algorithm below considers word and double-word alignment
|
||||
of strings separately. */
|
||||
|
||||
/* High-level description of the algorithm.
|
||||
|
||||
* The fast path: if both strings are double-word aligned,
|
||||
use LDRD to load two words from each string in every loop iteration.
|
||||
* If the strings have the same offset from a word boundary,
|
||||
use LDRB to load and compare byte by byte until
|
||||
the first string is aligned to a word boundary (at most 3 bytes).
|
||||
This is optimized for quick return on short unaligned strings.
|
||||
* If the strings have the same offset from a double-word boundary,
|
||||
use LDRD to load two words from each string in every loop iteration, as in the fast path.
|
||||
* If the strings do not have the same offset from a double-word boundary,
|
||||
load a word from the second string before the loop to initialize the queue.
|
||||
Use LDRD to load two words from every string in every loop iteration.
|
||||
Inside the loop, load the second word from the second string only after comparing
|
||||
the first word, using the queued value, to guarantee safety across page boundaries.
|
||||
* If the strings do not have the same offset from a word boundary,
|
||||
use LDR and a shift queue. Order of loads and comparisons matters,
|
||||
similarly to the previous case.
|
||||
|
||||
* Use UADD8 and SEL to compare words, and use REV and CLZ to compute the return value.
|
||||
* The only difference between ARM and Thumb modes is the use of CBZ instruction.
|
||||
* The only difference between big and little endian is the use of REV in little endian
|
||||
to compute the return value, instead of MOV.
|
||||
* No preload. [TODO.]
|
||||
*/
|
||||
|
||||
.macro m_cbz reg label
|
||||
#ifdef __thumb2__
|
||||
cbz \reg, \label
|
||||
#else /* not defined __thumb2__ */
|
||||
cmp \reg, #0
|
||||
beq \label
|
||||
#endif /* not defined __thumb2__ */
|
||||
.endm /* m_cbz */
|
||||
|
||||
.macro m_cbnz reg label
|
||||
#ifdef __thumb2__
|
||||
cbnz \reg, \label
|
||||
#else /* not defined __thumb2__ */
|
||||
cmp \reg, #0
|
||||
bne \label
|
||||
#endif /* not defined __thumb2__ */
|
||||
.endm /* m_cbnz */
|
||||
|
||||
.macro init
|
||||
/* Macro to save temporary registers and prepare magic values. */
|
||||
subs sp, sp, #16
|
||||
strd r4, r5, [sp, #8]
|
||||
strd r6, r7, [sp]
|
||||
mvn r6, #0 /* all F */
|
||||
mov r7, #0 /* all 0 */
|
||||
.endm /* init */
|
||||
|
||||
.macro magic_compare_and_branch w1 w2 label
|
||||
/* Macro to compare registers w1 and w2 and conditionally branch to label. */
|
||||
cmp \w1, \w2 /* Are w1 and w2 the same? */
|
||||
magic_find_zero_bytes \w1
|
||||
it eq
|
||||
cmpeq ip, #0 /* Is there a zero byte in w1? */
|
||||
bne \label
|
||||
.endm /* magic_compare_and_branch */
|
||||
|
||||
.macro magic_find_zero_bytes w1
|
||||
/* Macro to find all-zero bytes in w1, result is in ip. */
|
||||
#if (defined (__ARM_FEATURE_DSP))
|
||||
uadd8 ip, \w1, r6
|
||||
sel ip, r7, r6
|
||||
#else /* not defined (__ARM_FEATURE_DSP) */
|
||||
/* __ARM_FEATURE_DSP is not defined for some Cortex-M processors.
|
||||
Coincidently, these processors only have Thumb-2 mode, where we can use the
|
||||
the (large) magic constant available directly as an immediate in instructions.
|
||||
Note that we cannot use the magic constant in ARM mode, where we need
|
||||
to create the constant in a register. */
|
||||
sub ip, \w1, #0x01010101
|
||||
bic ip, ip, \w1
|
||||
and ip, ip, #0x80808080
|
||||
#endif /* not defined (__ARM_FEATURE_DSP) */
|
||||
.endm /* magic_find_zero_bytes */
|
||||
|
||||
.macro setup_return w1 w2
|
||||
#ifdef __ARMEB__
|
||||
mov r1, \w1
|
||||
mov r2, \w2
|
||||
#else /* not __ARMEB__ */
|
||||
rev r1, \w1
|
||||
rev r2, \w2
|
||||
#endif /* not __ARMEB__ */
|
||||
.endm /* setup_return */
|
||||
|
||||
/*
|
||||
optpld r0, #0
|
||||
optpld r1, #0
|
||||
*/
|
||||
|
||||
/* Are both strings double-word aligned? */
|
||||
orr ip, r0, r1
|
||||
tst ip, #7
|
||||
bne do_align
|
||||
|
||||
/* Fast path. */
|
||||
init
|
||||
|
||||
doubleword_aligned:
|
||||
|
||||
/* Get here when the strings to compare are double-word aligned. */
|
||||
/* Compare two words in every iteration. */
|
||||
.p2align 2
|
||||
2:
|
||||
/*
|
||||
optpld r0, #16
|
||||
optpld r1, #16
|
||||
*/
|
||||
|
||||
/* Load the next double-word from each string. */
|
||||
ldrd r2, r3, [r0], #8
|
||||
ldrd r4, r5, [r1], #8
|
||||
|
||||
magic_compare_and_branch w1=r2, w2=r4, label=return_24
|
||||
magic_compare_and_branch w1=r3, w2=r5, label=return_35
|
||||
b 2b
|
||||
|
||||
do_align:
|
||||
/* Is the first string word-aligned? */
|
||||
ands ip, r0, #3
|
||||
beq word_aligned_r0
|
||||
|
||||
/* Fast compare byte by byte until the first string is word-aligned. */
|
||||
/* The offset of r0 from a word boundary is in ip. Thus, the number of bytes
|
||||
to read until the next word boudnary is 4-ip. */
|
||||
bic r0, r0, #3
|
||||
ldr r2, [r0], #4
|
||||
lsls ip, ip, #31
|
||||
beq byte2
|
||||
bcs byte3
|
||||
|
||||
byte1:
|
||||
ldrb ip, [r1], #1
|
||||
uxtb r3, r2, ror #BYTE1_OFFSET
|
||||
subs ip, r3, ip
|
||||
bne fast_return
|
||||
m_cbz reg=r3, label=fast_return
|
||||
|
||||
byte2:
|
||||
ldrb ip, [r1], #1
|
||||
uxtb r3, r2, ror #BYTE2_OFFSET
|
||||
subs ip, r3, ip
|
||||
bne fast_return
|
||||
m_cbz reg=r3, label=fast_return
|
||||
|
||||
byte3:
|
||||
ldrb ip, [r1], #1
|
||||
uxtb r3, r2, ror #BYTE3_OFFSET
|
||||
subs ip, r3, ip
|
||||
bne fast_return
|
||||
m_cbnz reg=r3, label=word_aligned_r0
|
||||
|
||||
fast_return:
|
||||
mov r0, ip
|
||||
bx lr
|
||||
|
||||
word_aligned_r0:
|
||||
init
|
||||
/* The first string is word-aligned. */
|
||||
/* Is the second string word-aligned? */
|
||||
ands ip, r1, #3
|
||||
bne strcmp_unaligned
|
||||
|
||||
word_aligned:
|
||||
/* The strings are word-aligned. */
|
||||
/* Is the first string double-word aligned? */
|
||||
tst r0, #4
|
||||
beq doubleword_aligned_r0
|
||||
|
||||
/* If r0 is not double-word aligned yet, align it by loading
|
||||
and comparing the next word from each string. */
|
||||
ldr r2, [r0], #4
|
||||
ldr r4, [r1], #4
|
||||
magic_compare_and_branch w1=r2 w2=r4 label=return_24
|
||||
|
||||
doubleword_aligned_r0:
|
||||
/* Get here when r0 is double-word aligned. */
|
||||
/* Is r1 doubleword_aligned? */
|
||||
tst r1, #4
|
||||
beq doubleword_aligned
|
||||
|
||||
/* Get here when the strings to compare are word-aligned,
|
||||
r0 is double-word aligned, but r1 is not double-word aligned. */
|
||||
|
||||
/* Initialize the queue. */
|
||||
ldr r5, [r1], #4
|
||||
|
||||
/* Compare two words in every iteration. */
|
||||
.p2align 2
|
||||
3:
|
||||
/*
|
||||
optpld r0, #16
|
||||
optpld r1, #16
|
||||
*/
|
||||
|
||||
/* Load the next double-word from each string and compare. */
|
||||
ldrd r2, r3, [r0], #8
|
||||
magic_compare_and_branch w1=r2 w2=r5 label=return_25
|
||||
ldrd r4, r5, [r1], #8
|
||||
magic_compare_and_branch w1=r3 w2=r4 label=return_34
|
||||
b 3b
|
||||
|
||||
.macro miscmp_word offsetlo offsethi
|
||||
/* Macro to compare misaligned strings. */
|
||||
/* r0, r1 are word-aligned, and at least one of the strings
|
||||
is not double-word aligned. */
|
||||
/* Compare one word in every loop iteration. */
|
||||
/* OFFSETLO is the original bit-offset of r1 from a word-boundary,
|
||||
OFFSETHI is 32 - OFFSETLO (i.e., offset from the next word). */
|
||||
|
||||
/* Initialize the shift queue. */
|
||||
ldr r5, [r1], #4
|
||||
|
||||
/* Compare one word from each string in every loop iteration. */
|
||||
.p2align 2
|
||||
7:
|
||||
ldr r3, [r0], #4
|
||||
S2LOMEM r5, r5, #\offsetlo
|
||||
magic_find_zero_bytes w1=r3
|
||||
cmp r7, ip, S2HIMEM #\offsetlo
|
||||
and r2, r3, r6, S2LOMEM #\offsetlo
|
||||
it eq
|
||||
cmpeq r2, r5
|
||||
bne return_25
|
||||
ldr r5, [r1], #4
|
||||
cmp ip, #0
|
||||
eor r3, r2, r3
|
||||
S2HIMEM r2, r5, #\offsethi
|
||||
it eq
|
||||
cmpeq r3, r2
|
||||
bne return_32
|
||||
b 7b
|
||||
.endm /* miscmp_word */
|
||||
|
||||
strcmp_unaligned:
|
||||
/* r0 is word-aligned, r1 is at offset ip from a word. */
|
||||
/* Align r1 to the (previous) word-boundary. */
|
||||
bic r1, r1, #3
|
||||
|
||||
/* Unaligned comparison word by word using LDRs. */
|
||||
cmp ip, #2
|
||||
beq miscmp_word_16 /* If ip == 2. */
|
||||
bge miscmp_word_24 /* If ip == 3. */
|
||||
miscmp_word offsetlo=8 offsethi=24 /* If ip == 1. */
|
||||
miscmp_word_16: miscmp_word offsetlo=16 offsethi=16
|
||||
miscmp_word_24: miscmp_word offsetlo=24 offsethi=8
|
||||
|
||||
|
||||
return_32:
|
||||
setup_return w1=r3, w2=r2
|
||||
b do_return
|
||||
return_34:
|
||||
setup_return w1=r3, w2=r4
|
||||
b do_return
|
||||
return_25:
|
||||
setup_return w1=r2, w2=r5
|
||||
b do_return
|
||||
return_35:
|
||||
setup_return w1=r3, w2=r5
|
||||
b do_return
|
||||
return_24:
|
||||
setup_return w1=r2, w2=r4
|
||||
|
||||
do_return:
|
||||
|
||||
#ifdef __ARMEB__
|
||||
mov r0, ip
|
||||
#else /* not __ARMEB__ */
|
||||
rev r0, ip
|
||||
#endif /* not __ARMEB__ */
|
||||
|
||||
/* Restore temporaries early, before computing the return value. */
|
||||
ldrd r6, r7, [sp]
|
||||
ldrd r4, r5, [sp, #8]
|
||||
adds sp, sp, #16
|
||||
|
||||
/* There is a zero or a different byte between r1 and r2. */
|
||||
/* r0 contains a mask of all-zero bytes in r1. */
|
||||
/* Using r0 and not ip here because cbz requires low register. */
|
||||
m_cbz reg=r0, label=compute_return_value
|
||||
clz r0, r0
|
||||
/* r0 contains the number of bits on the left of the first all-zero byte in r1. */
|
||||
rsb r0, r0, #24
|
||||
/* Here, r0 contains the number of bits on the right of the first all-zero byte in r1. */
|
||||
lsr r1, r1, r0
|
||||
lsr r2, r2, r0
|
||||
|
||||
compute_return_value:
|
||||
movs r0, #1
|
||||
cmp r1, r2
|
||||
/* The return value is computed as follows.
|
||||
If r1>r2 then (C==1 and Z==0) and LS doesn't hold and r0 is #1 at return.
|
||||
If r1<r2 then (C==0 and Z==0) and we execute SBC with carry_in=0,
|
||||
which means r0:=r0-r0-1 and r0 is #-1 at return.
|
||||
If r1=r2 then (C==1 and Z==1) and we execute SBC with carry_in=1,
|
||||
which means r0:=r0-r0 and r0 is #0 at return.
|
||||
(C==0 and Z==1) cannot happen because the carry bit is "not borrow". */
|
||||
it ls
|
||||
sbcls r0, r0, r0
|
||||
bx lr
|
||||
|
||||
|
||||
#else /* !(defined (_ISA_THUMB_2) || defined (_ISA_ARM_6)
|
||||
defined (__OPTIMIZE_SIZE__) || defined (PREFER_SIZE_OVER_SPEED) ||
|
||||
(defined (__thumb__) && !defined (__thumb2__))) */
|
||||
|
||||
/* Use LDR whenever possible. */
|
||||
|
||||
#ifdef __thumb2__
|
||||
#define magic1(REG) 0x01010101
|
||||
#define magic2(REG) 0x80808080
|
||||
#else
|
||||
#define magic1(REG) REG
|
||||
#define magic2(REG) REG, lsl #7
|
||||
#endif
|
||||
|
||||
optpld r0
|
||||
optpld r1
|
||||
eor r2, r0, r1
|
||||
tst r2, #3
|
||||
/* Strings not at same byte offset from a word boundary. */
|
||||
bne strcmp_unaligned
|
||||
ands r2, r0, #3
|
||||
bic r0, r0, #3
|
||||
bic r1, r1, #3
|
||||
ldr ip, [r0], #4
|
||||
it eq
|
||||
ldreq r3, [r1], #4
|
||||
beq 1f
|
||||
/* Although s1 and s2 have identical initial alignment, they are
|
||||
not currently word aligned. Rather than comparing bytes,
|
||||
make sure that any bytes fetched from before the addressed
|
||||
bytes are forced to 0xff. Then they will always compare
|
||||
equal. */
|
||||
eor r2, r2, #3
|
||||
lsl r2, r2, #3
|
||||
mvn r3, MSB
|
||||
S2LOMEM r2, r3, r2
|
||||
ldr r3, [r1], #4
|
||||
orr ip, ip, r2
|
||||
orr r3, r3, r2
|
||||
1:
|
||||
#ifndef __thumb2__
|
||||
/* Load the 'magic' constant 0x01010101. */
|
||||
str r4, [sp, #-4]!
|
||||
mov r4, #1
|
||||
orr r4, r4, r4, lsl #8
|
||||
orr r4, r4, r4, lsl #16
|
||||
#endif
|
||||
.p2align 2
|
||||
4:
|
||||
optpld r0, #8
|
||||
optpld r1, #8
|
||||
sub r2, ip, magic1(r4)
|
||||
cmp ip, r3
|
||||
itttt eq
|
||||
/* check for any zero bytes in first word */
|
||||
biceq r2, r2, ip
|
||||
tsteq r2, magic2(r4)
|
||||
ldreq ip, [r0], #4
|
||||
ldreq r3, [r1], #4
|
||||
beq 4b
|
||||
2:
|
||||
/* There's a zero or a different byte in the word */
|
||||
S2HIMEM r0, ip, #24
|
||||
S2LOMEM ip, ip, #8
|
||||
cmp r0, #1
|
||||
it cs
|
||||
cmpcs r0, r3, S2HIMEM #24
|
||||
it eq
|
||||
S2LOMEMEQ r3, r3, #8
|
||||
beq 2b
|
||||
/* On a big-endian machine, r0 contains the desired byte in bits
|
||||
0-7; on a little-endian machine they are in bits 24-31. In
|
||||
both cases the other bits in r0 are all zero. For r3 the
|
||||
interesting byte is at the other end of the word, but the
|
||||
other bits are not necessarily zero. We need a signed result
|
||||
representing the differnece in the unsigned bytes, so for the
|
||||
little-endian case we can't just shift the interesting bits
|
||||
up. */
|
||||
#ifdef __ARMEB__
|
||||
sub r0, r0, r3, lsr #24
|
||||
#else
|
||||
and r3, r3, #255
|
||||
#ifdef __thumb2__
|
||||
/* No RSB instruction in Thumb2 */
|
||||
lsr r0, r0, #24
|
||||
sub r0, r0, r3
|
||||
#else
|
||||
rsb r0, r3, r0, lsr #24
|
||||
#endif
|
||||
#endif
|
||||
#ifndef __thumb2__
|
||||
ldr r4, [sp], #4
|
||||
#endif
|
||||
RETURN
|
||||
|
||||
|
||||
strcmp_unaligned:
|
||||
|
||||
#if 0
|
||||
/* The assembly code below is based on the following alogrithm. */
|
||||
#ifdef __ARMEB__
|
||||
#define RSHIFT <<
|
||||
#define LSHIFT >>
|
||||
#else
|
||||
#define RSHIFT >>
|
||||
#define LSHIFT <<
|
||||
#endif
|
||||
|
||||
#define body(shift) \
|
||||
mask = 0xffffffffU RSHIFT shift; \
|
||||
w1 = *wp1++; \
|
||||
w2 = *wp2++; \
|
||||
do \
|
||||
{ \
|
||||
t1 = w1 & mask; \
|
||||
if (__builtin_expect(t1 != w2 RSHIFT shift, 0)) \
|
||||
{ \
|
||||
w2 RSHIFT= shift; \
|
||||
break; \
|
||||
} \
|
||||
if (__builtin_expect(((w1 - b1) & ~w1) & (b1 << 7), 0)) \
|
||||
{ \
|
||||
/* See comment in assembler below re syndrome on big-endian */\
|
||||
if ((((w1 - b1) & ~w1) & (b1 << 7)) & mask) \
|
||||
w2 RSHIFT= shift; \
|
||||
else \
|
||||
{ \
|
||||
w2 = *wp2; \
|
||||
t1 = w1 RSHIFT (32 - shift); \
|
||||
w2 = (w2 LSHIFT (32 - shift)) RSHIFT (32 - shift); \
|
||||
} \
|
||||
break; \
|
||||
} \
|
||||
w2 = *wp2++; \
|
||||
t1 ^= w1; \
|
||||
if (__builtin_expect(t1 != w2 LSHIFT (32 - shift), 0)) \
|
||||
{ \
|
||||
t1 = w1 >> (32 - shift); \
|
||||
w2 = (w2 << (32 - shift)) RSHIFT (32 - shift); \
|
||||
break; \
|
||||
} \
|
||||
w1 = *wp1++; \
|
||||
} while (1)
|
||||
|
||||
const unsigned* wp1;
|
||||
const unsigned* wp2;
|
||||
unsigned w1, w2;
|
||||
unsigned mask;
|
||||
unsigned shift;
|
||||
unsigned b1 = 0x01010101;
|
||||
char c1, c2;
|
||||
unsigned t1;
|
||||
|
||||
while (((unsigned) s1) & 3)
|
||||
{
|
||||
c1 = *s1++;
|
||||
c2 = *s2++;
|
||||
if (c1 == 0 || c1 != c2)
|
||||
return c1 - (int)c2;
|
||||
}
|
||||
wp1 = (unsigned*) (((unsigned)s1) & ~3);
|
||||
wp2 = (unsigned*) (((unsigned)s2) & ~3);
|
||||
t1 = ((unsigned) s2) & 3;
|
||||
if (t1 == 1)
|
||||
{
|
||||
body(8);
|
||||
}
|
||||
else if (t1 == 2)
|
||||
{
|
||||
body(16);
|
||||
}
|
||||
else
|
||||
{
|
||||
body (24);
|
||||
}
|
||||
|
||||
do
|
||||
{
|
||||
#ifdef __ARMEB__
|
||||
c1 = (char) t1 >> 24;
|
||||
c2 = (char) w2 >> 24;
|
||||
#else /* not __ARMEB__ */
|
||||
c1 = (char) t1;
|
||||
c2 = (char) w2;
|
||||
#endif /* not __ARMEB__ */
|
||||
t1 RSHIFT= 8;
|
||||
w2 RSHIFT= 8;
|
||||
} while (c1 != 0 && c1 == c2);
|
||||
return c1 - c2;
|
||||
#endif /* 0 */
|
||||
|
||||
|
||||
wp1 .req r0
|
||||
wp2 .req r1
|
||||
b1 .req r2
|
||||
w1 .req r4
|
||||
w2 .req r5
|
||||
t1 .req ip
|
||||
@ r3 is scratch
|
||||
|
||||
/* First of all, compare bytes until wp1(sp1) is word-aligned. */
|
||||
1:
|
||||
tst wp1, #3
|
||||
beq 2f
|
||||
ldrb r2, [wp1], #1
|
||||
ldrb r3, [wp2], #1
|
||||
cmp r2, #1
|
||||
it cs
|
||||
cmpcs r2, r3
|
||||
beq 1b
|
||||
sub r0, r2, r3
|
||||
RETURN
|
||||
|
||||
2:
|
||||
str r5, [sp, #-4]!
|
||||
str r4, [sp, #-4]!
|
||||
//stmfd sp!, {r4, r5}
|
||||
mov b1, #1
|
||||
orr b1, b1, b1, lsl #8
|
||||
orr b1, b1, b1, lsl #16
|
||||
|
||||
and t1, wp2, #3
|
||||
bic wp2, wp2, #3
|
||||
ldr w1, [wp1], #4
|
||||
ldr w2, [wp2], #4
|
||||
cmp t1, #2
|
||||
beq 2f
|
||||
bhi 3f
|
||||
|
||||
/* Critical inner Loop: Block with 3 bytes initial overlap */
|
||||
.p2align 2
|
||||
1:
|
||||
bic t1, w1, MSB
|
||||
cmp t1, w2, S2LOMEM #8
|
||||
sub r3, w1, b1
|
||||
bic r3, r3, w1
|
||||
bne 4f
|
||||
ands r3, r3, b1, lsl #7
|
||||
it eq
|
||||
ldreq w2, [wp2], #4
|
||||
bne 5f
|
||||
eor t1, t1, w1
|
||||
cmp t1, w2, S2HIMEM #24
|
||||
bne 6f
|
||||
ldr w1, [wp1], #4
|
||||
b 1b
|
||||
4:
|
||||
S2LOMEM w2, w2, #8
|
||||
b 8f
|
||||
|
||||
5:
|
||||
#ifdef __ARMEB__
|
||||
/* The syndrome value may contain false ones if the string ends
|
||||
with the bytes 0x01 0x00 */
|
||||
tst w1, #0xff000000
|
||||
itt ne
|
||||
tstne w1, #0x00ff0000
|
||||
tstne w1, #0x0000ff00
|
||||
beq 7f
|
||||
#else
|
||||
bics r3, r3, #0xff000000
|
||||
bne 7f
|
||||
#endif
|
||||
ldrb w2, [wp2]
|
||||
S2LOMEM t1, w1, #24
|
||||
#ifdef __ARMEB__
|
||||
lsl w2, w2, #24
|
||||
#endif
|
||||
b 8f
|
||||
|
||||
6:
|
||||
S2LOMEM t1, w1, #24
|
||||
and w2, w2, LSB
|
||||
b 8f
|
||||
|
||||
/* Critical inner Loop: Block with 2 bytes initial overlap */
|
||||
.p2align 2
|
||||
2:
|
||||
S2HIMEM t1, w1, #16
|
||||
sub r3, w1, b1
|
||||
S2LOMEM t1, t1, #16
|
||||
bic r3, r3, w1
|
||||
cmp t1, w2, S2LOMEM #16
|
||||
bne 4f
|
||||
ands r3, r3, b1, lsl #7
|
||||
it eq
|
||||
ldreq w2, [wp2], #4
|
||||
bne 5f
|
||||
eor t1, t1, w1
|
||||
cmp t1, w2, S2HIMEM #16
|
||||
bne 6f
|
||||
ldr w1, [wp1], #4
|
||||
b 2b
|
||||
|
||||
5:
|
||||
#ifdef __ARMEB__
|
||||
/* The syndrome value may contain false ones if the string ends
|
||||
with the bytes 0x01 0x00 */
|
||||
tst w1, #0xff000000
|
||||
it ne
|
||||
tstne w1, #0x00ff0000
|
||||
beq 7f
|
||||
#else
|
||||
lsls r3, r3, #16
|
||||
bne 7f
|
||||
#endif
|
||||
ldrh w2, [wp2]
|
||||
S2LOMEM t1, w1, #16
|
||||
#ifdef __ARMEB__
|
||||
lsl w2, w2, #16
|
||||
#endif
|
||||
b 8f
|
||||
|
||||
6:
|
||||
S2HIMEM w2, w2, #16
|
||||
S2LOMEM t1, w1, #16
|
||||
4:
|
||||
S2LOMEM w2, w2, #16
|
||||
b 8f
|
||||
|
||||
/* Critical inner Loop: Block with 1 byte initial overlap */
|
||||
.p2align 2
|
||||
3:
|
||||
and t1, w1, LSB
|
||||
cmp t1, w2, S2LOMEM #24
|
||||
sub r3, w1, b1
|
||||
bic r3, r3, w1
|
||||
bne 4f
|
||||
ands r3, r3, b1, lsl #7
|
||||
it eq
|
||||
ldreq w2, [wp2], #4
|
||||
bne 5f
|
||||
eor t1, t1, w1
|
||||
cmp t1, w2, S2HIMEM #8
|
||||
bne 6f
|
||||
ldr w1, [wp1], #4
|
||||
b 3b
|
||||
4:
|
||||
S2LOMEM w2, w2, #24
|
||||
b 8f
|
||||
5:
|
||||
/* The syndrome value may contain false ones if the string ends
|
||||
with the bytes 0x01 0x00 */
|
||||
tst w1, LSB
|
||||
beq 7f
|
||||
ldr w2, [wp2], #4
|
||||
6:
|
||||
S2LOMEM t1, w1, #8
|
||||
bic w2, w2, MSB
|
||||
b 8f
|
||||
7:
|
||||
mov r0, #0
|
||||
//ldmfd sp!, {r4, r5}
|
||||
ldr r4, [sp], #4
|
||||
ldr r5, [sp], #4
|
||||
RETURN
|
||||
8:
|
||||
and r2, t1, LSB
|
||||
and r0, w2, LSB
|
||||
cmp r0, #1
|
||||
it cs
|
||||
cmpcs r0, r2
|
||||
itt eq
|
||||
S2LOMEMEQ t1, t1, #8
|
||||
S2LOMEMEQ w2, w2, #8
|
||||
beq 8b
|
||||
sub r0, r2, r0
|
||||
//ldmfd sp!, {r4, r5}
|
||||
ldr r4, [sp], #4
|
||||
ldr r5, [sp], #4
|
||||
RETURN
|
||||
|
||||
#endif /* !(defined (_ISA_THUMB_2) || defined (_ISA_ARM_6)
|
||||
defined (__OPTIMIZE_SIZE__) || defined (PREFER_SIZE_OVER_SPEED) ||
|
||||
(defined (__thumb__) && !defined (__thumb2__))) */
|
||||
@@ -25,22 +25,47 @@
|
||||
* OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
|
||||
* SUCH DAMAGE.
|
||||
*/
|
||||
#include <sys/linux-syscalls.h>
|
||||
|
||||
#include <linux/err.h>
|
||||
#include <machine/asm.h>
|
||||
|
||||
ENTRY(syscall)
|
||||
.text
|
||||
.align 4
|
||||
.type syscall,#function
|
||||
.globl syscall
|
||||
|
||||
.text
|
||||
.align
|
||||
|
||||
#if __ARM_EABI__
|
||||
|
||||
syscall:
|
||||
mov ip, sp
|
||||
stmfd sp!, {r4, r5, r6, r7}
|
||||
stmfd sp!, {r4, r5, r6, r7}
|
||||
mov r7, r0
|
||||
mov r0, r1
|
||||
mov r1, r2
|
||||
mov r2, r3
|
||||
ldmfd ip, {r3, r4, r5, r6}
|
||||
ldmfd ip, {r3, r4, r5, r6}
|
||||
swi #0
|
||||
ldmfd sp!, {r4, r5, r6, r7}
|
||||
cmn r0, #(MAX_ERRNO + 1)
|
||||
bxls lr
|
||||
neg r0, r0
|
||||
b __set_errno
|
||||
END(syscall)
|
||||
movs r0, r0
|
||||
bxpl lr
|
||||
b __set_syscall_errno
|
||||
|
||||
#else
|
||||
|
||||
#ifndef __NR_syscall
|
||||
#define __NR_syscall 113
|
||||
#endif
|
||||
|
||||
syscall:
|
||||
stmfd sp!, {r4, r5, lr}
|
||||
ldr r4, [sp, #12]
|
||||
ldr r5, [sp, #16]
|
||||
swi __NR_syscall
|
||||
ldmfd sp!, {r4, r5, lr}
|
||||
movs r0, r0
|
||||
bxpl lr
|
||||
b __set_syscall_errno
|
||||
|
||||
#endif
|
||||
|
||||
@@ -25,11 +25,6 @@
|
||||
* OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
|
||||
* SUCH DAMAGE.
|
||||
*/
|
||||
|
||||
#include <linux/err.h>
|
||||
#include <asm/unistd.h>
|
||||
#include <machine/asm.h>
|
||||
|
||||
/* unlike our auto-generated syscall stubs, this code saves lr
|
||||
on the stack, as well as a few other registers. this makes
|
||||
our stack unwinder happy, when we generate debug stack
|
||||
@@ -38,13 +33,19 @@
|
||||
of a corrupted malloc heap).
|
||||
*/
|
||||
|
||||
#include <sys/linux-syscalls.h>
|
||||
#include <machine/asm.h>
|
||||
|
||||
#ifndef __NR_tgkill
|
||||
#define __NR_tgkill 268
|
||||
#endif
|
||||
|
||||
ENTRY(tgkill)
|
||||
stmfd sp!, {r4-r7, ip, lr}
|
||||
ldr r7, =__NR_tgkill
|
||||
swi #0
|
||||
ldmfd sp!, {r4-r7, ip, lr}
|
||||
cmn r0, #(MAX_ERRNO + 1)
|
||||
bxls lr
|
||||
neg r0, r0
|
||||
b __set_errno
|
||||
movs r0, r0
|
||||
bxpl lr
|
||||
b __set_syscall_errno
|
||||
END(tgkill)
|
||||
|
||||
@@ -25,11 +25,6 @@
|
||||
* OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
|
||||
* SUCH DAMAGE.
|
||||
*/
|
||||
|
||||
#include <linux/err.h>
|
||||
#include <asm/unistd.h>
|
||||
#include <machine/asm.h>
|
||||
|
||||
/* unlike our auto-generated syscall stubs, this code saves lr
|
||||
on the stack, as well as a few other registers. this makes
|
||||
our stack unwinder happy, when we generate debug stack
|
||||
@@ -38,13 +33,19 @@
|
||||
of a corrupted malloc heap).
|
||||
*/
|
||||
|
||||
#include <sys/linux-syscalls.h>
|
||||
#include <machine/asm.h>
|
||||
|
||||
#ifndef __NR_tkill
|
||||
#define __NR_tkill 238
|
||||
#endif
|
||||
|
||||
ENTRY(tkill)
|
||||
stmfd sp!, {r4-r7, ip, lr}
|
||||
ldr r7, =__NR_tkill
|
||||
swi #0
|
||||
ldmfd sp!, {r4-r7, ip, lr}
|
||||
cmn r0, #(MAX_ERRNO + 1)
|
||||
bxls lr
|
||||
neg r0, r0
|
||||
b __set_errno
|
||||
movs r0, r0
|
||||
bxpl lr
|
||||
b __set_syscall_errno
|
||||
END(tkill)
|
||||
|
||||
@@ -1,146 +0,0 @@
|
||||
/*
|
||||
* Copyright (C) 2008 The Android Open Source Project
|
||||
* All rights reserved.
|
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without
|
||||
* modification, are permitted provided that the following conditions
|
||||
* are met:
|
||||
* * Redistributions of source code must retain the above copyright
|
||||
* notice, this list of conditions and the following disclaimer.
|
||||
* * Redistributions in binary form must reproduce the above copyright
|
||||
* notice, this list of conditions and the following disclaimer in
|
||||
* the documentation and/or other materials provided with the
|
||||
* distribution.
|
||||
*
|
||||
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
|
||||
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
|
||||
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
|
||||
* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
|
||||
* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
|
||||
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
|
||||
* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
|
||||
* OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
|
||||
* AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
|
||||
* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT
|
||||
* OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
|
||||
* SUCH DAMAGE.
|
||||
*/
|
||||
|
||||
/* Assumes neon instructions and a cache line size of 64 bytes. */
|
||||
|
||||
#include <machine/cpu-features.h>
|
||||
#include <machine/asm.h>
|
||||
|
||||
/*
|
||||
* This code assumes it is running on a processor that supports all arm v7
|
||||
* instructions, that supports neon instructions, and that has a 64 byte
|
||||
* cache line.
|
||||
*/
|
||||
|
||||
.text
|
||||
.fpu neon
|
||||
|
||||
#define CACHE_LINE_SIZE 64
|
||||
|
||||
ENTRY(memcpy)
|
||||
.save {r0, lr}
|
||||
/* start preloading as early as possible */
|
||||
pld [r1, #(CACHE_LINE_SIZE*0)]
|
||||
stmfd sp!, {r0, lr}
|
||||
pld [r1, #(CACHE_LINE_SIZE*1)]
|
||||
|
||||
/* do we have at least 16-bytes to copy (needed for alignment below) */
|
||||
cmp r2, #16
|
||||
blo 5f
|
||||
|
||||
/* align destination to cache-line for the write-buffer */
|
||||
rsb r3, r0, #0
|
||||
ands r3, r3, #0xF
|
||||
beq 0f
|
||||
|
||||
/* copy up to 15-bytes (count in r3) */
|
||||
sub r2, r2, r3
|
||||
movs ip, r3, lsl #31
|
||||
ldrmib lr, [r1], #1
|
||||
strmib lr, [r0], #1
|
||||
ldrcsb ip, [r1], #1
|
||||
ldrcsb lr, [r1], #1
|
||||
strcsb ip, [r0], #1
|
||||
strcsb lr, [r0], #1
|
||||
movs ip, r3, lsl #29
|
||||
bge 1f
|
||||
// copies 4 bytes, destination 32-bits aligned
|
||||
vld4.8 {d0[0], d1[0], d2[0], d3[0]}, [r1]!
|
||||
vst4.8 {d0[0], d1[0], d2[0], d3[0]}, [r0, :32]!
|
||||
1: bcc 2f
|
||||
// copies 8 bytes, destination 64-bits aligned
|
||||
vld1.8 {d0}, [r1]!
|
||||
vst1.8 {d0}, [r0, :64]!
|
||||
2:
|
||||
|
||||
0: /* preload immediately the next cache line, which we may need */
|
||||
pld [r1, #(CACHE_LINE_SIZE*0)]
|
||||
pld [r1, #(CACHE_LINE_SIZE*1)]
|
||||
|
||||
/* make sure we have at least 64 bytes to copy */
|
||||
subs r2, r2, #64
|
||||
blo 2f
|
||||
|
||||
/* Preload all the cache lines we need.
|
||||
* NOTE: The number of pld below depends on CACHE_LINE_SIZE,
|
||||
* ideally we would increase the distance in the main loop to
|
||||
* avoid the goofy code below. In practice this doesn't seem to make
|
||||
* a big difference.
|
||||
* NOTE: The value CACHE_LINE_SIZE * 4 was chosen through
|
||||
* experimentation.
|
||||
*/
|
||||
pld [r1, #(CACHE_LINE_SIZE*2)]
|
||||
pld [r1, #(CACHE_LINE_SIZE*3)]
|
||||
pld [r1, #(CACHE_LINE_SIZE*4)]
|
||||
|
||||
1: /* The main loop copies 64 bytes at a time */
|
||||
vld1.8 {d0 - d3}, [r1]!
|
||||
vld1.8 {d4 - d7}, [r1]!
|
||||
pld [r1, #(CACHE_LINE_SIZE*4)]
|
||||
subs r2, r2, #64
|
||||
vst1.8 {d0 - d3}, [r0, :128]!
|
||||
vst1.8 {d4 - d7}, [r0, :128]!
|
||||
bhs 1b
|
||||
|
||||
2: /* fix-up the remaining count and make sure we have >= 32 bytes left */
|
||||
add r2, r2, #64
|
||||
subs r2, r2, #32
|
||||
blo 4f
|
||||
|
||||
3: /* 32 bytes at a time. These cache lines were already preloaded */
|
||||
vld1.8 {d0 - d3}, [r1]!
|
||||
subs r2, r2, #32
|
||||
vst1.8 {d0 - d3}, [r0, :128]!
|
||||
bhs 3b
|
||||
4: /* less than 32 left */
|
||||
add r2, r2, #32
|
||||
tst r2, #0x10
|
||||
beq 5f
|
||||
// copies 16 bytes, 128-bits aligned
|
||||
vld1.8 {d0, d1}, [r1]!
|
||||
vst1.8 {d0, d1}, [r0, :128]!
|
||||
|
||||
5: /* copy up to 15-bytes (count in r2) */
|
||||
movs ip, r2, lsl #29
|
||||
bcc 1f
|
||||
vld1.8 {d0}, [r1]!
|
||||
vst1.8 {d0}, [r0]!
|
||||
1: bge 2f
|
||||
vld4.8 {d0[0], d1[0], d2[0], d3[0]}, [r1]!
|
||||
vst4.8 {d0[0], d1[0], d2[0], d3[0]}, [r0]!
|
||||
2: movs ip, r2, lsl #31
|
||||
ldrmib r3, [r1], #1
|
||||
ldrcsb ip, [r1], #1
|
||||
ldrcsb lr, [r1], #1
|
||||
strmib r3, [r0], #1
|
||||
strcsb ip, [r0], #1
|
||||
strcsb lr, [r0], #1
|
||||
|
||||
ldmfd sp!, {r0, lr}
|
||||
bx lr
|
||||
END(memcpy)
|
||||
@@ -1,106 +0,0 @@
|
||||
/*
|
||||
* Copyright (C) 2008 The Android Open Source Project
|
||||
* All rights reserved.
|
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without
|
||||
* modification, are permitted provided that the following conditions
|
||||
* are met:
|
||||
* * Redistributions of source code must retain the above copyright
|
||||
* notice, this list of conditions and the following disclaimer.
|
||||
* * Redistributions in binary form must reproduce the above copyright
|
||||
* notice, this list of conditions and the following disclaimer in
|
||||
* the documentation and/or other materials provided with the
|
||||
* distribution.
|
||||
*
|
||||
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
|
||||
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
|
||||
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
|
||||
* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
|
||||
* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
|
||||
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
|
||||
* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
|
||||
* OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
|
||||
* AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
|
||||
* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT
|
||||
* OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
|
||||
* SUCH DAMAGE.
|
||||
*/
|
||||
|
||||
#include <machine/cpu-features.h>
|
||||
#include <machine/asm.h>
|
||||
|
||||
/*
|
||||
* Optimized memset() for ARM.
|
||||
*
|
||||
* memset() returns its first argument.
|
||||
*/
|
||||
|
||||
.fpu neon
|
||||
|
||||
ENTRY(bzero)
|
||||
mov r2, r1
|
||||
mov r1, #0
|
||||
// Fall through to memset...
|
||||
END(bzero)
|
||||
|
||||
ENTRY(memset)
|
||||
.save {r0}
|
||||
stmfd sp!, {r0}
|
||||
|
||||
vdup.8 q0, r1
|
||||
|
||||
/* do we have at least 16-bytes to write (needed for alignment below) */
|
||||
cmp r2, #16
|
||||
blo 3f
|
||||
|
||||
/* align destination to 16 bytes for the write-buffer */
|
||||
rsb r3, r0, #0
|
||||
ands r3, r3, #0xF
|
||||
beq 2f
|
||||
|
||||
/* write up to 15-bytes (count in r3) */
|
||||
sub r2, r2, r3
|
||||
movs ip, r3, lsl #31
|
||||
strmib r1, [r0], #1
|
||||
strcsb r1, [r0], #1
|
||||
strcsb r1, [r0], #1
|
||||
movs ip, r3, lsl #29
|
||||
bge 1f
|
||||
|
||||
// writes 4 bytes, 32-bits aligned
|
||||
vst1.32 {d0[0]}, [r0, :32]!
|
||||
1: bcc 2f
|
||||
|
||||
// writes 8 bytes, 64-bits aligned
|
||||
vst1.8 {d0}, [r0, :64]!
|
||||
2:
|
||||
/* make sure we have at least 32 bytes to write */
|
||||
subs r2, r2, #32
|
||||
blo 2f
|
||||
vmov q1, q0
|
||||
|
||||
1: /* The main loop writes 32 bytes at a time */
|
||||
subs r2, r2, #32
|
||||
vst1.8 {d0 - d3}, [r0, :128]!
|
||||
bhs 1b
|
||||
|
||||
2: /* less than 32 left */
|
||||
add r2, r2, #32
|
||||
tst r2, #0x10
|
||||
beq 3f
|
||||
|
||||
// writes 16 bytes, 128-bits aligned
|
||||
vst1.8 {d0, d1}, [r0, :128]!
|
||||
3: /* write up to 15-bytes (count in r2) */
|
||||
movs ip, r2, lsl #29
|
||||
bcc 1f
|
||||
vst1.8 {d0}, [r0]!
|
||||
1: bge 2f
|
||||
vst1.32 {d0[0]}, [r0]!
|
||||
2: movs ip, r2, lsl #31
|
||||
strmib r1, [r0], #1
|
||||
strcsb r1, [r0], #1
|
||||
strcsb r1, [r0], #1
|
||||
ldmfd sp!, {r0}
|
||||
bx lr
|
||||
END(memset)
|
||||
@@ -1,377 +0,0 @@
|
||||
/*
|
||||
* Copyright (c) 2013 ARM Ltd
|
||||
* All rights reserved.
|
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without
|
||||
* modification, are permitted provided that the following conditions
|
||||
* are met:
|
||||
* 1. Redistributions of source code must retain the above copyright
|
||||
* notice, this list of conditions and the following disclaimer.
|
||||
* 2. Redistributions in binary form must reproduce the above copyright
|
||||
* notice, this list of conditions and the following disclaimer in the
|
||||
* documentation and/or other materials provided with the distribution.
|
||||
* 3. The name of the company may not be used to endorse or promote
|
||||
* products derived from this software without specific prior written
|
||||
* permission.
|
||||
*
|
||||
* THIS SOFTWARE IS PROVIDED BY ARM LTD ``AS IS'' AND ANY EXPRESS OR IMPLIED
|
||||
* WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
|
||||
* MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
|
||||
* IN NO EVENT SHALL ARM LTD BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
|
||||
* SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED
|
||||
* TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR
|
||||
* PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF
|
||||
* LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING
|
||||
* NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
|
||||
* SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
|
||||
*/
|
||||
|
||||
#include <machine/cpu-features.h>
|
||||
#include <machine/asm.h>
|
||||
|
||||
#ifdef __ARMEB__
|
||||
#define S2LOMEM lsl
|
||||
#define S2LOMEMEQ lsleq
|
||||
#define S2HIMEM lsr
|
||||
#define MSB 0x000000ff
|
||||
#define LSB 0xff000000
|
||||
#define BYTE0_OFFSET 24
|
||||
#define BYTE1_OFFSET 16
|
||||
#define BYTE2_OFFSET 8
|
||||
#define BYTE3_OFFSET 0
|
||||
#else /* not __ARMEB__ */
|
||||
#define S2LOMEM lsr
|
||||
#define S2LOMEMEQ lsreq
|
||||
#define S2HIMEM lsl
|
||||
#define BYTE0_OFFSET 0
|
||||
#define BYTE1_OFFSET 8
|
||||
#define BYTE2_OFFSET 16
|
||||
#define BYTE3_OFFSET 24
|
||||
#define MSB 0xff000000
|
||||
#define LSB 0x000000ff
|
||||
#endif /* not __ARMEB__ */
|
||||
|
||||
.syntax unified
|
||||
|
||||
#if defined (__thumb__)
|
||||
.thumb
|
||||
.thumb_func
|
||||
#endif
|
||||
|
||||
ENTRY(strcmp)
|
||||
/* Use LDRD whenever possible. */
|
||||
|
||||
/* The main thing to look out for when comparing large blocks is that
|
||||
the loads do not cross a page boundary when loading past the index
|
||||
of the byte with the first difference or the first string-terminator.
|
||||
|
||||
For example, if the strings are identical and the string-terminator
|
||||
is at index k, byte by byte comparison will not load beyond address
|
||||
s1+k and s2+k; word by word comparison may load up to 3 bytes beyond
|
||||
k; double word - up to 7 bytes. If the load of these bytes crosses
|
||||
a page boundary, it might cause a memory fault (if the page is not mapped)
|
||||
that would not have happened in byte by byte comparison.
|
||||
|
||||
If an address is (double) word aligned, then a load of a (double) word
|
||||
from that address will not cross a page boundary.
|
||||
Therefore, the algorithm below considers word and double-word alignment
|
||||
of strings separately. */
|
||||
|
||||
/* High-level description of the algorithm.
|
||||
|
||||
* The fast path: if both strings are double-word aligned,
|
||||
use LDRD to load two words from each string in every loop iteration.
|
||||
* If the strings have the same offset from a word boundary,
|
||||
use LDRB to load and compare byte by byte until
|
||||
the first string is aligned to a word boundary (at most 3 bytes).
|
||||
This is optimized for quick return on short unaligned strings.
|
||||
* If the strings have the same offset from a double-word boundary,
|
||||
use LDRD to load two words from each string in every loop iteration, as in the fast path.
|
||||
* If the strings do not have the same offset from a double-word boundary,
|
||||
load a word from the second string before the loop to initialize the queue.
|
||||
Use LDRD to load two words from every string in every loop iteration.
|
||||
Inside the loop, load the second word from the second string only after comparing
|
||||
the first word, using the queued value, to guarantee safety across page boundaries.
|
||||
* If the strings do not have the same offset from a word boundary,
|
||||
use LDR and a shift queue. Order of loads and comparisons matters,
|
||||
similarly to the previous case.
|
||||
|
||||
* Use UADD8 and SEL to compare words, and use REV and CLZ to compute the return value.
|
||||
* The only difference between ARM and Thumb modes is the use of CBZ instruction.
|
||||
* The only difference between big and little endian is the use of REV in little endian
|
||||
to compute the return value, instead of MOV.
|
||||
*/
|
||||
|
||||
.macro m_cbz reg label
|
||||
#ifdef __thumb2__
|
||||
cbz \reg, \label
|
||||
#else /* not defined __thumb2__ */
|
||||
cmp \reg, #0
|
||||
beq \label
|
||||
#endif /* not defined __thumb2__ */
|
||||
.endm /* m_cbz */
|
||||
|
||||
.macro m_cbnz reg label
|
||||
#ifdef __thumb2__
|
||||
cbnz \reg, \label
|
||||
#else /* not defined __thumb2__ */
|
||||
cmp \reg, #0
|
||||
bne \label
|
||||
#endif /* not defined __thumb2__ */
|
||||
.endm /* m_cbnz */
|
||||
|
||||
.macro init
|
||||
/* Macro to save temporary registers and prepare magic values. */
|
||||
subs sp, sp, #16
|
||||
strd r4, r5, [sp, #8]
|
||||
strd r6, r7, [sp]
|
||||
mvn r6, #0 /* all F */
|
||||
mov r7, #0 /* all 0 */
|
||||
.endm /* init */
|
||||
|
||||
.macro magic_compare_and_branch w1 w2 label
|
||||
/* Macro to compare registers w1 and w2 and conditionally branch to label. */
|
||||
cmp \w1, \w2 /* Are w1 and w2 the same? */
|
||||
magic_find_zero_bytes \w1
|
||||
it eq
|
||||
cmpeq ip, #0 /* Is there a zero byte in w1? */
|
||||
bne \label
|
||||
.endm /* magic_compare_and_branch */
|
||||
|
||||
.macro magic_find_zero_bytes w1
|
||||
/* Macro to find all-zero bytes in w1, result is in ip. */
|
||||
#if (defined (__ARM_FEATURE_DSP))
|
||||
uadd8 ip, \w1, r6
|
||||
sel ip, r7, r6
|
||||
#else /* not defined (__ARM_FEATURE_DSP) */
|
||||
/* __ARM_FEATURE_DSP is not defined for some Cortex-M processors.
|
||||
Coincidently, these processors only have Thumb-2 mode, where we can use the
|
||||
the (large) magic constant available directly as an immediate in instructions.
|
||||
Note that we cannot use the magic constant in ARM mode, where we need
|
||||
to create the constant in a register. */
|
||||
sub ip, \w1, #0x01010101
|
||||
bic ip, ip, \w1
|
||||
and ip, ip, #0x80808080
|
||||
#endif /* not defined (__ARM_FEATURE_DSP) */
|
||||
.endm /* magic_find_zero_bytes */
|
||||
|
||||
.macro setup_return w1 w2
|
||||
#ifdef __ARMEB__
|
||||
mov r1, \w1
|
||||
mov r2, \w2
|
||||
#else /* not __ARMEB__ */
|
||||
rev r1, \w1
|
||||
rev r2, \w2
|
||||
#endif /* not __ARMEB__ */
|
||||
.endm /* setup_return */
|
||||
|
||||
pld [r0, #0]
|
||||
pld [r1, #0]
|
||||
|
||||
/* Are both strings double-word aligned? */
|
||||
orr ip, r0, r1
|
||||
tst ip, #7
|
||||
bne do_align
|
||||
|
||||
/* Fast path. */
|
||||
init
|
||||
|
||||
doubleword_aligned:
|
||||
|
||||
/* Get here when the strings to compare are double-word aligned. */
|
||||
/* Compare two words in every iteration. */
|
||||
.p2align 2
|
||||
2:
|
||||
pld [r0, #16]
|
||||
pld [r1, #16]
|
||||
|
||||
/* Load the next double-word from each string. */
|
||||
ldrd r2, r3, [r0], #8
|
||||
ldrd r4, r5, [r1], #8
|
||||
|
||||
magic_compare_and_branch w1=r2, w2=r4, label=return_24
|
||||
magic_compare_and_branch w1=r3, w2=r5, label=return_35
|
||||
b 2b
|
||||
|
||||
do_align:
|
||||
/* Is the first string word-aligned? */
|
||||
ands ip, r0, #3
|
||||
beq word_aligned_r0
|
||||
|
||||
/* Fast compare byte by byte until the first string is word-aligned. */
|
||||
/* The offset of r0 from a word boundary is in ip. Thus, the number of bytes
|
||||
to read until the next word boundary is 4-ip. */
|
||||
bic r0, r0, #3
|
||||
ldr r2, [r0], #4
|
||||
lsls ip, ip, #31
|
||||
beq byte2
|
||||
bcs byte3
|
||||
|
||||
byte1:
|
||||
ldrb ip, [r1], #1
|
||||
uxtb r3, r2, ror #BYTE1_OFFSET
|
||||
subs ip, r3, ip
|
||||
bne fast_return
|
||||
m_cbz reg=r3, label=fast_return
|
||||
|
||||
byte2:
|
||||
ldrb ip, [r1], #1
|
||||
uxtb r3, r2, ror #BYTE2_OFFSET
|
||||
subs ip, r3, ip
|
||||
bne fast_return
|
||||
m_cbz reg=r3, label=fast_return
|
||||
|
||||
byte3:
|
||||
ldrb ip, [r1], #1
|
||||
uxtb r3, r2, ror #BYTE3_OFFSET
|
||||
subs ip, r3, ip
|
||||
bne fast_return
|
||||
m_cbnz reg=r3, label=word_aligned_r0
|
||||
|
||||
fast_return:
|
||||
mov r0, ip
|
||||
bx lr
|
||||
|
||||
word_aligned_r0:
|
||||
init
|
||||
/* The first string is word-aligned. */
|
||||
/* Is the second string word-aligned? */
|
||||
ands ip, r1, #3
|
||||
bne strcmp_unaligned
|
||||
|
||||
word_aligned:
|
||||
/* The strings are word-aligned. */
|
||||
/* Is the first string double-word aligned? */
|
||||
tst r0, #4
|
||||
beq doubleword_aligned_r0
|
||||
|
||||
/* If r0 is not double-word aligned yet, align it by loading
|
||||
and comparing the next word from each string. */
|
||||
ldr r2, [r0], #4
|
||||
ldr r4, [r1], #4
|
||||
magic_compare_and_branch w1=r2 w2=r4 label=return_24
|
||||
|
||||
doubleword_aligned_r0:
|
||||
/* Get here when r0 is double-word aligned. */
|
||||
/* Is r1 doubleword_aligned? */
|
||||
tst r1, #4
|
||||
beq doubleword_aligned
|
||||
|
||||
/* Get here when the strings to compare are word-aligned,
|
||||
r0 is double-word aligned, but r1 is not double-word aligned. */
|
||||
|
||||
/* Initialize the queue. */
|
||||
ldr r5, [r1], #4
|
||||
|
||||
/* Compare two words in every iteration. */
|
||||
.p2align 2
|
||||
3:
|
||||
pld [r0, #16]
|
||||
pld [r1, #16]
|
||||
|
||||
/* Load the next double-word from each string and compare. */
|
||||
ldrd r2, r3, [r0], #8
|
||||
magic_compare_and_branch w1=r2 w2=r5 label=return_25
|
||||
ldrd r4, r5, [r1], #8
|
||||
magic_compare_and_branch w1=r3 w2=r4 label=return_34
|
||||
b 3b
|
||||
|
||||
.macro miscmp_word offsetlo offsethi
|
||||
/* Macro to compare misaligned strings. */
|
||||
/* r0, r1 are word-aligned, and at least one of the strings
|
||||
is not double-word aligned. */
|
||||
/* Compare one word in every loop iteration. */
|
||||
/* OFFSETLO is the original bit-offset of r1 from a word-boundary,
|
||||
OFFSETHI is 32 - OFFSETLO (i.e., offset from the next word). */
|
||||
|
||||
/* Initialize the shift queue. */
|
||||
ldr r5, [r1], #4
|
||||
|
||||
/* Compare one word from each string in every loop iteration. */
|
||||
.p2align 2
|
||||
7:
|
||||
ldr r3, [r0], #4
|
||||
S2LOMEM r5, r5, #\offsetlo
|
||||
magic_find_zero_bytes w1=r3
|
||||
cmp r7, ip, S2HIMEM #\offsetlo
|
||||
and r2, r3, r6, S2LOMEM #\offsetlo
|
||||
it eq
|
||||
cmpeq r2, r5
|
||||
bne return_25
|
||||
ldr r5, [r1], #4
|
||||
cmp ip, #0
|
||||
eor r3, r2, r3
|
||||
S2HIMEM r2, r5, #\offsethi
|
||||
it eq
|
||||
cmpeq r3, r2
|
||||
bne return_32
|
||||
b 7b
|
||||
.endm /* miscmp_word */
|
||||
|
||||
strcmp_unaligned:
|
||||
/* r0 is word-aligned, r1 is at offset ip from a word. */
|
||||
/* Align r1 to the (previous) word-boundary. */
|
||||
bic r1, r1, #3
|
||||
|
||||
/* Unaligned comparison word by word using LDRs. */
|
||||
cmp ip, #2
|
||||
beq miscmp_word_16 /* If ip == 2. */
|
||||
bge miscmp_word_24 /* If ip == 3. */
|
||||
miscmp_word offsetlo=8 offsethi=24 /* If ip == 1. */
|
||||
miscmp_word_16: miscmp_word offsetlo=16 offsethi=16
|
||||
miscmp_word_24: miscmp_word offsetlo=24 offsethi=8
|
||||
|
||||
|
||||
return_32:
|
||||
setup_return w1=r3, w2=r2
|
||||
b do_return
|
||||
return_34:
|
||||
setup_return w1=r3, w2=r4
|
||||
b do_return
|
||||
return_25:
|
||||
setup_return w1=r2, w2=r5
|
||||
b do_return
|
||||
return_35:
|
||||
setup_return w1=r3, w2=r5
|
||||
b do_return
|
||||
return_24:
|
||||
setup_return w1=r2, w2=r4
|
||||
|
||||
do_return:
|
||||
|
||||
#ifdef __ARMEB__
|
||||
mov r0, ip
|
||||
#else /* not __ARMEB__ */
|
||||
rev r0, ip
|
||||
#endif /* not __ARMEB__ */
|
||||
|
||||
/* Restore temporaries early, before computing the return value. */
|
||||
ldrd r6, r7, [sp]
|
||||
ldrd r4, r5, [sp, #8]
|
||||
adds sp, sp, #16
|
||||
|
||||
/* There is a zero or a different byte between r1 and r2. */
|
||||
/* r0 contains a mask of all-zero bytes in r1. */
|
||||
/* Using r0 and not ip here because cbz requires low register. */
|
||||
m_cbz reg=r0, label=compute_return_value
|
||||
clz r0, r0
|
||||
/* r0 contains the number of bits on the left of the first all-zero byte in r1. */
|
||||
rsb r0, r0, #24
|
||||
/* Here, r0 contains the number of bits on the right of the first all-zero byte in r1. */
|
||||
lsr r1, r1, r0
|
||||
lsr r2, r2, r0
|
||||
|
||||
compute_return_value:
|
||||
movs r0, #1
|
||||
cmp r1, r2
|
||||
/* The return value is computed as follows.
|
||||
If r1>r2 then (C==1 and Z==0) and LS doesn't hold and r0 is #1 at return.
|
||||
If r1<r2 then (C==0 and Z==0) and we execute SBC with carry_in=0,
|
||||
which means r0:=r0-r0-1 and r0 is #-1 at return.
|
||||
If r1=r2 then (C==1 and Z==1) and we execute SBC with carry_in=1,
|
||||
which means r0:=r0-r0 and r0 is #0 at return.
|
||||
(C==0 and Z==1) cannot happen because the carry bit is "not borrow". */
|
||||
it ls
|
||||
sbcls r0, r0, r0
|
||||
bx lr
|
||||
END(strcmp)
|
||||
@@ -1,5 +0,0 @@
|
||||
$(call libc-add-cpu-variant-src,MEMCPY,arch-arm/cortex-a15/bionic/memcpy.S)
|
||||
$(call libc-add-cpu-variant-src,MEMSET,arch-arm/cortex-a15/bionic/memset.S)
|
||||
$(call libc-add-cpu-variant-src,STRCMP,arch-arm/cortex-a15/bionic/strcmp.S)
|
||||
|
||||
include bionic/libc/arch-arm/generic/generic.mk
|
||||
@@ -1 +0,0 @@
|
||||
include bionic/libc/arch-arm/cortex-a15/cortex-a15.mk
|
||||
@@ -1,211 +0,0 @@
|
||||
/*
|
||||
* Copyright (C) 2008 The Android Open Source Project
|
||||
* All rights reserved.
|
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without
|
||||
* modification, are permitted provided that the following conditions
|
||||
* are met:
|
||||
* * Redistributions of source code must retain the above copyright
|
||||
* notice, this list of conditions and the following disclaimer.
|
||||
* * Redistributions in binary form must reproduce the above copyright
|
||||
* notice, this list of conditions and the following disclaimer in
|
||||
* the documentation and/or other materials provided with the
|
||||
* distribution.
|
||||
*
|
||||
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
|
||||
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
|
||||
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
|
||||
* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
|
||||
* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
|
||||
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
|
||||
* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
|
||||
* OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
|
||||
* AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
|
||||
* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT
|
||||
* OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
|
||||
* SUCH DAMAGE.
|
||||
*/
|
||||
|
||||
#include <machine/cpu-features.h>
|
||||
#include <machine/asm.h>
|
||||
|
||||
/*
|
||||
* This code assumes it is running on a processor that supports all arm v7
|
||||
* instructions, that supports neon instructions, and that has a 32 byte
|
||||
* cache line.
|
||||
*/
|
||||
|
||||
.text
|
||||
.fpu neon
|
||||
|
||||
#define CACHE_LINE_SIZE 32
|
||||
|
||||
ENTRY(memcpy)
|
||||
.save {r0, lr}
|
||||
/* start preloading as early as possible */
|
||||
pld [r1, #(CACHE_LINE_SIZE * 0)]
|
||||
stmfd sp!, {r0, lr}
|
||||
pld [r1, #(CACHE_LINE_SIZE * 2)]
|
||||
|
||||
// Check so divider is at least 16 bytes, needed for alignment code.
|
||||
cmp r2, #16
|
||||
blo 5f
|
||||
|
||||
|
||||
/* check if buffers are aligned. If so, run arm-only version */
|
||||
eor r3, r0, r1
|
||||
ands r3, r3, #0x3
|
||||
beq 11f
|
||||
|
||||
/* Check the upper size limit for Neon unaligned memory access in memcpy */
|
||||
cmp r2, #224
|
||||
blo 3f
|
||||
|
||||
/* align destination to 16 bytes for the write-buffer */
|
||||
rsb r3, r0, #0
|
||||
ands r3, r3, #0xF
|
||||
beq 3f
|
||||
|
||||
/* copy up to 15-bytes (count in r3) */
|
||||
sub r2, r2, r3
|
||||
movs ip, r3, lsl #31
|
||||
ldrmib lr, [r1], #1
|
||||
strmib lr, [r0], #1
|
||||
ldrcsb ip, [r1], #1
|
||||
ldrcsb lr, [r1], #1
|
||||
strcsb ip, [r0], #1
|
||||
strcsb lr, [r0], #1
|
||||
movs ip, r3, lsl #29
|
||||
bge 1f
|
||||
// copies 4 bytes, destination 32-bits aligned
|
||||
vld1.32 {d0[0]}, [r1]!
|
||||
vst1.32 {d0[0]}, [r0, :32]!
|
||||
1: bcc 2f
|
||||
// copies 8 bytes, destination 64-bits aligned
|
||||
vld1.8 {d0}, [r1]!
|
||||
vst1.8 {d0}, [r0, :64]!
|
||||
2:
|
||||
/* preload immediately the next cache line, which we may need */
|
||||
pld [r1, #(CACHE_LINE_SIZE * 0)]
|
||||
pld [r1, #(CACHE_LINE_SIZE * 2)]
|
||||
3:
|
||||
/* make sure we have at least 64 bytes to copy */
|
||||
subs r2, r2, #64
|
||||
blo 2f
|
||||
|
||||
/* preload all the cache lines we need */
|
||||
pld [r1, #(CACHE_LINE_SIZE * 4)]
|
||||
pld [r1, #(CACHE_LINE_SIZE * 6)]
|
||||
|
||||
1: /* The main loop copies 64 bytes at a time */
|
||||
vld1.8 {d0 - d3}, [r1]!
|
||||
vld1.8 {d4 - d7}, [r1]!
|
||||
pld [r1, #(CACHE_LINE_SIZE * 6)]
|
||||
subs r2, r2, #64
|
||||
vst1.8 {d0 - d3}, [r0]!
|
||||
vst1.8 {d4 - d7}, [r0]!
|
||||
bhs 1b
|
||||
|
||||
2: /* fix-up the remaining count and make sure we have >= 32 bytes left */
|
||||
add r2, r2, #64
|
||||
subs r2, r2, #32
|
||||
blo 4f
|
||||
|
||||
3: /* 32 bytes at a time. These cache lines were already preloaded */
|
||||
vld1.8 {d0 - d3}, [r1]!
|
||||
subs r2, r2, #32
|
||||
vst1.8 {d0 - d3}, [r0]!
|
||||
bhs 3b
|
||||
|
||||
4: /* less than 32 left */
|
||||
add r2, r2, #32
|
||||
tst r2, #0x10
|
||||
beq 5f
|
||||
// copies 16 bytes, 128-bits aligned
|
||||
vld1.8 {d0, d1}, [r1]!
|
||||
vst1.8 {d0, d1}, [r0]!
|
||||
5: /* copy up to 15-bytes (count in r2) */
|
||||
movs ip, r2, lsl #29
|
||||
bcc 1f
|
||||
vld1.8 {d0}, [r1]!
|
||||
vst1.8 {d0}, [r0]!
|
||||
1: bge 2f
|
||||
vld1.32 {d0[0]}, [r1]!
|
||||
vst1.32 {d0[0]}, [r0]!
|
||||
2: movs ip, r2, lsl #31
|
||||
ldrmib r3, [r1], #1
|
||||
ldrcsb ip, [r1], #1
|
||||
ldrcsb lr, [r1], #1
|
||||
strmib r3, [r0], #1
|
||||
strcsb ip, [r0], #1
|
||||
strcsb lr, [r0], #1
|
||||
|
||||
ldmfd sp!, {r0, lr}
|
||||
bx lr
|
||||
11:
|
||||
/* Simple arm-only copy loop to handle aligned copy operations */
|
||||
stmfd sp!, {r4, r5, r6, r7, r8}
|
||||
pld [r1, #(CACHE_LINE_SIZE * 4)]
|
||||
|
||||
/* Check alignment */
|
||||
rsb r3, r1, #0
|
||||
ands r3, #3
|
||||
beq 2f
|
||||
|
||||
/* align source to 32 bits. We need to insert 2 instructions between
|
||||
* a ldr[b|h] and str[b|h] because byte and half-word instructions
|
||||
* stall 2 cycles.
|
||||
*/
|
||||
movs r12, r3, lsl #31
|
||||
sub r2, r2, r3 /* we know that r3 <= r2 because r2 >= 4 */
|
||||
ldrmib r3, [r1], #1
|
||||
ldrcsb r4, [r1], #1
|
||||
ldrcsb r5, [r1], #1
|
||||
strmib r3, [r0], #1
|
||||
strcsb r4, [r0], #1
|
||||
strcsb r5, [r0], #1
|
||||
|
||||
2:
|
||||
subs r2, r2, #64
|
||||
blt 4f
|
||||
|
||||
3: /* Main copy loop, copying 64 bytes at a time */
|
||||
pld [r1, #(CACHE_LINE_SIZE * 8)]
|
||||
ldmia r1!, {r3, r4, r5, r6, r7, r8, r12, lr}
|
||||
stmia r0!, {r3, r4, r5, r6, r7, r8, r12, lr}
|
||||
ldmia r1!, {r3, r4, r5, r6, r7, r8, r12, lr}
|
||||
stmia r0!, {r3, r4, r5, r6, r7, r8, r12, lr}
|
||||
subs r2, r2, #64
|
||||
bge 3b
|
||||
|
||||
4: /* Check if there are > 32 bytes left */
|
||||
adds r2, r2, #64
|
||||
subs r2, r2, #32
|
||||
blt 5f
|
||||
|
||||
/* Copy 32 bytes */
|
||||
ldmia r1!, {r3, r4, r5, r6, r7, r8, r12, lr}
|
||||
stmia r0!, {r3, r4, r5, r6, r7, r8, r12, lr}
|
||||
subs r2, #32
|
||||
|
||||
5: /* Handle any remaining bytes */
|
||||
adds r2, #32
|
||||
beq 6f
|
||||
|
||||
movs r12, r2, lsl #28
|
||||
ldmcsia r1!, {r3, r4, r5, r6} /* 16 bytes */
|
||||
ldmmiia r1!, {r7, r8} /* 8 bytes */
|
||||
stmcsia r0!, {r3, r4, r5, r6}
|
||||
stmmiia r0!, {r7, r8}
|
||||
movs r12, r2, lsl #30
|
||||
ldrcs r3, [r1], #4 /* 4 bytes */
|
||||
ldrmih r4, [r1], #2 /* 2 bytes */
|
||||
strcs r3, [r0], #4
|
||||
strmih r4, [r0], #2
|
||||
tst r2, #0x1
|
||||
ldrneb r3, [r1] /* last byte */
|
||||
strneb r3, [r0]
|
||||
6:
|
||||
ldmfd sp!, {r4, r5, r6, r7, r8}
|
||||
ldmfd sp!, {r0, pc}
|
||||
END(memcpy)
|
||||
@@ -1,152 +0,0 @@
|
||||
/*
|
||||
* Copyright (C) 2008 The Android Open Source Project
|
||||
* All rights reserved.
|
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without
|
||||
* modification, are permitted provided that the following conditions
|
||||
* are met:
|
||||
* * Redistributions of source code must retain the above copyright
|
||||
* notice, this list of conditions and the following disclaimer.
|
||||
* * Redistributions in binary form must reproduce the above copyright
|
||||
* notice, this list of conditions and the following disclaimer in
|
||||
* the documentation and/or other materials provided with the
|
||||
* distribution.
|
||||
*
|
||||
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
|
||||
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
|
||||
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
|
||||
* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
|
||||
* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
|
||||
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
|
||||
* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
|
||||
* OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
|
||||
* AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
|
||||
* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT
|
||||
* OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
|
||||
* SUCH DAMAGE.
|
||||
*/
|
||||
|
||||
#include <machine/cpu-features.h>
|
||||
#include <machine/asm.h>
|
||||
|
||||
/*
|
||||
* This code assumes it is running on a processor that supports all arm v7
|
||||
* instructions and that supports neon instructions.
|
||||
*/
|
||||
|
||||
.fpu neon
|
||||
|
||||
ENTRY(bzero)
|
||||
mov r2, r1
|
||||
mov r1, #0
|
||||
END(bzero)
|
||||
|
||||
/* memset() returns its first argument. */
|
||||
ENTRY(memset)
|
||||
# The neon memset only wins for less than 132.
|
||||
cmp r2, #132
|
||||
bhi 11f
|
||||
|
||||
.save {r0}
|
||||
stmfd sp!, {r0}
|
||||
|
||||
vdup.8 q0, r1
|
||||
|
||||
/* make sure we have at least 32 bytes to write */
|
||||
subs r2, r2, #32
|
||||
blo 2f
|
||||
vmov q1, q0
|
||||
|
||||
1: /* The main loop writes 32 bytes at a time */
|
||||
subs r2, r2, #32
|
||||
vst1.8 {d0 - d3}, [r0]!
|
||||
bhs 1b
|
||||
|
||||
2: /* less than 32 left */
|
||||
add r2, r2, #32
|
||||
tst r2, #0x10
|
||||
beq 3f
|
||||
|
||||
// writes 16 bytes, 128-bits aligned
|
||||
vst1.8 {d0, d1}, [r0]!
|
||||
3: /* write up to 15-bytes (count in r2) */
|
||||
movs ip, r2, lsl #29
|
||||
bcc 1f
|
||||
vst1.8 {d0}, [r0]!
|
||||
1: bge 2f
|
||||
vst1.32 {d0[0]}, [r0]!
|
||||
2: movs ip, r2, lsl #31
|
||||
strmib r1, [r0], #1
|
||||
strcsb r1, [r0], #1
|
||||
strcsb r1, [r0], #1
|
||||
ldmfd sp!, {r0}
|
||||
bx lr
|
||||
11:
|
||||
/* compute the offset to align the destination
|
||||
* offset = (4-(src&3))&3 = -src & 3
|
||||
*/
|
||||
|
||||
.save {r0, r4-r7, lr}
|
||||
stmfd sp!, {r0, r4-r7, lr}
|
||||
rsb r3, r0, #0
|
||||
ands r3, r3, #3
|
||||
cmp r3, r2
|
||||
movhi r3, r2
|
||||
|
||||
/* splat r1 */
|
||||
mov r1, r1, lsl #24
|
||||
orr r1, r1, r1, lsr #8
|
||||
orr r1, r1, r1, lsr #16
|
||||
|
||||
movs r12, r3, lsl #31
|
||||
strcsb r1, [r0], #1 /* can't use strh (alignment unknown) */
|
||||
strcsb r1, [r0], #1
|
||||
strmib r1, [r0], #1
|
||||
subs r2, r2, r3
|
||||
ldmlsfd sp!, {r0, r4-r7, lr} /* return */
|
||||
bxls lr
|
||||
|
||||
/* align the destination to a cache-line */
|
||||
mov r12, r1
|
||||
mov lr, r1
|
||||
mov r4, r1
|
||||
mov r5, r1
|
||||
mov r6, r1
|
||||
mov r7, r1
|
||||
|
||||
rsb r3, r0, #0
|
||||
ands r3, r3, #0x1C
|
||||
beq 3f
|
||||
cmp r3, r2
|
||||
andhi r3, r2, #0x1C
|
||||
sub r2, r2, r3
|
||||
|
||||
/* conditionally writes 0 to 7 words (length in r3) */
|
||||
movs r3, r3, lsl #28
|
||||
stmcsia r0!, {r1, lr}
|
||||
stmcsia r0!, {r1, lr}
|
||||
stmmiia r0!, {r1, lr}
|
||||
movs r3, r3, lsl #2
|
||||
strcs r1, [r0], #4
|
||||
|
||||
3:
|
||||
subs r2, r2, #32
|
||||
mov r3, r1
|
||||
bmi 2f
|
||||
1: subs r2, r2, #32
|
||||
stmia r0!, {r1,r3,r4,r5,r6,r7,r12,lr}
|
||||
bhs 1b
|
||||
2: add r2, r2, #32
|
||||
|
||||
/* conditionally stores 0 to 31 bytes */
|
||||
movs r2, r2, lsl #28
|
||||
stmcsia r0!, {r1,r3,r12,lr}
|
||||
stmmiia r0!, {r1, lr}
|
||||
movs r2, r2, lsl #2
|
||||
strcs r1, [r0], #4
|
||||
strmih r1, [r0], #2
|
||||
movs r2, r2, lsl #2
|
||||
strcsb r1, [r0]
|
||||
ldmfd sp!, {r0, r4-r7, lr}
|
||||
bx lr
|
||||
END(memset)
|
||||
@@ -1,544 +0,0 @@
|
||||
/*
|
||||
* Copyright (c) 2013 ARM Ltd
|
||||
* All rights reserved.
|
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without
|
||||
* modification, are permitted provided that the following conditions
|
||||
* are met:
|
||||
* 1. Redistributions of source code must retain the above copyright
|
||||
* notice, this list of conditions and the following disclaimer.
|
||||
* 2. Redistributions in binary form must reproduce the above copyright
|
||||
* notice, this list of conditions and the following disclaimer in the
|
||||
* documentation and/or other materials provided with the distribution.
|
||||
* 3. The name of the company may not be used to endorse or promote
|
||||
* products derived from this software without specific prior written
|
||||
* permission.
|
||||
*
|
||||
* THIS SOFTWARE IS PROVIDED BY ARM LTD ``AS IS'' AND ANY EXPRESS OR IMPLIED
|
||||
* WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
|
||||
* MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
|
||||
* IN NO EVENT SHALL ARM LTD BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
|
||||
* SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED
|
||||
* TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR
|
||||
* PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF
|
||||
* LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING
|
||||
* NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
|
||||
* SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
|
||||
*/
|
||||
|
||||
#include <machine/cpu-features.h>
|
||||
#include <machine/asm.h>
|
||||
|
||||
#ifdef __ARMEB__
|
||||
#define S2LOMEM lsl
|
||||
#define S2LOMEMEQ lsleq
|
||||
#define S2HIMEM lsr
|
||||
#define MSB 0x000000ff
|
||||
#define LSB 0xff000000
|
||||
#define BYTE0_OFFSET 24
|
||||
#define BYTE1_OFFSET 16
|
||||
#define BYTE2_OFFSET 8
|
||||
#define BYTE3_OFFSET 0
|
||||
#else /* not __ARMEB__ */
|
||||
#define S2LOMEM lsr
|
||||
#define S2LOMEMEQ lsreq
|
||||
#define S2HIMEM lsl
|
||||
#define BYTE0_OFFSET 0
|
||||
#define BYTE1_OFFSET 8
|
||||
#define BYTE2_OFFSET 16
|
||||
#define BYTE3_OFFSET 24
|
||||
#define MSB 0xff000000
|
||||
#define LSB 0x000000ff
|
||||
#endif /* not __ARMEB__ */
|
||||
|
||||
.syntax unified
|
||||
|
||||
#if defined (__thumb__)
|
||||
.thumb
|
||||
.thumb_func
|
||||
#endif
|
||||
|
||||
ENTRY(strcmp)
|
||||
/* Use LDRD whenever possible. */
|
||||
|
||||
/* The main thing to look out for when comparing large blocks is that
|
||||
the loads do not cross a page boundary when loading past the index
|
||||
of the byte with the first difference or the first string-terminator.
|
||||
|
||||
For example, if the strings are identical and the string-terminator
|
||||
is at index k, byte by byte comparison will not load beyond address
|
||||
s1+k and s2+k; word by word comparison may load up to 3 bytes beyond
|
||||
k; double word - up to 7 bytes. If the load of these bytes crosses
|
||||
a page boundary, it might cause a memory fault (if the page is not mapped)
|
||||
that would not have happened in byte by byte comparison.
|
||||
|
||||
If an address is (double) word aligned, then a load of a (double) word
|
||||
from that address will not cross a page boundary.
|
||||
Therefore, the algorithm below considers word and double-word alignment
|
||||
of strings separately. */
|
||||
|
||||
/* High-level description of the algorithm.
|
||||
|
||||
* The fast path: if both strings are double-word aligned,
|
||||
use LDRD to load two words from each string in every loop iteration.
|
||||
* If the strings have the same offset from a word boundary,
|
||||
use LDRB to load and compare byte by byte until
|
||||
the first string is aligned to a word boundary (at most 3 bytes).
|
||||
This is optimized for quick return on short unaligned strings.
|
||||
* If the strings have the same offset from a double-word boundary,
|
||||
use LDRD to load two words from each string in every loop iteration, as in the fast path.
|
||||
* If the strings do not have the same offset from a double-word boundary,
|
||||
load a word from the second string before the loop to initialize the queue.
|
||||
Use LDRD to load two words from every string in every loop iteration.
|
||||
Inside the loop, load the second word from the second string only after comparing
|
||||
the first word, using the queued value, to guarantee safety across page boundaries.
|
||||
* If the strings do not have the same offset from a word boundary,
|
||||
use LDR and a shift queue. Order of loads and comparisons matters,
|
||||
similarly to the previous case.
|
||||
|
||||
* Use UADD8 and SEL to compare words, and use REV and CLZ to compute the return value.
|
||||
* The only difference between ARM and Thumb modes is the use of CBZ instruction.
|
||||
* The only difference between big and little endian is the use of REV in little endian
|
||||
to compute the return value, instead of MOV.
|
||||
*/
|
||||
|
||||
.macro m_cbz reg label
|
||||
#ifdef __thumb2__
|
||||
cbz \reg, \label
|
||||
#else /* not defined __thumb2__ */
|
||||
cmp \reg, #0
|
||||
beq \label
|
||||
#endif /* not defined __thumb2__ */
|
||||
.endm /* m_cbz */
|
||||
|
||||
.macro m_cbnz reg label
|
||||
#ifdef __thumb2__
|
||||
cbnz \reg, \label
|
||||
#else /* not defined __thumb2__ */
|
||||
cmp \reg, #0
|
||||
bne \label
|
||||
#endif /* not defined __thumb2__ */
|
||||
.endm /* m_cbnz */
|
||||
|
||||
.macro init
|
||||
/* Macro to save temporary registers and prepare magic values. */
|
||||
subs sp, sp, #16
|
||||
strd r4, r5, [sp, #8]
|
||||
strd r6, r7, [sp]
|
||||
mvn r6, #0 /* all F */
|
||||
mov r7, #0 /* all 0 */
|
||||
.endm /* init */
|
||||
|
||||
.macro magic_compare_and_branch w1 w2 label
|
||||
/* Macro to compare registers w1 and w2 and conditionally branch to label. */
|
||||
cmp \w1, \w2 /* Are w1 and w2 the same? */
|
||||
magic_find_zero_bytes \w1
|
||||
it eq
|
||||
cmpeq ip, #0 /* Is there a zero byte in w1? */
|
||||
bne \label
|
||||
.endm /* magic_compare_and_branch */
|
||||
|
||||
.macro magic_find_zero_bytes w1
|
||||
/* Macro to find all-zero bytes in w1, result is in ip. */
|
||||
#if (defined (__ARM_FEATURE_DSP))
|
||||
uadd8 ip, \w1, r6
|
||||
sel ip, r7, r6
|
||||
#else /* not defined (__ARM_FEATURE_DSP) */
|
||||
/* __ARM_FEATURE_DSP is not defined for some Cortex-M processors.
|
||||
Coincidently, these processors only have Thumb-2 mode, where we can use the
|
||||
the (large) magic constant available directly as an immediate in instructions.
|
||||
Note that we cannot use the magic constant in ARM mode, where we need
|
||||
to create the constant in a register. */
|
||||
sub ip, \w1, #0x01010101
|
||||
bic ip, ip, \w1
|
||||
and ip, ip, #0x80808080
|
||||
#endif /* not defined (__ARM_FEATURE_DSP) */
|
||||
.endm /* magic_find_zero_bytes */
|
||||
|
||||
.macro setup_return w1 w2
|
||||
#ifdef __ARMEB__
|
||||
mov r1, \w1
|
||||
mov r2, \w2
|
||||
#else /* not __ARMEB__ */
|
||||
rev r1, \w1
|
||||
rev r2, \w2
|
||||
#endif /* not __ARMEB__ */
|
||||
.endm /* setup_return */
|
||||
|
||||
pld [r0, #0]
|
||||
pld [r1, #0]
|
||||
|
||||
/* Are both strings double-word aligned? */
|
||||
orr ip, r0, r1
|
||||
tst ip, #7
|
||||
bne do_align
|
||||
|
||||
/* Fast path. */
|
||||
init
|
||||
|
||||
doubleword_aligned:
|
||||
|
||||
/* Get here when the strings to compare are double-word aligned. */
|
||||
/* Compare two words in every iteration. */
|
||||
.p2align 2
|
||||
2:
|
||||
pld [r0, #16]
|
||||
pld [r1, #16]
|
||||
|
||||
/* Load the next double-word from each string. */
|
||||
ldrd r2, r3, [r0], #8
|
||||
ldrd r4, r5, [r1], #8
|
||||
|
||||
magic_compare_and_branch w1=r2, w2=r4, label=return_24
|
||||
magic_compare_and_branch w1=r3, w2=r5, label=return_35
|
||||
b 2b
|
||||
|
||||
do_align:
|
||||
/* Is the first string word-aligned? */
|
||||
ands ip, r0, #3
|
||||
beq word_aligned_r0
|
||||
|
||||
/* Fast compare byte by byte until the first string is word-aligned. */
|
||||
/* The offset of r0 from a word boundary is in ip. Thus, the number of bytes
|
||||
to read until the next word boundary is 4-ip. */
|
||||
bic r0, r0, #3
|
||||
ldr r2, [r0], #4
|
||||
lsls ip, ip, #31
|
||||
beq byte2
|
||||
bcs byte3
|
||||
|
||||
byte1:
|
||||
ldrb ip, [r1], #1
|
||||
uxtb r3, r2, ror #BYTE1_OFFSET
|
||||
subs ip, r3, ip
|
||||
bne fast_return
|
||||
m_cbz reg=r3, label=fast_return
|
||||
|
||||
byte2:
|
||||
ldrb ip, [r1], #1
|
||||
uxtb r3, r2, ror #BYTE2_OFFSET
|
||||
subs ip, r3, ip
|
||||
bne fast_return
|
||||
m_cbz reg=r3, label=fast_return
|
||||
|
||||
byte3:
|
||||
ldrb ip, [r1], #1
|
||||
uxtb r3, r2, ror #BYTE3_OFFSET
|
||||
subs ip, r3, ip
|
||||
bne fast_return
|
||||
m_cbnz reg=r3, label=word_aligned_r0
|
||||
|
||||
fast_return:
|
||||
mov r0, ip
|
||||
bx lr
|
||||
|
||||
word_aligned_r0:
|
||||
init
|
||||
/* The first string is word-aligned. */
|
||||
/* Is the second string word-aligned? */
|
||||
ands ip, r1, #3
|
||||
bne strcmp_unaligned
|
||||
|
||||
word_aligned:
|
||||
/* The strings are word-aligned. */
|
||||
/* Is the first string double-word aligned? */
|
||||
tst r0, #4
|
||||
beq doubleword_aligned_r0
|
||||
|
||||
/* If r0 is not double-word aligned yet, align it by loading
|
||||
and comparing the next word from each string. */
|
||||
ldr r2, [r0], #4
|
||||
ldr r4, [r1], #4
|
||||
magic_compare_and_branch w1=r2 w2=r4 label=return_24
|
||||
|
||||
doubleword_aligned_r0:
|
||||
/* Get here when r0 is double-word aligned. */
|
||||
/* Is r1 doubleword_aligned? */
|
||||
tst r1, #4
|
||||
beq doubleword_aligned
|
||||
|
||||
/* Get here when the strings to compare are word-aligned,
|
||||
r0 is double-word aligned, but r1 is not double-word aligned. */
|
||||
|
||||
/* Initialize the queue. */
|
||||
ldr r5, [r1], #4
|
||||
|
||||
/* Compare two words in every iteration. */
|
||||
.p2align 2
|
||||
3:
|
||||
pld [r0, #16]
|
||||
pld [r1, #16]
|
||||
|
||||
/* Load the next double-word from each string and compare. */
|
||||
ldrd r2, r3, [r0], #8
|
||||
magic_compare_and_branch w1=r2 w2=r5 label=return_25
|
||||
ldrd r4, r5, [r1], #8
|
||||
magic_compare_and_branch w1=r3 w2=r4 label=return_34
|
||||
b 3b
|
||||
|
||||
.macro miscmp_word offsetlo offsethi
|
||||
/* Macro to compare misaligned strings. */
|
||||
/* r0, r1 are word-aligned, and at least one of the strings
|
||||
is not double-word aligned. */
|
||||
/* Compare one word in every loop iteration. */
|
||||
/* OFFSETLO is the original bit-offset of r1 from a word-boundary,
|
||||
OFFSETHI is 32 - OFFSETLO (i.e., offset from the next word). */
|
||||
|
||||
/* Initialize the shift queue. */
|
||||
ldr r5, [r1], #4
|
||||
|
||||
/* Compare one word from each string in every loop iteration. */
|
||||
.p2align 2
|
||||
7:
|
||||
ldr r3, [r0], #4
|
||||
S2LOMEM r5, r5, #\offsetlo
|
||||
magic_find_zero_bytes w1=r3
|
||||
cmp r7, ip, S2HIMEM #\offsetlo
|
||||
and r2, r3, r6, S2LOMEM #\offsetlo
|
||||
it eq
|
||||
cmpeq r2, r5
|
||||
bne return_25
|
||||
ldr r5, [r1], #4
|
||||
cmp ip, #0
|
||||
eor r3, r2, r3
|
||||
S2HIMEM r2, r5, #\offsethi
|
||||
it eq
|
||||
cmpeq r3, r2
|
||||
bne return_32
|
||||
b 7b
|
||||
.endm /* miscmp_word */
|
||||
|
||||
return_32:
|
||||
setup_return w1=r3, w2=r2
|
||||
b do_return
|
||||
return_34:
|
||||
setup_return w1=r3, w2=r4
|
||||
b do_return
|
||||
return_25:
|
||||
setup_return w1=r2, w2=r5
|
||||
b do_return
|
||||
return_35:
|
||||
setup_return w1=r3, w2=r5
|
||||
b do_return
|
||||
return_24:
|
||||
setup_return w1=r2, w2=r4
|
||||
|
||||
do_return:
|
||||
|
||||
#ifdef __ARMEB__
|
||||
mov r0, ip
|
||||
#else /* not __ARMEB__ */
|
||||
rev r0, ip
|
||||
#endif /* not __ARMEB__ */
|
||||
|
||||
/* Restore temporaries early, before computing the return value. */
|
||||
ldrd r6, r7, [sp]
|
||||
ldrd r4, r5, [sp, #8]
|
||||
adds sp, sp, #16
|
||||
|
||||
/* There is a zero or a different byte between r1 and r2. */
|
||||
/* r0 contains a mask of all-zero bytes in r1. */
|
||||
/* Using r0 and not ip here because cbz requires low register. */
|
||||
m_cbz reg=r0, label=compute_return_value
|
||||
clz r0, r0
|
||||
/* r0 contains the number of bits on the left of the first all-zero byte in r1. */
|
||||
rsb r0, r0, #24
|
||||
/* Here, r0 contains the number of bits on the right of the first all-zero byte in r1. */
|
||||
lsr r1, r1, r0
|
||||
lsr r2, r2, r0
|
||||
|
||||
compute_return_value:
|
||||
movs r0, #1
|
||||
cmp r1, r2
|
||||
/* The return value is computed as follows.
|
||||
If r1>r2 then (C==1 and Z==0) and LS doesn't hold and r0 is #1 at return.
|
||||
If r1<r2 then (C==0 and Z==0) and we execute SBC with carry_in=0,
|
||||
which means r0:=r0-r0-1 and r0 is #-1 at return.
|
||||
If r1=r2 then (C==1 and Z==1) and we execute SBC with carry_in=1,
|
||||
which means r0:=r0-r0 and r0 is #0 at return.
|
||||
(C==0 and Z==1) cannot happen because the carry bit is "not borrow". */
|
||||
it ls
|
||||
sbcls r0, r0, r0
|
||||
bx lr
|
||||
|
||||
/* The code from the previous version of strcmp.S handles all of the
|
||||
* cases where the first string and seconds string cannot both be
|
||||
* aligned to a word boundary faster than the new algorithm. See
|
||||
* bionic/libc/arch-arm/cortex-a15/bionic/strcmp.S for the unedited
|
||||
* version of the code.
|
||||
*/
|
||||
strcmp_unaligned:
|
||||
wp1 .req r0
|
||||
wp2 .req r1
|
||||
b1 .req r2
|
||||
w1 .req r4
|
||||
w2 .req r5
|
||||
t1 .req ip
|
||||
@ r3 is scratch
|
||||
|
||||
2:
|
||||
mov b1, #1
|
||||
orr b1, b1, b1, lsl #8
|
||||
orr b1, b1, b1, lsl #16
|
||||
|
||||
and t1, wp2, #3
|
||||
bic wp2, wp2, #3
|
||||
ldr w1, [wp1], #4
|
||||
ldr w2, [wp2], #4
|
||||
cmp t1, #2
|
||||
beq 2f
|
||||
bhi 3f
|
||||
|
||||
/* Critical inner Loop: Block with 3 bytes initial overlap */
|
||||
.p2align 2
|
||||
1:
|
||||
bic t1, w1, #MSB
|
||||
cmp t1, w2, S2LOMEM #8
|
||||
sub r3, w1, b1
|
||||
bic r3, r3, w1
|
||||
bne 4f
|
||||
ands r3, r3, b1, lsl #7
|
||||
it eq
|
||||
ldreq w2, [wp2], #4
|
||||
bne 5f
|
||||
eor t1, t1, w1
|
||||
cmp t1, w2, S2HIMEM #24
|
||||
bne 6f
|
||||
ldr w1, [wp1], #4
|
||||
b 1b
|
||||
4:
|
||||
S2LOMEM w2, w2, #8
|
||||
b 8f
|
||||
|
||||
5:
|
||||
#ifdef __ARMEB__
|
||||
/* The syndrome value may contain false ones if the string ends
|
||||
* with the bytes 0x01 0x00
|
||||
*/
|
||||
tst w1, #0xff000000
|
||||
itt ne
|
||||
tstne w1, #0x00ff0000
|
||||
tstne w1, #0x0000ff00
|
||||
beq 7f
|
||||
#else
|
||||
bics r3, r3, #0xff000000
|
||||
bne 7f
|
||||
#endif
|
||||
ldrb w2, [wp2]
|
||||
S2LOMEM t1, w1, #24
|
||||
#ifdef __ARMEB__
|
||||
lsl w2, w2, #24
|
||||
#endif
|
||||
b 8f
|
||||
|
||||
6:
|
||||
S2LOMEM t1, w1, #24
|
||||
and w2, w2, #LSB
|
||||
b 8f
|
||||
|
||||
/* Critical inner Loop: Block with 2 bytes initial overlap */
|
||||
.p2align 2
|
||||
2:
|
||||
S2HIMEM t1, w1, #16
|
||||
sub r3, w1, b1
|
||||
S2LOMEM t1, t1, #16
|
||||
bic r3, r3, w1
|
||||
cmp t1, w2, S2LOMEM #16
|
||||
bne 4f
|
||||
ands r3, r3, b1, lsl #7
|
||||
it eq
|
||||
ldreq w2, [wp2], #4
|
||||
bne 5f
|
||||
eor t1, t1, w1
|
||||
cmp t1, w2, S2HIMEM #16
|
||||
bne 6f
|
||||
ldr w1, [wp1], #4
|
||||
b 2b
|
||||
|
||||
5:
|
||||
#ifdef __ARMEB__
|
||||
/* The syndrome value may contain false ones if the string ends
|
||||
* with the bytes 0x01 0x00
|
||||
*/
|
||||
tst w1, #0xff000000
|
||||
it ne
|
||||
tstne w1, #0x00ff0000
|
||||
beq 7f
|
||||
#else
|
||||
lsls r3, r3, #16
|
||||
bne 7f
|
||||
#endif
|
||||
ldrh w2, [wp2]
|
||||
S2LOMEM t1, w1, #16
|
||||
#ifdef __ARMEB__
|
||||
lsl w2, w2, #16
|
||||
#endif
|
||||
b 8f
|
||||
|
||||
6:
|
||||
S2HIMEM w2, w2, #16
|
||||
S2LOMEM t1, w1, #16
|
||||
4:
|
||||
S2LOMEM w2, w2, #16
|
||||
b 8f
|
||||
|
||||
/* Critical inner Loop: Block with 1 byte initial overlap */
|
||||
.p2align 2
|
||||
3:
|
||||
and t1, w1, #LSB
|
||||
cmp t1, w2, S2LOMEM #24
|
||||
sub r3, w1, b1
|
||||
bic r3, r3, w1
|
||||
bne 4f
|
||||
ands r3, r3, b1, lsl #7
|
||||
it eq
|
||||
ldreq w2, [wp2], #4
|
||||
bne 5f
|
||||
eor t1, t1, w1
|
||||
cmp t1, w2, S2HIMEM #8
|
||||
bne 6f
|
||||
ldr w1, [wp1], #4
|
||||
b 3b
|
||||
4:
|
||||
S2LOMEM w2, w2, #24
|
||||
b 8f
|
||||
5:
|
||||
/* The syndrome value may contain false ones if the string ends
|
||||
* with the bytes 0x01 0x00
|
||||
*/
|
||||
tst w1, #LSB
|
||||
beq 7f
|
||||
ldr w2, [wp2], #4
|
||||
6:
|
||||
S2LOMEM t1, w1, #8
|
||||
bic w2, w2, #MSB
|
||||
b 8f
|
||||
7:
|
||||
mov r0, #0
|
||||
|
||||
/* Restore registers and stack. */
|
||||
ldrd r6, r7, [sp]
|
||||
ldrd r4, r5, [sp, #8]
|
||||
adds sp, sp, #16
|
||||
|
||||
bx lr
|
||||
|
||||
8:
|
||||
and r2, t1, #LSB
|
||||
and r0, w2, #LSB
|
||||
cmp r0, #1
|
||||
it cs
|
||||
cmpcs r0, r2
|
||||
itt eq
|
||||
S2LOMEMEQ t1, t1, #8
|
||||
S2LOMEMEQ w2, w2, #8
|
||||
beq 8b
|
||||
sub r0, r2, r0
|
||||
|
||||
/* Restore registers and stack. */
|
||||
ldrd r6, r7, [sp]
|
||||
ldrd r4, r5, [sp, #8]
|
||||
adds sp, sp, #16
|
||||
|
||||
bx lr
|
||||
END(strcmp)
|
||||
@@ -1,5 +0,0 @@
|
||||
$(call libc-add-cpu-variant-src,MEMCPY,arch-arm/cortex-a9/bionic/memcpy.S)
|
||||
$(call libc-add-cpu-variant-src,MEMSET,arch-arm/cortex-a9/bionic/memset.S)
|
||||
$(call libc-add-cpu-variant-src,STRCMP,arch-arm/cortex-a9/bionic/strcmp.S)
|
||||
|
||||
include bionic/libc/arch-arm/generic/generic.mk
|
||||
@@ -1,380 +0,0 @@
|
||||
/*
|
||||
* Copyright (C) 2008 The Android Open Source Project
|
||||
* All rights reserved.
|
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without
|
||||
* modification, are permitted provided that the following conditions
|
||||
* are met:
|
||||
* * Redistributions of source code must retain the above copyright
|
||||
* notice, this list of conditions and the following disclaimer.
|
||||
* * Redistributions in binary form must reproduce the above copyright
|
||||
* notice, this list of conditions and the following disclaimer in
|
||||
* the documentation and/or other materials provided with the
|
||||
* distribution.
|
||||
*
|
||||
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
|
||||
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
|
||||
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
|
||||
* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
|
||||
* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
|
||||
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
|
||||
* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
|
||||
* OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
|
||||
* AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
|
||||
* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT
|
||||
* OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
|
||||
* SUCH DAMAGE.
|
||||
*/
|
||||
|
||||
#include <machine/cpu-features.h>
|
||||
#include <machine/asm.h>
|
||||
|
||||
/*
|
||||
* Optimized memcpy() for ARM.
|
||||
*
|
||||
* note that memcpy() always returns the destination pointer,
|
||||
* so we have to preserve R0.
|
||||
*/
|
||||
|
||||
ENTRY(memcpy)
|
||||
/* The stack must always be 64-bits aligned to be compliant with the
|
||||
* ARM ABI. Since we have to save R0, we might as well save R4
|
||||
* which we can use for better pipelining of the reads below
|
||||
*/
|
||||
.save {r0, r4, lr}
|
||||
stmfd sp!, {r0, r4, lr}
|
||||
/* Making room for r5-r11 which will be spilled later */
|
||||
.pad #28
|
||||
sub sp, sp, #28
|
||||
|
||||
// preload the destination because we'll align it to a cache line
|
||||
// with small writes. Also start the source "pump".
|
||||
PLD (r0, #0)
|
||||
PLD (r1, #0)
|
||||
PLD (r1, #32)
|
||||
|
||||
/* it simplifies things to take care of len<4 early */
|
||||
cmp r2, #4
|
||||
blo copy_last_3_and_return
|
||||
|
||||
/* compute the offset to align the source
|
||||
* offset = (4-(src&3))&3 = -src & 3
|
||||
*/
|
||||
rsb r3, r1, #0
|
||||
ands r3, r3, #3
|
||||
beq src_aligned
|
||||
|
||||
/* align source to 32 bits. We need to insert 2 instructions between
|
||||
* a ldr[b|h] and str[b|h] because byte and half-word instructions
|
||||
* stall 2 cycles.
|
||||
*/
|
||||
movs r12, r3, lsl #31
|
||||
sub r2, r2, r3 /* we know that r3 <= r2 because r2 >= 4 */
|
||||
ldrmib r3, [r1], #1
|
||||
ldrcsb r4, [r1], #1
|
||||
ldrcsb r12,[r1], #1
|
||||
strmib r3, [r0], #1
|
||||
strcsb r4, [r0], #1
|
||||
strcsb r12,[r0], #1
|
||||
|
||||
src_aligned:
|
||||
|
||||
/* see if src and dst are aligned together (congruent) */
|
||||
eor r12, r0, r1
|
||||
tst r12, #3
|
||||
bne non_congruent
|
||||
|
||||
/* Use post-incriment mode for stm to spill r5-r11 to reserved stack
|
||||
* frame. Don't update sp.
|
||||
*/
|
||||
stmea sp, {r5-r11}
|
||||
|
||||
/* align the destination to a cache-line */
|
||||
rsb r3, r0, #0
|
||||
ands r3, r3, #0x1C
|
||||
beq congruent_aligned32
|
||||
cmp r3, r2
|
||||
andhi r3, r2, #0x1C
|
||||
|
||||
/* conditionally copies 0 to 7 words (length in r3) */
|
||||
movs r12, r3, lsl #28
|
||||
ldmcsia r1!, {r4, r5, r6, r7} /* 16 bytes */
|
||||
ldmmiia r1!, {r8, r9} /* 8 bytes */
|
||||
stmcsia r0!, {r4, r5, r6, r7}
|
||||
stmmiia r0!, {r8, r9}
|
||||
tst r3, #0x4
|
||||
ldrne r10,[r1], #4 /* 4 bytes */
|
||||
strne r10,[r0], #4
|
||||
sub r2, r2, r3
|
||||
|
||||
congruent_aligned32:
|
||||
/*
|
||||
* here source is aligned to 32 bytes.
|
||||
*/
|
||||
|
||||
cached_aligned32:
|
||||
subs r2, r2, #32
|
||||
blo less_than_32_left
|
||||
|
||||
/*
|
||||
* We preload a cache-line up to 64 bytes ahead. On the 926, this will
|
||||
* stall only until the requested world is fetched, but the linefill
|
||||
* continues in the the background.
|
||||
* While the linefill is going, we write our previous cache-line
|
||||
* into the write-buffer (which should have some free space).
|
||||
* When the linefill is done, the writebuffer will
|
||||
* start dumping its content into memory
|
||||
*
|
||||
* While all this is going, we then load a full cache line into
|
||||
* 8 registers, this cache line should be in the cache by now
|
||||
* (or partly in the cache).
|
||||
*
|
||||
* This code should work well regardless of the source/dest alignment.
|
||||
*
|
||||
*/
|
||||
|
||||
// Align the preload register to a cache-line because the cpu does
|
||||
// "critical word first" (the first word requested is loaded first).
|
||||
bic r12, r1, #0x1F
|
||||
add r12, r12, #64
|
||||
|
||||
1: ldmia r1!, { r4-r11 }
|
||||
PLD (r12, #64)
|
||||
subs r2, r2, #32
|
||||
|
||||
// NOTE: if r12 is more than 64 ahead of r1, the following ldrhi
|
||||
// for ARM9 preload will not be safely guarded by the preceding subs.
|
||||
// When it is safely guarded the only possibility to have SIGSEGV here
|
||||
// is because the caller overstates the length.
|
||||
ldrhi r3, [r12], #32 /* cheap ARM9 preload */
|
||||
stmia r0!, { r4-r11 }
|
||||
bhs 1b
|
||||
|
||||
add r2, r2, #32
|
||||
|
||||
|
||||
|
||||
|
||||
less_than_32_left:
|
||||
/*
|
||||
* less than 32 bytes left at this point (length in r2)
|
||||
*/
|
||||
|
||||
/* skip all this if there is nothing to do, which should
|
||||
* be a common case (if not executed the code below takes
|
||||
* about 16 cycles)
|
||||
*/
|
||||
tst r2, #0x1F
|
||||
beq 1f
|
||||
|
||||
/* conditionnaly copies 0 to 31 bytes */
|
||||
movs r12, r2, lsl #28
|
||||
ldmcsia r1!, {r4, r5, r6, r7} /* 16 bytes */
|
||||
ldmmiia r1!, {r8, r9} /* 8 bytes */
|
||||
stmcsia r0!, {r4, r5, r6, r7}
|
||||
stmmiia r0!, {r8, r9}
|
||||
movs r12, r2, lsl #30
|
||||
ldrcs r3, [r1], #4 /* 4 bytes */
|
||||
ldrmih r4, [r1], #2 /* 2 bytes */
|
||||
strcs r3, [r0], #4
|
||||
strmih r4, [r0], #2
|
||||
tst r2, #0x1
|
||||
ldrneb r3, [r1] /* last byte */
|
||||
strneb r3, [r0]
|
||||
|
||||
/* we're done! restore everything and return */
|
||||
1: ldmfd sp!, {r5-r11}
|
||||
ldmfd sp!, {r0, r4, lr}
|
||||
bx lr
|
||||
|
||||
/********************************************************************/
|
||||
|
||||
non_congruent:
|
||||
/*
|
||||
* here source is aligned to 4 bytes
|
||||
* but destination is not.
|
||||
*
|
||||
* in the code below r2 is the number of bytes read
|
||||
* (the number of bytes written is always smaller, because we have
|
||||
* partial words in the shift queue)
|
||||
*/
|
||||
cmp r2, #4
|
||||
blo copy_last_3_and_return
|
||||
|
||||
/* Use post-incriment mode for stm to spill r5-r11 to reserved stack
|
||||
* frame. Don't update sp.
|
||||
*/
|
||||
stmea sp, {r5-r11}
|
||||
|
||||
/* compute shifts needed to align src to dest */
|
||||
rsb r5, r0, #0
|
||||
and r5, r5, #3 /* r5 = # bytes in partial words */
|
||||
mov r12, r5, lsl #3 /* r12 = right */
|
||||
rsb lr, r12, #32 /* lr = left */
|
||||
|
||||
/* read the first word */
|
||||
ldr r3, [r1], #4
|
||||
sub r2, r2, #4
|
||||
|
||||
/* write a partial word (0 to 3 bytes), such that destination
|
||||
* becomes aligned to 32 bits (r5 = nb of words to copy for alignment)
|
||||
*/
|
||||
movs r5, r5, lsl #31
|
||||
strmib r3, [r0], #1
|
||||
movmi r3, r3, lsr #8
|
||||
strcsb r3, [r0], #1
|
||||
movcs r3, r3, lsr #8
|
||||
strcsb r3, [r0], #1
|
||||
movcs r3, r3, lsr #8
|
||||
|
||||
cmp r2, #4
|
||||
blo partial_word_tail
|
||||
|
||||
/* Align destination to 32 bytes (cache line boundary) */
|
||||
1: tst r0, #0x1c
|
||||
beq 2f
|
||||
ldr r5, [r1], #4
|
||||
sub r2, r2, #4
|
||||
orr r4, r3, r5, lsl lr
|
||||
mov r3, r5, lsr r12
|
||||
str r4, [r0], #4
|
||||
cmp r2, #4
|
||||
bhs 1b
|
||||
blo partial_word_tail
|
||||
|
||||
/* copy 32 bytes at a time */
|
||||
2: subs r2, r2, #32
|
||||
blo less_than_thirtytwo
|
||||
|
||||
/* Use immediate mode for the shifts, because there is an extra cycle
|
||||
* for register shifts, which could account for up to 50% of
|
||||
* performance hit.
|
||||
*/
|
||||
|
||||
cmp r12, #24
|
||||
beq loop24
|
||||
cmp r12, #8
|
||||
beq loop8
|
||||
|
||||
loop16:
|
||||
ldr r12, [r1], #4
|
||||
1: mov r4, r12
|
||||
ldmia r1!, { r5,r6,r7, r8,r9,r10,r11}
|
||||
PLD (r1, #64)
|
||||
subs r2, r2, #32
|
||||
ldrhs r12, [r1], #4
|
||||
orr r3, r3, r4, lsl #16
|
||||
mov r4, r4, lsr #16
|
||||
orr r4, r4, r5, lsl #16
|
||||
mov r5, r5, lsr #16
|
||||
orr r5, r5, r6, lsl #16
|
||||
mov r6, r6, lsr #16
|
||||
orr r6, r6, r7, lsl #16
|
||||
mov r7, r7, lsr #16
|
||||
orr r7, r7, r8, lsl #16
|
||||
mov r8, r8, lsr #16
|
||||
orr r8, r8, r9, lsl #16
|
||||
mov r9, r9, lsr #16
|
||||
orr r9, r9, r10, lsl #16
|
||||
mov r10, r10, lsr #16
|
||||
orr r10, r10, r11, lsl #16
|
||||
stmia r0!, {r3,r4,r5,r6, r7,r8,r9,r10}
|
||||
mov r3, r11, lsr #16
|
||||
bhs 1b
|
||||
b less_than_thirtytwo
|
||||
|
||||
loop8:
|
||||
ldr r12, [r1], #4
|
||||
1: mov r4, r12
|
||||
ldmia r1!, { r5,r6,r7, r8,r9,r10,r11}
|
||||
PLD (r1, #64)
|
||||
subs r2, r2, #32
|
||||
ldrhs r12, [r1], #4
|
||||
orr r3, r3, r4, lsl #24
|
||||
mov r4, r4, lsr #8
|
||||
orr r4, r4, r5, lsl #24
|
||||
mov r5, r5, lsr #8
|
||||
orr r5, r5, r6, lsl #24
|
||||
mov r6, r6, lsr #8
|
||||
orr r6, r6, r7, lsl #24
|
||||
mov r7, r7, lsr #8
|
||||
orr r7, r7, r8, lsl #24
|
||||
mov r8, r8, lsr #8
|
||||
orr r8, r8, r9, lsl #24
|
||||
mov r9, r9, lsr #8
|
||||
orr r9, r9, r10, lsl #24
|
||||
mov r10, r10, lsr #8
|
||||
orr r10, r10, r11, lsl #24
|
||||
stmia r0!, {r3,r4,r5,r6, r7,r8,r9,r10}
|
||||
mov r3, r11, lsr #8
|
||||
bhs 1b
|
||||
b less_than_thirtytwo
|
||||
|
||||
loop24:
|
||||
ldr r12, [r1], #4
|
||||
1: mov r4, r12
|
||||
ldmia r1!, { r5,r6,r7, r8,r9,r10,r11}
|
||||
PLD (r1, #64)
|
||||
subs r2, r2, #32
|
||||
ldrhs r12, [r1], #4
|
||||
orr r3, r3, r4, lsl #8
|
||||
mov r4, r4, lsr #24
|
||||
orr r4, r4, r5, lsl #8
|
||||
mov r5, r5, lsr #24
|
||||
orr r5, r5, r6, lsl #8
|
||||
mov r6, r6, lsr #24
|
||||
orr r6, r6, r7, lsl #8
|
||||
mov r7, r7, lsr #24
|
||||
orr r7, r7, r8, lsl #8
|
||||
mov r8, r8, lsr #24
|
||||
orr r8, r8, r9, lsl #8
|
||||
mov r9, r9, lsr #24
|
||||
orr r9, r9, r10, lsl #8
|
||||
mov r10, r10, lsr #24
|
||||
orr r10, r10, r11, lsl #8
|
||||
stmia r0!, {r3,r4,r5,r6, r7,r8,r9,r10}
|
||||
mov r3, r11, lsr #24
|
||||
bhs 1b
|
||||
|
||||
|
||||
less_than_thirtytwo:
|
||||
/* copy the last 0 to 31 bytes of the source */
|
||||
rsb r12, lr, #32 /* we corrupted r12, recompute it */
|
||||
add r2, r2, #32
|
||||
cmp r2, #4
|
||||
blo partial_word_tail
|
||||
|
||||
1: ldr r5, [r1], #4
|
||||
sub r2, r2, #4
|
||||
orr r4, r3, r5, lsl lr
|
||||
mov r3, r5, lsr r12
|
||||
str r4, [r0], #4
|
||||
cmp r2, #4
|
||||
bhs 1b
|
||||
|
||||
partial_word_tail:
|
||||
/* we have a partial word in the input buffer */
|
||||
movs r5, lr, lsl #(31-3)
|
||||
strmib r3, [r0], #1
|
||||
movmi r3, r3, lsr #8
|
||||
strcsb r3, [r0], #1
|
||||
movcs r3, r3, lsr #8
|
||||
strcsb r3, [r0], #1
|
||||
|
||||
/* Refill spilled registers from the stack. Don't update sp. */
|
||||
ldmfd sp, {r5-r11}
|
||||
|
||||
copy_last_3_and_return:
|
||||
movs r2, r2, lsl #31 /* copy remaining 0, 1, 2 or 3 bytes */
|
||||
ldrmib r2, [r1], #1
|
||||
ldrcsb r3, [r1], #1
|
||||
ldrcsb r12,[r1]
|
||||
strmib r2, [r0], #1
|
||||
strcsb r3, [r0], #1
|
||||
strcsb r12,[r0]
|
||||
|
||||
/* we're done! restore sp and spilled registers and return */
|
||||
add sp, sp, #28
|
||||
ldmfd sp!, {r0, r4, lr}
|
||||
bx lr
|
||||
END(memcpy)
|
||||
@@ -1,109 +0,0 @@
|
||||
/*
|
||||
* Copyright (C) 2008 The Android Open Source Project
|
||||
* All rights reserved.
|
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without
|
||||
* modification, are permitted provided that the following conditions
|
||||
* are met:
|
||||
* * Redistributions of source code must retain the above copyright
|
||||
* notice, this list of conditions and the following disclaimer.
|
||||
* * Redistributions in binary form must reproduce the above copyright
|
||||
* notice, this list of conditions and the following disclaimer in
|
||||
* the documentation and/or other materials provided with the
|
||||
* distribution.
|
||||
*
|
||||
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
|
||||
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
|
||||
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
|
||||
* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
|
||||
* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
|
||||
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
|
||||
* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
|
||||
* OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
|
||||
* AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
|
||||
* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT
|
||||
* OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
|
||||
* SUCH DAMAGE.
|
||||
*/
|
||||
|
||||
#include <machine/asm.h>
|
||||
|
||||
/*
|
||||
* Optimized memset() for ARM.
|
||||
*
|
||||
* memset() returns its first argument.
|
||||
*/
|
||||
|
||||
ENTRY(bzero)
|
||||
mov r2, r1
|
||||
mov r1, #0
|
||||
END(bzero)
|
||||
|
||||
ENTRY(memset)
|
||||
/* compute the offset to align the destination
|
||||
* offset = (4-(src&3))&3 = -src & 3
|
||||
*/
|
||||
.save {r0, r4-r7, lr}
|
||||
stmfd sp!, {r0, r4-r7, lr}
|
||||
rsb r3, r0, #0
|
||||
ands r3, r3, #3
|
||||
cmp r3, r2
|
||||
movhi r3, r2
|
||||
|
||||
/* splat r1 */
|
||||
mov r1, r1, lsl #24
|
||||
orr r1, r1, r1, lsr #8
|
||||
orr r1, r1, r1, lsr #16
|
||||
|
||||
movs r12, r3, lsl #31
|
||||
strcsb r1, [r0], #1 /* can't use strh (alignment unknown) */
|
||||
strcsb r1, [r0], #1
|
||||
strmib r1, [r0], #1
|
||||
subs r2, r2, r3
|
||||
ldmlsfd sp!, {r0, r4-r7, lr} /* return */
|
||||
bxls lr
|
||||
|
||||
/* align the destination to a cache-line */
|
||||
mov r12, r1
|
||||
mov lr, r1
|
||||
mov r4, r1
|
||||
mov r5, r1
|
||||
mov r6, r1
|
||||
mov r7, r1
|
||||
|
||||
rsb r3, r0, #0
|
||||
ands r3, r3, #0x1C
|
||||
beq 3f
|
||||
cmp r3, r2
|
||||
andhi r3, r2, #0x1C
|
||||
sub r2, r2, r3
|
||||
|
||||
/* conditionally writes 0 to 7 words (length in r3) */
|
||||
movs r3, r3, lsl #28
|
||||
stmcsia r0!, {r1, lr}
|
||||
stmcsia r0!, {r1, lr}
|
||||
stmmiia r0!, {r1, lr}
|
||||
movs r3, r3, lsl #2
|
||||
strcs r1, [r0], #4
|
||||
|
||||
3:
|
||||
subs r2, r2, #32
|
||||
mov r3, r1
|
||||
bmi 2f
|
||||
1: subs r2, r2, #32
|
||||
stmia r0!, {r1,r3,r4,r5,r6,r7,r12,lr}
|
||||
bhs 1b
|
||||
2: add r2, r2, #32
|
||||
|
||||
/* conditionally stores 0 to 31 bytes */
|
||||
movs r2, r2, lsl #28
|
||||
stmcsia r0!, {r1,r3,r12,lr}
|
||||
stmmiia r0!, {r1, lr}
|
||||
movs r2, r2, lsl #2
|
||||
strcs r1, [r0], #4
|
||||
strmih r1, [r0], #2
|
||||
movs r2, r2, lsl #2
|
||||
strcsb r1, [r0]
|
||||
ldmfd sp!, {r0, r4-r7, lr}
|
||||
bx lr
|
||||
END(memset)
|
||||
@@ -1,317 +0,0 @@
|
||||
/*
|
||||
* Copyright (c) 2011 The Android Open Source Project
|
||||
* Copyright (c) 2008 ARM Ltd
|
||||
* All rights reserved.
|
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without
|
||||
* modification, are permitted provided that the following conditions
|
||||
* are met:
|
||||
* 1. Redistributions of source code must retain the above copyright
|
||||
* notice, this list of conditions and the following disclaimer.
|
||||
* 2. Redistributions in binary form must reproduce the above copyright
|
||||
* notice, this list of conditions and the following disclaimer in the
|
||||
* documentation and/or other materials provided with the distribution.
|
||||
* 3. The name of the company may not be used to endorse or promote
|
||||
* products derived from this software without specific prior written
|
||||
* permission.
|
||||
*
|
||||
* THIS SOFTWARE IS PROVIDED BY ARM LTD ``AS IS'' AND ANY EXPRESS OR IMPLIED
|
||||
* WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
|
||||
* MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
|
||||
* IN NO EVENT SHALL ARM LTD BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
|
||||
* SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED
|
||||
* TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR
|
||||
* PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF
|
||||
* LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING
|
||||
* NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
|
||||
* SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
|
||||
*/
|
||||
|
||||
#include <machine/cpu-features.h>
|
||||
#include <machine/asm.h>
|
||||
|
||||
.text
|
||||
|
||||
#ifdef __ARMEB__
|
||||
#define SHFT2LSB lsl
|
||||
#define SHFT2LSBEQ lsleq
|
||||
#define SHFT2MSB lsr
|
||||
#define SHFT2MSBEQ lsreq
|
||||
#define MSB 0x000000ff
|
||||
#define LSB 0xff000000
|
||||
#else
|
||||
#define SHFT2LSB lsr
|
||||
#define SHFT2LSBEQ lsreq
|
||||
#define SHFT2MSB lsl
|
||||
#define SHFT2MSBEQ lsleq
|
||||
#define MSB 0xff000000
|
||||
#define LSB 0x000000ff
|
||||
#endif
|
||||
|
||||
#define magic1(REG) REG
|
||||
#define magic2(REG) REG, lsl #7
|
||||
|
||||
ENTRY(strcmp)
|
||||
PLD(r0, #0)
|
||||
PLD(r1, #0)
|
||||
eor r2, r0, r1
|
||||
tst r2, #3
|
||||
|
||||
/* Strings not at same byte offset from a word boundary. */
|
||||
bne .Lstrcmp_unaligned
|
||||
ands r2, r0, #3
|
||||
bic r0, r0, #3
|
||||
bic r1, r1, #3
|
||||
ldr ip, [r0], #4
|
||||
it eq
|
||||
ldreq r3, [r1], #4
|
||||
beq 1f
|
||||
|
||||
/* Although s1 and s2 have identical initial alignment, they are
|
||||
* not currently word aligned. Rather than comparing bytes,
|
||||
* make sure that any bytes fetched from before the addressed
|
||||
* bytes are forced to 0xff. Then they will always compare
|
||||
* equal.
|
||||
*/
|
||||
eor r2, r2, #3
|
||||
lsl r2, r2, #3
|
||||
mvn r3, #MSB
|
||||
SHFT2LSB r2, r3, r2
|
||||
ldr r3, [r1], #4
|
||||
orr ip, ip, r2
|
||||
orr r3, r3, r2
|
||||
1:
|
||||
/* Load the 'magic' constant 0x01010101. */
|
||||
str r4, [sp, #-4]!
|
||||
mov r4, #1
|
||||
orr r4, r4, r4, lsl #8
|
||||
orr r4, r4, r4, lsl #16
|
||||
.p2align 2
|
||||
4:
|
||||
PLD(r0, #8)
|
||||
PLD(r1, #8)
|
||||
sub r2, ip, magic1(r4)
|
||||
cmp ip, r3
|
||||
itttt eq
|
||||
|
||||
/* check for any zero bytes in first word */
|
||||
biceq r2, r2, ip
|
||||
tsteq r2, magic2(r4)
|
||||
ldreq ip, [r0], #4
|
||||
ldreq r3, [r1], #4
|
||||
beq 4b
|
||||
2:
|
||||
/* There's a zero or a different byte in the word */
|
||||
SHFT2MSB r0, ip, #24
|
||||
SHFT2LSB ip, ip, #8
|
||||
cmp r0, #1
|
||||
it cs
|
||||
cmpcs r0, r3, SHFT2MSB #24
|
||||
it eq
|
||||
SHFT2LSBEQ r3, r3, #8
|
||||
beq 2b
|
||||
/* On a big-endian machine, r0 contains the desired byte in bits
|
||||
* 0-7; on a little-endian machine they are in bits 24-31. In
|
||||
* both cases the other bits in r0 are all zero. For r3 the
|
||||
* interesting byte is at the other end of the word, but the
|
||||
* other bits are not necessarily zero. We need a signed result
|
||||
* representing the differnece in the unsigned bytes, so for the
|
||||
* little-endian case we can't just shift the interesting bits up.
|
||||
*/
|
||||
#ifdef __ARMEB__
|
||||
sub r0, r0, r3, lsr #24
|
||||
#else
|
||||
and r3, r3, #255
|
||||
/* No RSB instruction in Thumb2 */
|
||||
#ifdef __thumb2__
|
||||
lsr r0, r0, #24
|
||||
sub r0, r0, r3
|
||||
#else
|
||||
rsb r0, r3, r0, lsr #24
|
||||
#endif
|
||||
#endif
|
||||
ldr r4, [sp], #4
|
||||
bx lr
|
||||
|
||||
.Lstrcmp_unaligned:
|
||||
wp1 .req r0
|
||||
wp2 .req r1
|
||||
b1 .req r2
|
||||
w1 .req r4
|
||||
w2 .req r5
|
||||
t1 .req ip
|
||||
@ r3 is scratch
|
||||
|
||||
/* First of all, compare bytes until wp1(sp1) is word-aligned. */
|
||||
1:
|
||||
tst wp1, #3
|
||||
beq 2f
|
||||
ldrb r2, [wp1], #1
|
||||
ldrb r3, [wp2], #1
|
||||
cmp r2, #1
|
||||
it cs
|
||||
cmpcs r2, r3
|
||||
beq 1b
|
||||
sub r0, r2, r3
|
||||
bx lr
|
||||
|
||||
2:
|
||||
str r5, [sp, #-4]!
|
||||
str r4, [sp, #-4]!
|
||||
mov b1, #1
|
||||
orr b1, b1, b1, lsl #8
|
||||
orr b1, b1, b1, lsl #16
|
||||
|
||||
and t1, wp2, #3
|
||||
bic wp2, wp2, #3
|
||||
ldr w1, [wp1], #4
|
||||
ldr w2, [wp2], #4
|
||||
cmp t1, #2
|
||||
beq 2f
|
||||
bhi 3f
|
||||
|
||||
/* Critical inner Loop: Block with 3 bytes initial overlap */
|
||||
.p2align 2
|
||||
1:
|
||||
bic t1, w1, #MSB
|
||||
cmp t1, w2, SHFT2LSB #8
|
||||
sub r3, w1, b1
|
||||
bic r3, r3, w1
|
||||
bne 4f
|
||||
ands r3, r3, b1, lsl #7
|
||||
it eq
|
||||
ldreq w2, [wp2], #4
|
||||
bne 5f
|
||||
eor t1, t1, w1
|
||||
cmp t1, w2, SHFT2MSB #24
|
||||
bne 6f
|
||||
ldr w1, [wp1], #4
|
||||
b 1b
|
||||
4:
|
||||
SHFT2LSB w2, w2, #8
|
||||
b 8f
|
||||
|
||||
5:
|
||||
#ifdef __ARMEB__
|
||||
/* The syndrome value may contain false ones if the string ends
|
||||
* with the bytes 0x01 0x00
|
||||
*/
|
||||
tst w1, #0xff000000
|
||||
itt ne
|
||||
tstne w1, #0x00ff0000
|
||||
tstne w1, #0x0000ff00
|
||||
beq 7f
|
||||
#else
|
||||
bics r3, r3, #0xff000000
|
||||
bne 7f
|
||||
#endif
|
||||
ldrb w2, [wp2]
|
||||
SHFT2LSB t1, w1, #24
|
||||
#ifdef __ARMEB__
|
||||
lsl w2, w2, #24
|
||||
#endif
|
||||
b 8f
|
||||
|
||||
6:
|
||||
SHFT2LSB t1, w1, #24
|
||||
and w2, w2, #LSB
|
||||
b 8f
|
||||
|
||||
/* Critical inner Loop: Block with 2 bytes initial overlap */
|
||||
.p2align 2
|
||||
2:
|
||||
SHFT2MSB t1, w1, #16
|
||||
sub r3, w1, b1
|
||||
SHFT2LSB t1, t1, #16
|
||||
bic r3, r3, w1
|
||||
cmp t1, w2, SHFT2LSB #16
|
||||
bne 4f
|
||||
ands r3, r3, b1, lsl #7
|
||||
it eq
|
||||
ldreq w2, [wp2], #4
|
||||
bne 5f
|
||||
eor t1, t1, w1
|
||||
cmp t1, w2, SHFT2MSB #16
|
||||
bne 6f
|
||||
ldr w1, [wp1], #4
|
||||
b 2b
|
||||
|
||||
5:
|
||||
#ifdef __ARMEB__
|
||||
/* The syndrome value may contain false ones if the string ends
|
||||
* with the bytes 0x01 0x00
|
||||
*/
|
||||
tst w1, #0xff000000
|
||||
it ne
|
||||
tstne w1, #0x00ff0000
|
||||
beq 7f
|
||||
#else
|
||||
lsls r3, r3, #16
|
||||
bne 7f
|
||||
#endif
|
||||
ldrh w2, [wp2]
|
||||
SHFT2LSB t1, w1, #16
|
||||
#ifdef __ARMEB__
|
||||
lsl w2, w2, #16
|
||||
#endif
|
||||
b 8f
|
||||
|
||||
6:
|
||||
SHFT2MSB w2, w2, #16
|
||||
SHFT2LSB t1, w1, #16
|
||||
4:
|
||||
SHFT2LSB w2, w2, #16
|
||||
b 8f
|
||||
|
||||
/* Critical inner Loop: Block with 1 byte initial overlap */
|
||||
.p2align 2
|
||||
3:
|
||||
and t1, w1, #LSB
|
||||
cmp t1, w2, SHFT2LSB #24
|
||||
sub r3, w1, b1
|
||||
bic r3, r3, w1
|
||||
bne 4f
|
||||
ands r3, r3, b1, lsl #7
|
||||
it eq
|
||||
ldreq w2, [wp2], #4
|
||||
bne 5f
|
||||
eor t1, t1, w1
|
||||
cmp t1, w2, SHFT2MSB #8
|
||||
bne 6f
|
||||
ldr w1, [wp1], #4
|
||||
b 3b
|
||||
4:
|
||||
SHFT2LSB w2, w2, #24
|
||||
b 8f
|
||||
5:
|
||||
/* The syndrome value may contain false ones if the string ends
|
||||
* with the bytes 0x01 0x00
|
||||
*/
|
||||
tst w1, #LSB
|
||||
beq 7f
|
||||
ldr w2, [wp2], #4
|
||||
6:
|
||||
SHFT2LSB t1, w1, #8
|
||||
bic w2, w2, #MSB
|
||||
b 8f
|
||||
7:
|
||||
mov r0, #0
|
||||
ldr r4, [sp], #4
|
||||
ldr r5, [sp], #4
|
||||
bx lr
|
||||
|
||||
8:
|
||||
and r2, t1, #LSB
|
||||
and r0, w2, #LSB
|
||||
cmp r0, #1
|
||||
it cs
|
||||
cmpcs r0, r2
|
||||
itt eq
|
||||
SHFT2LSBEQ t1, t1, #8
|
||||
SHFT2LSBEQ w2, w2, #8
|
||||
beq 8b
|
||||
sub r0, r2, r0
|
||||
ldr r4, [sp], #4
|
||||
ldr r5, [sp], #4
|
||||
bx lr
|
||||
END(strcmp)
|
||||
@@ -1,3 +0,0 @@
|
||||
$(call libc-add-cpu-variant-src,MEMCPY,arch-arm/generic/bionic/memcpy.S)
|
||||
$(call libc-add-cpu-variant-src,MEMSET,arch-arm/generic/bionic/memset.S)
|
||||
$(call libc-add-cpu-variant-src,STRCMP,arch-arm/generic/bionic/strcmp.S)
|
||||
@@ -77,7 +77,7 @@
|
||||
#endif /* __ARM_ARCH__ */
|
||||
#endif /* __GNUC__ */
|
||||
|
||||
#if defined(__ARMEB__)
|
||||
#ifdef __ARMEB__
|
||||
#define _BYTE_ORDER _BIG_ENDIAN
|
||||
#else
|
||||
#define _BYTE_ORDER _LITTLE_ENDIAN
|
||||
@@ -35,6 +35,17 @@
|
||||
#ifndef _ARM__TYPES_H_
|
||||
#define _ARM__TYPES_H_
|
||||
|
||||
|
||||
#if !defined(__ARM_EABI__)
|
||||
/* the kernel defines size_t as unsigned int, but g++ wants it to be unsigned long */
|
||||
#define _SIZE_T
|
||||
#define _SSIZE_T
|
||||
#define _PTRDIFF_T
|
||||
typedef unsigned long size_t;
|
||||
typedef long ssize_t;
|
||||
typedef long ptrdiff_t;
|
||||
#endif
|
||||
|
||||
/* 7.18.1.1 Exact-width integer types */
|
||||
typedef __signed char __int8_t;
|
||||
typedef unsigned char __uint8_t;
|
||||
@@ -87,8 +98,6 @@ typedef unsigned long __psize_t;
|
||||
/* Standard system types */
|
||||
typedef int __clock_t;
|
||||
typedef int __clockid_t;
|
||||
typedef double __double_t;
|
||||
typedef float __float_t;
|
||||
typedef long __ptrdiff_t;
|
||||
typedef int __time_t;
|
||||
typedef int __timer_t;
|
||||
@@ -107,4 +116,10 @@ typedef int __rune_t;
|
||||
typedef void * __wctrans_t;
|
||||
typedef void * __wctype_t;
|
||||
|
||||
#ifdef __ARMEB__
|
||||
#define _BYTE_ORDER _BIG_ENDIAN
|
||||
#else
|
||||
#define _BYTE_ORDER _LITTLE_ENDIAN
|
||||
#endif
|
||||
|
||||
#endif /* _ARM__TYPES_H_ */
|
||||
|
||||
@@ -1,138 +0,0 @@
|
||||
/* $NetBSD: elf_machdep.h,v 1.10 2012/08/05 04:12:46 matt Exp $ */
|
||||
|
||||
#ifndef _ARM_ELF_MACHDEP_H_
|
||||
#define _ARM_ELF_MACHDEP_H_
|
||||
|
||||
#if defined(__ARMEB__)
|
||||
#define ELF32_MACHDEP_ENDIANNESS ELFDATA2MSB
|
||||
#else
|
||||
#define ELF32_MACHDEP_ENDIANNESS ELFDATA2LSB
|
||||
#endif
|
||||
|
||||
#define ELF64_MACHDEP_ENDIANNESS XXX /* break compilation */
|
||||
#define ELF64_MACHDEP_ID_CASES \
|
||||
/* no 64-bit ELF machine types supported */
|
||||
|
||||
/* Processor specific flags for the ELF header e_flags field. */
|
||||
#define EF_ARM_RELEXEC 0x00000001
|
||||
#define EF_ARM_HASENTRY 0x00000002
|
||||
#define EF_ARM_INTERWORK 0x00000004 /* GNU binutils 000413 */
|
||||
#define EF_ARM_SYMSARESORTED 0x00000004 /* ARM ELF A08 */
|
||||
#define EF_ARM_APCS_26 0x00000008 /* GNU binutils 000413 */
|
||||
#define EF_ARM_DYNSYMSUSESEGIDX 0x00000008 /* ARM ELF B01 */
|
||||
#define EF_ARM_APCS_FLOAT 0x00000010 /* GNU binutils 000413 */
|
||||
#define EF_ARM_MAPSYMSFIRST 0x00000010 /* ARM ELF B01 */
|
||||
#define EF_ARM_PIC 0x00000020
|
||||
#define EF_ARM_ALIGN8 0x00000040 /* 8-bit structure alignment. */
|
||||
#define EF_ARM_NEW_ABI 0x00000080
|
||||
#define EF_ARM_OLD_ABI 0x00000100
|
||||
#define EF_ARM_SOFT_FLOAT 0x00000200
|
||||
#define EF_ARM_EABIMASK 0xff000000
|
||||
#define EF_ARM_EABI_VER1 0x01000000
|
||||
#define EF_ARM_EABI_VER2 0x02000000
|
||||
#define EF_ARM_EABI_VER3 0x03000000
|
||||
#define EF_ARM_EABI_VER4 0x04000000
|
||||
#define EF_ARM_EABI_VER5 0x05000000
|
||||
|
||||
#define ELF32_MACHDEP_ID_CASES \
|
||||
case EM_ARM: \
|
||||
break;
|
||||
|
||||
#define ELF32_MACHDEP_ID EM_ARM
|
||||
|
||||
#define ARCH_ELFSIZE 32 /* MD native binary size */
|
||||
|
||||
/* Processor specific relocation types */
|
||||
|
||||
#define R_ARM_NONE 0
|
||||
#define R_ARM_PC24 1
|
||||
#define R_ARM_ABS32 2
|
||||
#define R_ARM_REL32 3
|
||||
#define R_ARM_PC13 4
|
||||
#define R_ARM_ABS16 5
|
||||
#define R_ARM_ABS12 6
|
||||
#define R_ARM_THM_ABS5 7
|
||||
#define R_ARM_ABS8 8
|
||||
#define R_ARM_SBREL32 9
|
||||
#define R_ARM_THM_PC22 10
|
||||
#define R_ARM_THM_PC8 11
|
||||
#define R_ARM_AMP_VCALL9 12
|
||||
#define R_ARM_SWI24 13
|
||||
#define R_ARM_THM_SWI8 14
|
||||
#define R_ARM_XPC25 15
|
||||
#define R_ARM_THM_XPC22 16
|
||||
|
||||
/* TLS relocations */
|
||||
#define R_ARM_TLS_DTPMOD32 17 /* ID of module containing symbol */
|
||||
#define R_ARM_TLS_DTPOFF32 18 /* Offset in TLS block */
|
||||
#define R_ARM_TLS_TPOFF32 19 /* Offset in static TLS block */
|
||||
|
||||
/* 20-31 are reserved for ARM Linux. */
|
||||
#define R_ARM_COPY 20
|
||||
#define R_ARM_GLOB_DAT 21
|
||||
#define R_ARM_JUMP_SLOT 22
|
||||
#define R_ARM_RELATIVE 23
|
||||
#define R_ARM_GOTOFF 24
|
||||
#define R_ARM_GOTPC 25
|
||||
#define R_ARM_GOT32 26
|
||||
#define R_ARM_PLT32 27
|
||||
|
||||
#define R_ARM_ALU_PCREL_7_0 32
|
||||
#define R_ARM_ALU_PCREL_15_8 33
|
||||
#define R_ARM_ALU_PCREL_23_15 34
|
||||
#define R_ARM_ALU_SBREL_11_0 35
|
||||
#define R_ARM_ALU_SBREL_19_12 36
|
||||
#define R_ARM_ALU_SBREL_27_20 37
|
||||
|
||||
/* 96-111 are reserved to G++. */
|
||||
#define R_ARM_GNU_VTENTRY 100
|
||||
#define R_ARM_GNU_VTINHERIT 101
|
||||
#define R_ARM_THM_PC11 102
|
||||
#define R_ARM_THM_PC9 103
|
||||
|
||||
/* More TLS relocations */
|
||||
#define R_ARM_TLS_GD32 104 /* PC-rel 32 bit for global dynamic */
|
||||
#define R_ARM_TLS_LDM32 105 /* PC-rel 32 bit for local dynamic */
|
||||
#define R_ARM_TLS_LDO32 106 /* 32 bit offset relative to TLS */
|
||||
#define R_ARM_TLS_IE32 107 /* PC-rel 32 bit for GOT entry of */
|
||||
#define R_ARM_TLS_LE32 108
|
||||
#define R_ARM_TLS_LDO12 109
|
||||
#define R_ARM_TLS_LE12 110
|
||||
#define R_ARM_TLS_IE12GP 111
|
||||
|
||||
/* 112-127 are reserved for private experiments. */
|
||||
|
||||
#define R_ARM_RXPC25 249
|
||||
#define R_ARM_RSBREL32 250
|
||||
#define R_ARM_THM_RPC22 251
|
||||
#define R_ARM_RREL32 252
|
||||
#define R_ARM_RABS32 253
|
||||
#define R_ARM_RPC24 254
|
||||
#define R_ARM_RBASE 255
|
||||
|
||||
#define R_TYPE(name) __CONCAT(R_ARM_,name)
|
||||
|
||||
/* Processor specific program header flags */
|
||||
#define PF_ARM_SB 0x10000000
|
||||
#define PF_ARM_PI 0x20000000
|
||||
#define PF_ARM_ENTRY 0x80000000
|
||||
|
||||
/* Processor specific section header flags */
|
||||
#define SHF_ENTRYSECT 0x10000000
|
||||
#define SHF_COMDEF 0x80000000
|
||||
|
||||
/* Processor specific symbol types */
|
||||
#define STT_ARM_TFUNC STT_LOPROC
|
||||
|
||||
#ifdef _KERNEL
|
||||
#ifdef ELFSIZE
|
||||
#define ELF_MD_PROBE_FUNC ELFNAME2(arm_netbsd,probe)
|
||||
#endif
|
||||
|
||||
struct exec_package;
|
||||
|
||||
int arm_netbsd_elf32_probe(struct lwp *, struct exec_package *, void *, char *,
|
||||
vaddr_t *);
|
||||
#endif
|
||||
|
||||
#endif /* _ARM_ELF_MACHDEP_H_ */
|
||||
@@ -1,146 +0,0 @@
|
||||
/*
|
||||
* Copyright (C) 2008 The Android Open Source Project
|
||||
* All rights reserved.
|
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without
|
||||
* modification, are permitted provided that the following conditions
|
||||
* are met:
|
||||
* * Redistributions of source code must retain the above copyright
|
||||
* notice, this list of conditions and the following disclaimer.
|
||||
* * Redistributions in binary form must reproduce the above copyright
|
||||
* notice, this list of conditions and the following disclaimer in
|
||||
* the documentation and/or other materials provided with the
|
||||
* distribution.
|
||||
*
|
||||
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
|
||||
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
|
||||
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
|
||||
* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
|
||||
* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
|
||||
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
|
||||
* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
|
||||
* OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
|
||||
* AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
|
||||
* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT
|
||||
* OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
|
||||
* SUCH DAMAGE.
|
||||
*/
|
||||
|
||||
/* Assumes neon instructions and a cache line size of 32 bytes. */
|
||||
|
||||
#include <machine/cpu-features.h>
|
||||
#include <machine/asm.h>
|
||||
|
||||
/*
|
||||
* This code assumes it is running on a processor that supports all arm v7
|
||||
* instructions, that supports neon instructions, and that has a 32 byte
|
||||
* cache line.
|
||||
*/
|
||||
|
||||
.text
|
||||
.fpu neon
|
||||
|
||||
#define CACHE_LINE_SIZE 32
|
||||
|
||||
ENTRY(memcpy)
|
||||
.save {r0, lr}
|
||||
/* start preloading as early as possible */
|
||||
pld [r1, #(CACHE_LINE_SIZE*0)]
|
||||
stmfd sp!, {r0, lr}
|
||||
pld [r1, #(CACHE_LINE_SIZE*2)]
|
||||
|
||||
/* do we have at least 16-bytes to copy (needed for alignment below) */
|
||||
cmp r2, #16
|
||||
blo 5f
|
||||
|
||||
/* align destination to cache-line for the write-buffer */
|
||||
rsb r3, r0, #0
|
||||
ands r3, r3, #0xF
|
||||
beq 0f
|
||||
|
||||
/* copy up to 15-bytes (count in r3) */
|
||||
sub r2, r2, r3
|
||||
movs ip, r3, lsl #31
|
||||
ldrmib lr, [r1], #1
|
||||
strmib lr, [r0], #1
|
||||
ldrcsb ip, [r1], #1
|
||||
ldrcsb lr, [r1], #1
|
||||
strcsb ip, [r0], #1
|
||||
strcsb lr, [r0], #1
|
||||
movs ip, r3, lsl #29
|
||||
bge 1f
|
||||
// copies 4 bytes, destination 32-bits aligned
|
||||
vld4.8 {d0[0], d1[0], d2[0], d3[0]}, [r1]!
|
||||
vst4.8 {d0[0], d1[0], d2[0], d3[0]}, [r0, :32]!
|
||||
1: bcc 2f
|
||||
// copies 8 bytes, destination 64-bits aligned
|
||||
vld1.8 {d0}, [r1]!
|
||||
vst1.8 {d0}, [r0, :64]!
|
||||
2:
|
||||
|
||||
0: /* preload immediately the next cache line, which we may need */
|
||||
pld [r1, #(CACHE_LINE_SIZE*0)]
|
||||
pld [r1, #(CACHE_LINE_SIZE*2)]
|
||||
|
||||
/* make sure we have at least 64 bytes to copy */
|
||||
subs r2, r2, #64
|
||||
blo 2f
|
||||
|
||||
/* Preload all the cache lines we need.
|
||||
* NOTE: The number of pld below depends on CACHE_LINE_SIZE,
|
||||
* ideally we would increase the distance in the main loop to
|
||||
* avoid the goofy code below. In practice this doesn't seem to make
|
||||
* a big difference.
|
||||
* NOTE: The value CACHE_LINE_SIZE * 8 was chosen through
|
||||
* experimentation.
|
||||
*/
|
||||
pld [r1, #(CACHE_LINE_SIZE*4)]
|
||||
pld [r1, #(CACHE_LINE_SIZE*6)]
|
||||
pld [r1, #(CACHE_LINE_SIZE*8)]
|
||||
|
||||
1: /* The main loop copies 64 bytes at a time */
|
||||
vld1.8 {d0 - d3}, [r1]!
|
||||
vld1.8 {d4 - d7}, [r1]!
|
||||
pld [r1, #(CACHE_LINE_SIZE*8)]
|
||||
subs r2, r2, #64
|
||||
vst1.8 {d0 - d3}, [r0, :128]!
|
||||
vst1.8 {d4 - d7}, [r0, :128]!
|
||||
bhs 1b
|
||||
|
||||
2: /* fix-up the remaining count and make sure we have >= 32 bytes left */
|
||||
add r2, r2, #64
|
||||
subs r2, r2, #32
|
||||
blo 4f
|
||||
|
||||
3: /* 32 bytes at a time. These cache lines were already preloaded */
|
||||
vld1.8 {d0 - d3}, [r1]!
|
||||
subs r2, r2, #32
|
||||
vst1.8 {d0 - d3}, [r0, :128]!
|
||||
bhs 3b
|
||||
4: /* less than 32 left */
|
||||
add r2, r2, #32
|
||||
tst r2, #0x10
|
||||
beq 5f
|
||||
// copies 16 bytes, 128-bits aligned
|
||||
vld1.8 {d0, d1}, [r1]!
|
||||
vst1.8 {d0, d1}, [r0, :128]!
|
||||
|
||||
5: /* copy up to 15-bytes (count in r2) */
|
||||
movs ip, r2, lsl #29
|
||||
bcc 1f
|
||||
vld1.8 {d0}, [r1]!
|
||||
vst1.8 {d0}, [r0]!
|
||||
1: bge 2f
|
||||
vld4.8 {d0[0], d1[0], d2[0], d3[0]}, [r1]!
|
||||
vst4.8 {d0[0], d1[0], d2[0], d3[0]}, [r0]!
|
||||
2: movs ip, r2, lsl #31
|
||||
ldrmib r3, [r1], #1
|
||||
ldrcsb ip, [r1], #1
|
||||
ldrcsb lr, [r1], #1
|
||||
strmib r3, [r0], #1
|
||||
strcsb ip, [r0], #1
|
||||
strcsb lr, [r0], #1
|
||||
|
||||
ldmfd sp!, {r0, lr}
|
||||
bx lr
|
||||
END(memcpy)
|
||||
@@ -1,81 +0,0 @@
|
||||
/*
|
||||
* Copyright (C) 2008 The Android Open Source Project
|
||||
* All rights reserved.
|
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without
|
||||
* modification, are permitted provided that the following conditions
|
||||
* are met:
|
||||
* * Redistributions of source code must retain the above copyright
|
||||
* notice, this list of conditions and the following disclaimer.
|
||||
* * Redistributions in binary form must reproduce the above copyright
|
||||
* notice, this list of conditions and the following disclaimer in
|
||||
* the documentation and/or other materials provided with the
|
||||
* distribution.
|
||||
*
|
||||
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
|
||||
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
|
||||
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
|
||||
* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
|
||||
* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
|
||||
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
|
||||
* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
|
||||
* OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
|
||||
* AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
|
||||
* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT
|
||||
* OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
|
||||
* SUCH DAMAGE.
|
||||
*/
|
||||
|
||||
#include <machine/cpu-features.h>
|
||||
#include <machine/asm.h>
|
||||
|
||||
/*
|
||||
* This code assumes it is running on a processor that supports all arm v7
|
||||
* instructions, that supports neon instructions, and that supports
|
||||
* unaligned neon instruction accesses to memory.
|
||||
*/
|
||||
|
||||
.fpu neon
|
||||
|
||||
ENTRY(bzero)
|
||||
mov r2, r1
|
||||
mov r1, #0
|
||||
END(bzero)
|
||||
|
||||
/* memset() returns its first argument. */
|
||||
ENTRY(memset)
|
||||
.save {r0}
|
||||
stmfd sp!, {r0}
|
||||
|
||||
vdup.8 q0, r1
|
||||
|
||||
/* make sure we have at least 32 bytes to write */
|
||||
subs r2, r2, #32
|
||||
blo 2f
|
||||
vmov q1, q0
|
||||
|
||||
1: /* The main loop writes 32 bytes at a time */
|
||||
subs r2, r2, #32
|
||||
vst1.8 {d0 - d3}, [r0]!
|
||||
bhs 1b
|
||||
|
||||
2: /* less than 32 left */
|
||||
add r2, r2, #32
|
||||
tst r2, #0x10
|
||||
beq 3f
|
||||
|
||||
// writes 16 bytes, 128-bits aligned
|
||||
vst1.8 {d0, d1}, [r0]!
|
||||
3: /* write up to 15-bytes (count in r2) */
|
||||
movs ip, r2, lsl #29
|
||||
bcc 1f
|
||||
vst1.8 {d0}, [r0]!
|
||||
1: bge 2f
|
||||
vst1.32 {d0[0]}, [r0]!
|
||||
2: movs ip, r2, lsl #31
|
||||
strmib r1, [r0], #1
|
||||
strcsb r1, [r0], #1
|
||||
strcsb r1, [r0], #1
|
||||
ldmfd sp!, {r0}
|
||||
bx lr
|
||||
END(memset)
|
||||
@@ -1,477 +0,0 @@
|
||||
/*
|
||||
* Copyright (c) 2013 ARM Ltd
|
||||
* All rights reserved.
|
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without
|
||||
* modification, are permitted provided that the following conditions
|
||||
* are met:
|
||||
* 1. Redistributions of source code must retain the above copyright
|
||||
* notice, this list of conditions and the following disclaimer.
|
||||
* 2. Redistributions in binary form must reproduce the above copyright
|
||||
* notice, this list of conditions and the following disclaimer in the
|
||||
* documentation and/or other materials provided with the distribution.
|
||||
* 3. The name of the company may not be used to endorse or promote
|
||||
* products derived from this software without specific prior written
|
||||
* permission.
|
||||
*
|
||||
* THIS SOFTWARE IS PROVIDED BY ARM LTD ``AS IS'' AND ANY EXPRESS OR IMPLIED
|
||||
* WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
|
||||
* MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
|
||||
* IN NO EVENT SHALL ARM LTD BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
|
||||
* SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED
|
||||
* TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR
|
||||
* PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF
|
||||
* LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING
|
||||
* NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
|
||||
* SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
|
||||
*/
|
||||
|
||||
#include <machine/cpu-features.h>
|
||||
#include <machine/asm.h>
|
||||
|
||||
#ifdef __ARMEB__
|
||||
#define S2LOMEM lsl
|
||||
#define S2LOMEMEQ lsleq
|
||||
#define S2HIMEM lsr
|
||||
#define MSB 0x000000ff
|
||||
#define LSB 0xff000000
|
||||
#define BYTE0_OFFSET 24
|
||||
#define BYTE1_OFFSET 16
|
||||
#define BYTE2_OFFSET 8
|
||||
#define BYTE3_OFFSET 0
|
||||
#else /* not __ARMEB__ */
|
||||
#define S2LOMEM lsr
|
||||
#define S2LOMEMEQ lsreq
|
||||
#define S2HIMEM lsl
|
||||
#define BYTE0_OFFSET 0
|
||||
#define BYTE1_OFFSET 8
|
||||
#define BYTE2_OFFSET 16
|
||||
#define BYTE3_OFFSET 24
|
||||
#define MSB 0xff000000
|
||||
#define LSB 0x000000ff
|
||||
#endif /* not __ARMEB__ */
|
||||
|
||||
.syntax unified
|
||||
|
||||
#if defined (__thumb__)
|
||||
.thumb
|
||||
.thumb_func
|
||||
#endif
|
||||
|
||||
ENTRY(strcmp)
|
||||
/* Use LDRD whenever possible. */
|
||||
|
||||
/* The main thing to look out for when comparing large blocks is that
|
||||
the loads do not cross a page boundary when loading past the index
|
||||
of the byte with the first difference or the first string-terminator.
|
||||
|
||||
For example, if the strings are identical and the string-terminator
|
||||
is at index k, byte by byte comparison will not load beyond address
|
||||
s1+k and s2+k; word by word comparison may load up to 3 bytes beyond
|
||||
k; double word - up to 7 bytes. If the load of these bytes crosses
|
||||
a page boundary, it might cause a memory fault (if the page is not mapped)
|
||||
that would not have happened in byte by byte comparison.
|
||||
|
||||
If an address is (double) word aligned, then a load of a (double) word
|
||||
from that address will not cross a page boundary.
|
||||
Therefore, the algorithm below considers word and double-word alignment
|
||||
of strings separately. */
|
||||
|
||||
/* High-level description of the algorithm.
|
||||
|
||||
* The fast path: if both strings are double-word aligned,
|
||||
use LDRD to load two words from each string in every loop iteration.
|
||||
* If the strings have the same offset from a word boundary,
|
||||
use LDRB to load and compare byte by byte until
|
||||
the first string is aligned to a word boundary (at most 3 bytes).
|
||||
This is optimized for quick return on short unaligned strings.
|
||||
* If the strings have the same offset from a double-word boundary,
|
||||
use LDRD to load two words from each string in every loop iteration, as in the fast path.
|
||||
* If the strings do not have the same offset from a double-word boundary,
|
||||
load a word from the second string before the loop to initialize the queue.
|
||||
Use LDRD to load two words from every string in every loop iteration.
|
||||
Inside the loop, load the second word from the second string only after comparing
|
||||
the first word, using the queued value, to guarantee safety across page boundaries.
|
||||
* If the strings do not have the same offset from a word boundary,
|
||||
use LDR and a shift queue. Order of loads and comparisons matters,
|
||||
similarly to the previous case.
|
||||
|
||||
* Use UADD8 and SEL to compare words, and use REV and CLZ to compute the return value.
|
||||
* The only difference between ARM and Thumb modes is the use of CBZ instruction.
|
||||
* The only difference between big and little endian is the use of REV in little endian
|
||||
to compute the return value, instead of MOV.
|
||||
*/
|
||||
|
||||
.macro m_cbz reg label
|
||||
#ifdef __thumb2__
|
||||
cbz \reg, \label
|
||||
#else /* not defined __thumb2__ */
|
||||
cmp \reg, #0
|
||||
beq \label
|
||||
#endif /* not defined __thumb2__ */
|
||||
.endm /* m_cbz */
|
||||
|
||||
.macro m_cbnz reg label
|
||||
#ifdef __thumb2__
|
||||
cbnz \reg, \label
|
||||
#else /* not defined __thumb2__ */
|
||||
cmp \reg, #0
|
||||
bne \label
|
||||
#endif /* not defined __thumb2__ */
|
||||
.endm /* m_cbnz */
|
||||
|
||||
.macro init
|
||||
/* Macro to save temporary registers and prepare magic values. */
|
||||
subs sp, sp, #16
|
||||
strd r4, r5, [sp, #8]
|
||||
strd r6, r7, [sp]
|
||||
mvn r6, #0 /* all F */
|
||||
mov r7, #0 /* all 0 */
|
||||
.endm /* init */
|
||||
|
||||
.macro magic_compare_and_branch w1 w2 label
|
||||
/* Macro to compare registers w1 and w2 and conditionally branch to label. */
|
||||
cmp \w1, \w2 /* Are w1 and w2 the same? */
|
||||
magic_find_zero_bytes \w1
|
||||
it eq
|
||||
cmpeq ip, #0 /* Is there a zero byte in w1? */
|
||||
bne \label
|
||||
.endm /* magic_compare_and_branch */
|
||||
|
||||
.macro magic_find_zero_bytes w1
|
||||
/* Macro to find all-zero bytes in w1, result is in ip. */
|
||||
#if (defined (__ARM_FEATURE_DSP))
|
||||
uadd8 ip, \w1, r6
|
||||
sel ip, r7, r6
|
||||
#else /* not defined (__ARM_FEATURE_DSP) */
|
||||
/* __ARM_FEATURE_DSP is not defined for some Cortex-M processors.
|
||||
Coincidently, these processors only have Thumb-2 mode, where we can use the
|
||||
the (large) magic constant available directly as an immediate in instructions.
|
||||
Note that we cannot use the magic constant in ARM mode, where we need
|
||||
to create the constant in a register. */
|
||||
sub ip, \w1, #0x01010101
|
||||
bic ip, ip, \w1
|
||||
and ip, ip, #0x80808080
|
||||
#endif /* not defined (__ARM_FEATURE_DSP) */
|
||||
.endm /* magic_find_zero_bytes */
|
||||
|
||||
.macro setup_return w1 w2
|
||||
#ifdef __ARMEB__
|
||||
mov r1, \w1
|
||||
mov r2, \w2
|
||||
#else /* not __ARMEB__ */
|
||||
rev r1, \w1
|
||||
rev r2, \w2
|
||||
#endif /* not __ARMEB__ */
|
||||
.endm /* setup_return */
|
||||
|
||||
pld [r0, #0]
|
||||
pld [r1, #0]
|
||||
|
||||
/* Are both strings double-word aligned? */
|
||||
orr ip, r0, r1
|
||||
tst ip, #7
|
||||
bne do_align
|
||||
|
||||
/* Fast path. */
|
||||
init
|
||||
|
||||
doubleword_aligned:
|
||||
|
||||
/* Get here when the strings to compare are double-word aligned. */
|
||||
/* Compare two words in every iteration. */
|
||||
.p2align 2
|
||||
2:
|
||||
pld [r0, #16]
|
||||
pld [r1, #16]
|
||||
|
||||
/* Load the next double-word from each string. */
|
||||
ldrd r2, r3, [r0], #8
|
||||
ldrd r4, r5, [r1], #8
|
||||
|
||||
magic_compare_and_branch w1=r2, w2=r4, label=return_24
|
||||
magic_compare_and_branch w1=r3, w2=r5, label=return_35
|
||||
b 2b
|
||||
|
||||
do_align:
|
||||
/* Is the first string word-aligned? */
|
||||
ands ip, r0, #3
|
||||
beq word_aligned_r0
|
||||
|
||||
/* Fast compare byte by byte until the first string is word-aligned. */
|
||||
/* The offset of r0 from a word boundary is in ip. Thus, the number of bytes
|
||||
to read until the next word boundary is 4-ip. */
|
||||
bic r0, r0, #3
|
||||
ldr r2, [r0], #4
|
||||
lsls ip, ip, #31
|
||||
beq byte2
|
||||
bcs byte3
|
||||
|
||||
byte1:
|
||||
ldrb ip, [r1], #1
|
||||
uxtb r3, r2, ror #BYTE1_OFFSET
|
||||
subs ip, r3, ip
|
||||
bne fast_return
|
||||
m_cbz reg=r3, label=fast_return
|
||||
|
||||
byte2:
|
||||
ldrb ip, [r1], #1
|
||||
uxtb r3, r2, ror #BYTE2_OFFSET
|
||||
subs ip, r3, ip
|
||||
bne fast_return
|
||||
m_cbz reg=r3, label=fast_return
|
||||
|
||||
byte3:
|
||||
ldrb ip, [r1], #1
|
||||
uxtb r3, r2, ror #BYTE3_OFFSET
|
||||
subs ip, r3, ip
|
||||
bne fast_return
|
||||
m_cbnz reg=r3, label=word_aligned_r0
|
||||
|
||||
fast_return:
|
||||
mov r0, ip
|
||||
bx lr
|
||||
|
||||
word_aligned_r0:
|
||||
init
|
||||
/* The first string is word-aligned. */
|
||||
/* Is the second string word-aligned? */
|
||||
ands ip, r1, #3
|
||||
bne strcmp_unaligned
|
||||
|
||||
word_aligned:
|
||||
/* The strings are word-aligned. */
|
||||
/* Is the first string double-word aligned? */
|
||||
tst r0, #4
|
||||
beq doubleword_aligned_r0
|
||||
|
||||
/* If r0 is not double-word aligned yet, align it by loading
|
||||
and comparing the next word from each string. */
|
||||
ldr r2, [r0], #4
|
||||
ldr r4, [r1], #4
|
||||
magic_compare_and_branch w1=r2 w2=r4 label=return_24
|
||||
|
||||
doubleword_aligned_r0:
|
||||
/* Get here when r0 is double-word aligned. */
|
||||
/* Is r1 doubleword_aligned? */
|
||||
tst r1, #4
|
||||
beq doubleword_aligned
|
||||
|
||||
/* Get here when the strings to compare are word-aligned,
|
||||
r0 is double-word aligned, but r1 is not double-word aligned. */
|
||||
|
||||
/* Initialize the queue. */
|
||||
ldr r5, [r1], #4
|
||||
|
||||
/* Compare two words in every iteration. */
|
||||
.p2align 2
|
||||
3:
|
||||
pld [r0, #16]
|
||||
pld [r1, #16]
|
||||
|
||||
/* Load the next double-word from each string and compare. */
|
||||
ldrd r2, r3, [r0], #8
|
||||
magic_compare_and_branch w1=r2 w2=r5 label=return_25
|
||||
ldrd r4, r5, [r1], #8
|
||||
magic_compare_and_branch w1=r3 w2=r4 label=return_34
|
||||
b 3b
|
||||
|
||||
.macro miscmp_word offsetlo offsethi
|
||||
/* Macro to compare misaligned strings. */
|
||||
/* r0, r1 are word-aligned, and at least one of the strings
|
||||
is not double-word aligned. */
|
||||
/* Compare one word in every loop iteration. */
|
||||
/* OFFSETLO is the original bit-offset of r1 from a word-boundary,
|
||||
OFFSETHI is 32 - OFFSETLO (i.e., offset from the next word). */
|
||||
|
||||
/* Initialize the shift queue. */
|
||||
ldr r5, [r1], #4
|
||||
|
||||
/* Compare one word from each string in every loop iteration. */
|
||||
.p2align 2
|
||||
7:
|
||||
ldr r3, [r0], #4
|
||||
S2LOMEM r5, r5, #\offsetlo
|
||||
magic_find_zero_bytes w1=r3
|
||||
cmp r7, ip, S2HIMEM #\offsetlo
|
||||
and r2, r3, r6, S2LOMEM #\offsetlo
|
||||
it eq
|
||||
cmpeq r2, r5
|
||||
bne return_25
|
||||
ldr r5, [r1], #4
|
||||
cmp ip, #0
|
||||
eor r3, r2, r3
|
||||
S2HIMEM r2, r5, #\offsethi
|
||||
it eq
|
||||
cmpeq r3, r2
|
||||
bne return_32
|
||||
b 7b
|
||||
.endm /* miscmp_word */
|
||||
|
||||
strcmp_unaligned:
|
||||
/* r0 is word-aligned, r1 is at offset ip from a word. */
|
||||
/* Align r1 to the (previous) word-boundary. */
|
||||
bic r1, r1, #3
|
||||
|
||||
/* Unaligned comparison word by word using LDRs. */
|
||||
cmp ip, #2
|
||||
beq miscmp_word_16 /* If ip == 2. */
|
||||
bge miscmp_word_24 /* If ip == 3. */
|
||||
miscmp_word offsetlo=8 offsethi=24 /* If ip == 1. */
|
||||
miscmp_word_24: miscmp_word offsetlo=24 offsethi=8
|
||||
|
||||
|
||||
return_32:
|
||||
setup_return w1=r3, w2=r2
|
||||
b do_return
|
||||
return_34:
|
||||
setup_return w1=r3, w2=r4
|
||||
b do_return
|
||||
return_25:
|
||||
setup_return w1=r2, w2=r5
|
||||
b do_return
|
||||
return_35:
|
||||
setup_return w1=r3, w2=r5
|
||||
b do_return
|
||||
return_24:
|
||||
setup_return w1=r2, w2=r4
|
||||
|
||||
do_return:
|
||||
|
||||
#ifdef __ARMEB__
|
||||
mov r0, ip
|
||||
#else /* not __ARMEB__ */
|
||||
rev r0, ip
|
||||
#endif /* not __ARMEB__ */
|
||||
|
||||
/* Restore temporaries early, before computing the return value. */
|
||||
ldrd r6, r7, [sp]
|
||||
ldrd r4, r5, [sp, #8]
|
||||
adds sp, sp, #16
|
||||
|
||||
/* There is a zero or a different byte between r1 and r2. */
|
||||
/* r0 contains a mask of all-zero bytes in r1. */
|
||||
/* Using r0 and not ip here because cbz requires low register. */
|
||||
m_cbz reg=r0, label=compute_return_value
|
||||
clz r0, r0
|
||||
/* r0 contains the number of bits on the left of the first all-zero byte in r1. */
|
||||
rsb r0, r0, #24
|
||||
/* Here, r0 contains the number of bits on the right of the first all-zero byte in r1. */
|
||||
lsr r1, r1, r0
|
||||
lsr r2, r2, r0
|
||||
|
||||
compute_return_value:
|
||||
movs r0, #1
|
||||
cmp r1, r2
|
||||
/* The return value is computed as follows.
|
||||
If r1>r2 then (C==1 and Z==0) and LS doesn't hold and r0 is #1 at return.
|
||||
If r1<r2 then (C==0 and Z==0) and we execute SBC with carry_in=0,
|
||||
which means r0:=r0-r0-1 and r0 is #-1 at return.
|
||||
If r1=r2 then (C==1 and Z==1) and we execute SBC with carry_in=1,
|
||||
which means r0:=r0-r0 and r0 is #0 at return.
|
||||
(C==0 and Z==1) cannot happen because the carry bit is "not borrow". */
|
||||
it ls
|
||||
sbcls r0, r0, r0
|
||||
bx lr
|
||||
|
||||
/* The code from the previous version of strcmp.S handles this
|
||||
* particular case (the second string is 2 bytes off a word alignment)
|
||||
* faster than any current version. In this very specific case, use the
|
||||
* previous version. See bionic/libc/arch-arm/cortex-a15/bionic/strcmp.S
|
||||
* for the unedited version of this code.
|
||||
*/
|
||||
miscmp_word_16:
|
||||
wp1 .req r0
|
||||
wp2 .req r1
|
||||
b1 .req r2
|
||||
w1 .req r4
|
||||
w2 .req r5
|
||||
t1 .req ip
|
||||
@ r3 is scratch
|
||||
|
||||
/* At this point, wp1 (r0) has already been word-aligned. */
|
||||
2:
|
||||
mov b1, #1
|
||||
orr b1, b1, b1, lsl #8
|
||||
orr b1, b1, b1, lsl #16
|
||||
|
||||
and t1, wp2, #3
|
||||
bic wp2, wp2, #3
|
||||
ldr w1, [wp1], #4
|
||||
ldr w2, [wp2], #4
|
||||
|
||||
/* Critical inner Loop: Block with 2 bytes initial overlap */
|
||||
.p2align 2
|
||||
2:
|
||||
S2HIMEM t1, w1, #16
|
||||
sub r3, w1, b1
|
||||
S2LOMEM t1, t1, #16
|
||||
bic r3, r3, w1
|
||||
cmp t1, w2, S2LOMEM #16
|
||||
bne 4f
|
||||
ands r3, r3, b1, lsl #7
|
||||
it eq
|
||||
ldreq w2, [wp2], #4
|
||||
bne 5f
|
||||
eor t1, t1, w1
|
||||
cmp t1, w2, S2HIMEM #16
|
||||
bne 6f
|
||||
ldr w1, [wp1], #4
|
||||
b 2b
|
||||
|
||||
5:
|
||||
#ifdef __ARMEB__
|
||||
/* The syndrome value may contain false ones if the string ends
|
||||
* with the bytes 0x01 0x00
|
||||
*/
|
||||
tst w1, #0xff000000
|
||||
it ne
|
||||
tstne w1, #0x00ff0000
|
||||
beq 7f
|
||||
#else
|
||||
lsls r3, r3, #16
|
||||
bne 7f
|
||||
#endif
|
||||
ldrh w2, [wp2]
|
||||
S2LOMEM t1, w1, #16
|
||||
#ifdef __ARMEB__
|
||||
lsl w2, w2, #16
|
||||
#endif
|
||||
b 8f
|
||||
|
||||
6:
|
||||
S2HIMEM w2, w2, #16
|
||||
S2LOMEM t1, w1, #16
|
||||
4:
|
||||
S2LOMEM w2, w2, #16
|
||||
b 8f
|
||||
|
||||
7:
|
||||
mov r0, #0
|
||||
|
||||
/* Restore registers and stack. */
|
||||
ldrd r6, r7, [sp]
|
||||
ldrd r4, r5, [sp, #8]
|
||||
adds sp, sp, #16
|
||||
|
||||
bx lr
|
||||
|
||||
8:
|
||||
and r2, t1, #LSB
|
||||
and r0, w2, #LSB
|
||||
cmp r0, #1
|
||||
it cs
|
||||
cmpcs r0, r2
|
||||
itt eq
|
||||
S2LOMEMEQ t1, t1, #8
|
||||
S2LOMEMEQ w2, w2, #8
|
||||
beq 8b
|
||||
sub r0, r2, r0
|
||||
|
||||
/* Restore registers and stack. */
|
||||
ldrd r6, r7, [sp]
|
||||
ldrd r4, r5, [sp, #8]
|
||||
adds sp, sp, #16
|
||||
|
||||
bx lr
|
||||
END(strcmp)
|
||||
@@ -1,5 +0,0 @@
|
||||
$(call libc-add-cpu-variant-src,MEMCPY,arch-arm/krait/bionic/memcpy.S)
|
||||
$(call libc-add-cpu-variant-src,MEMSET,arch-arm/krait/bionic/memset.S)
|
||||
$(call libc-add-cpu-variant-src,STRCMP,arch-arm/krait/bionic/strcmp.S)
|
||||
|
||||
include bionic/libc/arch-arm/generic/generic.mk
|
||||
@@ -4,7 +4,6 @@ syscall_src += arch-arm/syscalls/_exit.S
|
||||
syscall_src += arch-arm/syscalls/_exit_thread.S
|
||||
syscall_src += arch-arm/syscalls/__fork.S
|
||||
syscall_src += arch-arm/syscalls/__waitid.S
|
||||
syscall_src += arch-arm/syscalls/wait4.S
|
||||
syscall_src += arch-arm/syscalls/__sys_clone.S
|
||||
syscall_src += arch-arm/syscalls/execve.S
|
||||
syscall_src += arch-arm/syscalls/__setuid.S
|
||||
@@ -151,7 +150,6 @@ syscall_src += arch-arm/syscalls/__rt_sigaction.S
|
||||
syscall_src += arch-arm/syscalls/__rt_sigprocmask.S
|
||||
syscall_src += arch-arm/syscalls/__rt_sigtimedwait.S
|
||||
syscall_src += arch-arm/syscalls/sigpending.S
|
||||
syscall_src += arch-arm/syscalls/signalfd4.S
|
||||
syscall_src += arch-arm/syscalls/socket.S
|
||||
syscall_src += arch-arm/syscalls/socketpair.S
|
||||
syscall_src += arch-arm/syscalls/bind.S
|
||||
@@ -181,6 +179,7 @@ syscall_src += arch-arm/syscalls/__getcpu.S
|
||||
syscall_src += arch-arm/syscalls/ioprio_set.S
|
||||
syscall_src += arch-arm/syscalls/ioprio_get.S
|
||||
syscall_src += arch-arm/syscalls/uname.S
|
||||
syscall_src += arch-arm/syscalls/__wait4.S
|
||||
syscall_src += arch-arm/syscalls/umask.S
|
||||
syscall_src += arch-arm/syscalls/__reboot.S
|
||||
syscall_src += arch-arm/syscalls/__syslog.S
|
||||
|
||||
@@ -1,15 +1,14 @@
|
||||
/* autogenerated by gensyscalls.py */
|
||||
#include <asm/unistd.h>
|
||||
#include <linux/err.h>
|
||||
#include <machine/asm.h>
|
||||
#include <sys/linux-syscalls.h>
|
||||
|
||||
ENTRY(__brk)
|
||||
mov ip, r7
|
||||
.save {r4, r7}
|
||||
stmfd sp!, {r4, r7}
|
||||
ldr r7, =__NR_brk
|
||||
swi #0
|
||||
mov r7, ip
|
||||
cmn r0, #(MAX_ERRNO + 1)
|
||||
bxls lr
|
||||
neg r0, r0
|
||||
b __set_errno
|
||||
ldmfd sp!, {r4, r7}
|
||||
movs r0, r0
|
||||
bxpl lr
|
||||
b __set_syscall_errno
|
||||
END(__brk)
|
||||
|
||||
@@ -1,15 +1,14 @@
|
||||
/* autogenerated by gensyscalls.py */
|
||||
#include <asm/unistd.h>
|
||||
#include <linux/err.h>
|
||||
#include <machine/asm.h>
|
||||
#include <sys/linux-syscalls.h>
|
||||
|
||||
ENTRY(__fcntl)
|
||||
mov ip, r7
|
||||
.save {r4, r7}
|
||||
stmfd sp!, {r4, r7}
|
||||
ldr r7, =__NR_fcntl
|
||||
swi #0
|
||||
mov r7, ip
|
||||
cmn r0, #(MAX_ERRNO + 1)
|
||||
bxls lr
|
||||
neg r0, r0
|
||||
b __set_errno
|
||||
ldmfd sp!, {r4, r7}
|
||||
movs r0, r0
|
||||
bxpl lr
|
||||
b __set_syscall_errno
|
||||
END(__fcntl)
|
||||
|
||||
@@ -1,15 +1,14 @@
|
||||
/* autogenerated by gensyscalls.py */
|
||||
#include <asm/unistd.h>
|
||||
#include <linux/err.h>
|
||||
#include <machine/asm.h>
|
||||
#include <sys/linux-syscalls.h>
|
||||
|
||||
ENTRY(__fcntl64)
|
||||
mov ip, r7
|
||||
.save {r4, r7}
|
||||
stmfd sp!, {r4, r7}
|
||||
ldr r7, =__NR_fcntl64
|
||||
swi #0
|
||||
mov r7, ip
|
||||
cmn r0, #(MAX_ERRNO + 1)
|
||||
bxls lr
|
||||
neg r0, r0
|
||||
b __set_errno
|
||||
ldmfd sp!, {r4, r7}
|
||||
movs r0, r0
|
||||
bxpl lr
|
||||
b __set_syscall_errno
|
||||
END(__fcntl64)
|
||||
|
||||
@@ -1,15 +1,14 @@
|
||||
/* autogenerated by gensyscalls.py */
|
||||
#include <asm/unistd.h>
|
||||
#include <linux/err.h>
|
||||
#include <machine/asm.h>
|
||||
#include <sys/linux-syscalls.h>
|
||||
|
||||
ENTRY(__fork)
|
||||
mov ip, r7
|
||||
.save {r4, r7}
|
||||
stmfd sp!, {r4, r7}
|
||||
ldr r7, =__NR_fork
|
||||
swi #0
|
||||
mov r7, ip
|
||||
cmn r0, #(MAX_ERRNO + 1)
|
||||
bxls lr
|
||||
neg r0, r0
|
||||
b __set_errno
|
||||
ldmfd sp!, {r4, r7}
|
||||
movs r0, r0
|
||||
bxpl lr
|
||||
b __set_syscall_errno
|
||||
END(__fork)
|
||||
|
||||
@@ -1,15 +1,14 @@
|
||||
/* autogenerated by gensyscalls.py */
|
||||
#include <asm/unistd.h>
|
||||
#include <linux/err.h>
|
||||
#include <machine/asm.h>
|
||||
#include <sys/linux-syscalls.h>
|
||||
|
||||
ENTRY(__fstatfs64)
|
||||
mov ip, r7
|
||||
.save {r4, r7}
|
||||
stmfd sp!, {r4, r7}
|
||||
ldr r7, =__NR_fstatfs64
|
||||
swi #0
|
||||
mov r7, ip
|
||||
cmn r0, #(MAX_ERRNO + 1)
|
||||
bxls lr
|
||||
neg r0, r0
|
||||
b __set_errno
|
||||
ldmfd sp!, {r4, r7}
|
||||
movs r0, r0
|
||||
bxpl lr
|
||||
b __set_syscall_errno
|
||||
END(__fstatfs64)
|
||||
|
||||
@@ -1,15 +1,14 @@
|
||||
/* autogenerated by gensyscalls.py */
|
||||
#include <asm/unistd.h>
|
||||
#include <linux/err.h>
|
||||
#include <machine/asm.h>
|
||||
#include <sys/linux-syscalls.h>
|
||||
|
||||
ENTRY(__getcpu)
|
||||
mov ip, r7
|
||||
.save {r4, r7}
|
||||
stmfd sp!, {r4, r7}
|
||||
ldr r7, =__NR_getcpu
|
||||
swi #0
|
||||
mov r7, ip
|
||||
cmn r0, #(MAX_ERRNO + 1)
|
||||
bxls lr
|
||||
neg r0, r0
|
||||
b __set_errno
|
||||
ldmfd sp!, {r4, r7}
|
||||
movs r0, r0
|
||||
bxpl lr
|
||||
b __set_syscall_errno
|
||||
END(__getcpu)
|
||||
|
||||
@@ -1,15 +1,14 @@
|
||||
/* autogenerated by gensyscalls.py */
|
||||
#include <asm/unistd.h>
|
||||
#include <linux/err.h>
|
||||
#include <machine/asm.h>
|
||||
#include <sys/linux-syscalls.h>
|
||||
|
||||
ENTRY(__getcwd)
|
||||
mov ip, r7
|
||||
.save {r4, r7}
|
||||
stmfd sp!, {r4, r7}
|
||||
ldr r7, =__NR_getcwd
|
||||
swi #0
|
||||
mov r7, ip
|
||||
cmn r0, #(MAX_ERRNO + 1)
|
||||
bxls lr
|
||||
neg r0, r0
|
||||
b __set_errno
|
||||
ldmfd sp!, {r4, r7}
|
||||
movs r0, r0
|
||||
bxpl lr
|
||||
b __set_syscall_errno
|
||||
END(__getcwd)
|
||||
|
||||
@@ -1,15 +1,14 @@
|
||||
/* autogenerated by gensyscalls.py */
|
||||
#include <asm/unistd.h>
|
||||
#include <linux/err.h>
|
||||
#include <machine/asm.h>
|
||||
#include <sys/linux-syscalls.h>
|
||||
|
||||
ENTRY(__getpriority)
|
||||
mov ip, r7
|
||||
.save {r4, r7}
|
||||
stmfd sp!, {r4, r7}
|
||||
ldr r7, =__NR_getpriority
|
||||
swi #0
|
||||
mov r7, ip
|
||||
cmn r0, #(MAX_ERRNO + 1)
|
||||
bxls lr
|
||||
neg r0, r0
|
||||
b __set_errno
|
||||
ldmfd sp!, {r4, r7}
|
||||
movs r0, r0
|
||||
bxpl lr
|
||||
b __set_syscall_errno
|
||||
END(__getpriority)
|
||||
|
||||
@@ -1,15 +1,14 @@
|
||||
/* autogenerated by gensyscalls.py */
|
||||
#include <asm/unistd.h>
|
||||
#include <linux/err.h>
|
||||
#include <machine/asm.h>
|
||||
#include <sys/linux-syscalls.h>
|
||||
|
||||
ENTRY(__ioctl)
|
||||
mov ip, r7
|
||||
.save {r4, r7}
|
||||
stmfd sp!, {r4, r7}
|
||||
ldr r7, =__NR_ioctl
|
||||
swi #0
|
||||
mov r7, ip
|
||||
cmn r0, #(MAX_ERRNO + 1)
|
||||
bxls lr
|
||||
neg r0, r0
|
||||
b __set_errno
|
||||
ldmfd sp!, {r4, r7}
|
||||
movs r0, r0
|
||||
bxpl lr
|
||||
b __set_syscall_errno
|
||||
END(__ioctl)
|
||||
|
||||
@@ -1,7 +1,6 @@
|
||||
/* autogenerated by gensyscalls.py */
|
||||
#include <asm/unistd.h>
|
||||
#include <linux/err.h>
|
||||
#include <machine/asm.h>
|
||||
#include <sys/linux-syscalls.h>
|
||||
|
||||
ENTRY(__llseek)
|
||||
mov ip, sp
|
||||
@@ -11,8 +10,7 @@ ENTRY(__llseek)
|
||||
ldr r7, =__NR__llseek
|
||||
swi #0
|
||||
ldmfd sp!, {r4, r5, r6, r7}
|
||||
cmn r0, #(MAX_ERRNO + 1)
|
||||
bxls lr
|
||||
neg r0, r0
|
||||
b __set_errno
|
||||
movs r0, r0
|
||||
bxpl lr
|
||||
b __set_syscall_errno
|
||||
END(__llseek)
|
||||
|
||||
@@ -1,7 +1,6 @@
|
||||
/* autogenerated by gensyscalls.py */
|
||||
#include <asm/unistd.h>
|
||||
#include <linux/err.h>
|
||||
#include <machine/asm.h>
|
||||
#include <sys/linux-syscalls.h>
|
||||
|
||||
ENTRY(__mmap2)
|
||||
mov ip, sp
|
||||
@@ -11,8 +10,7 @@ ENTRY(__mmap2)
|
||||
ldr r7, =__NR_mmap2
|
||||
swi #0
|
||||
ldmfd sp!, {r4, r5, r6, r7}
|
||||
cmn r0, #(MAX_ERRNO + 1)
|
||||
bxls lr
|
||||
neg r0, r0
|
||||
b __set_errno
|
||||
movs r0, r0
|
||||
bxpl lr
|
||||
b __set_syscall_errno
|
||||
END(__mmap2)
|
||||
|
||||
@@ -1,15 +1,14 @@
|
||||
/* autogenerated by gensyscalls.py */
|
||||
#include <asm/unistd.h>
|
||||
#include <linux/err.h>
|
||||
#include <machine/asm.h>
|
||||
#include <sys/linux-syscalls.h>
|
||||
|
||||
ENTRY(__open)
|
||||
mov ip, r7
|
||||
.save {r4, r7}
|
||||
stmfd sp!, {r4, r7}
|
||||
ldr r7, =__NR_open
|
||||
swi #0
|
||||
mov r7, ip
|
||||
cmn r0, #(MAX_ERRNO + 1)
|
||||
bxls lr
|
||||
neg r0, r0
|
||||
b __set_errno
|
||||
ldmfd sp!, {r4, r7}
|
||||
movs r0, r0
|
||||
bxpl lr
|
||||
b __set_syscall_errno
|
||||
END(__open)
|
||||
|
||||
@@ -1,15 +1,14 @@
|
||||
/* autogenerated by gensyscalls.py */
|
||||
#include <asm/unistd.h>
|
||||
#include <linux/err.h>
|
||||
#include <machine/asm.h>
|
||||
#include <sys/linux-syscalls.h>
|
||||
|
||||
ENTRY(__openat)
|
||||
mov ip, r7
|
||||
.save {r4, r7}
|
||||
stmfd sp!, {r4, r7}
|
||||
ldr r7, =__NR_openat
|
||||
swi #0
|
||||
mov r7, ip
|
||||
cmn r0, #(MAX_ERRNO + 1)
|
||||
bxls lr
|
||||
neg r0, r0
|
||||
b __set_errno
|
||||
ldmfd sp!, {r4, r7}
|
||||
movs r0, r0
|
||||
bxpl lr
|
||||
b __set_syscall_errno
|
||||
END(__openat)
|
||||
|
||||
@@ -1,15 +1,14 @@
|
||||
/* autogenerated by gensyscalls.py */
|
||||
#include <asm/unistd.h>
|
||||
#include <linux/err.h>
|
||||
#include <machine/asm.h>
|
||||
#include <sys/linux-syscalls.h>
|
||||
|
||||
ENTRY(__ptrace)
|
||||
mov ip, r7
|
||||
.save {r4, r7}
|
||||
stmfd sp!, {r4, r7}
|
||||
ldr r7, =__NR_ptrace
|
||||
swi #0
|
||||
mov r7, ip
|
||||
cmn r0, #(MAX_ERRNO + 1)
|
||||
bxls lr
|
||||
neg r0, r0
|
||||
b __set_errno
|
||||
ldmfd sp!, {r4, r7}
|
||||
movs r0, r0
|
||||
bxpl lr
|
||||
b __set_syscall_errno
|
||||
END(__ptrace)
|
||||
|
||||
@@ -1,15 +1,14 @@
|
||||
/* autogenerated by gensyscalls.py */
|
||||
#include <asm/unistd.h>
|
||||
#include <linux/err.h>
|
||||
#include <machine/asm.h>
|
||||
#include <sys/linux-syscalls.h>
|
||||
|
||||
ENTRY(__reboot)
|
||||
mov ip, r7
|
||||
.save {r4, r7}
|
||||
stmfd sp!, {r4, r7}
|
||||
ldr r7, =__NR_reboot
|
||||
swi #0
|
||||
mov r7, ip
|
||||
cmn r0, #(MAX_ERRNO + 1)
|
||||
bxls lr
|
||||
neg r0, r0
|
||||
b __set_errno
|
||||
ldmfd sp!, {r4, r7}
|
||||
movs r0, r0
|
||||
bxpl lr
|
||||
b __set_syscall_errno
|
||||
END(__reboot)
|
||||
|
||||
@@ -1,15 +1,14 @@
|
||||
/* autogenerated by gensyscalls.py */
|
||||
#include <asm/unistd.h>
|
||||
#include <linux/err.h>
|
||||
#include <machine/asm.h>
|
||||
#include <sys/linux-syscalls.h>
|
||||
|
||||
ENTRY(__rt_sigaction)
|
||||
mov ip, r7
|
||||
.save {r4, r7}
|
||||
stmfd sp!, {r4, r7}
|
||||
ldr r7, =__NR_rt_sigaction
|
||||
swi #0
|
||||
mov r7, ip
|
||||
cmn r0, #(MAX_ERRNO + 1)
|
||||
bxls lr
|
||||
neg r0, r0
|
||||
b __set_errno
|
||||
ldmfd sp!, {r4, r7}
|
||||
movs r0, r0
|
||||
bxpl lr
|
||||
b __set_syscall_errno
|
||||
END(__rt_sigaction)
|
||||
|
||||
@@ -1,15 +1,14 @@
|
||||
/* autogenerated by gensyscalls.py */
|
||||
#include <asm/unistd.h>
|
||||
#include <linux/err.h>
|
||||
#include <machine/asm.h>
|
||||
#include <sys/linux-syscalls.h>
|
||||
|
||||
ENTRY(__rt_sigprocmask)
|
||||
mov ip, r7
|
||||
.save {r4, r7}
|
||||
stmfd sp!, {r4, r7}
|
||||
ldr r7, =__NR_rt_sigprocmask
|
||||
swi #0
|
||||
mov r7, ip
|
||||
cmn r0, #(MAX_ERRNO + 1)
|
||||
bxls lr
|
||||
neg r0, r0
|
||||
b __set_errno
|
||||
ldmfd sp!, {r4, r7}
|
||||
movs r0, r0
|
||||
bxpl lr
|
||||
b __set_syscall_errno
|
||||
END(__rt_sigprocmask)
|
||||
|
||||
@@ -1,15 +1,14 @@
|
||||
/* autogenerated by gensyscalls.py */
|
||||
#include <asm/unistd.h>
|
||||
#include <linux/err.h>
|
||||
#include <machine/asm.h>
|
||||
#include <sys/linux-syscalls.h>
|
||||
|
||||
ENTRY(__rt_sigtimedwait)
|
||||
mov ip, r7
|
||||
.save {r4, r7}
|
||||
stmfd sp!, {r4, r7}
|
||||
ldr r7, =__NR_rt_sigtimedwait
|
||||
swi #0
|
||||
mov r7, ip
|
||||
cmn r0, #(MAX_ERRNO + 1)
|
||||
bxls lr
|
||||
neg r0, r0
|
||||
b __set_errno
|
||||
ldmfd sp!, {r4, r7}
|
||||
movs r0, r0
|
||||
bxpl lr
|
||||
b __set_syscall_errno
|
||||
END(__rt_sigtimedwait)
|
||||
|
||||
@@ -1,15 +1,14 @@
|
||||
/* autogenerated by gensyscalls.py */
|
||||
#include <asm/unistd.h>
|
||||
#include <linux/err.h>
|
||||
#include <machine/asm.h>
|
||||
#include <sys/linux-syscalls.h>
|
||||
|
||||
ENTRY(__sched_getaffinity)
|
||||
mov ip, r7
|
||||
.save {r4, r7}
|
||||
stmfd sp!, {r4, r7}
|
||||
ldr r7, =__NR_sched_getaffinity
|
||||
swi #0
|
||||
mov r7, ip
|
||||
cmn r0, #(MAX_ERRNO + 1)
|
||||
bxls lr
|
||||
neg r0, r0
|
||||
b __set_errno
|
||||
ldmfd sp!, {r4, r7}
|
||||
movs r0, r0
|
||||
bxpl lr
|
||||
b __set_syscall_errno
|
||||
END(__sched_getaffinity)
|
||||
|
||||
@@ -1,15 +1,14 @@
|
||||
/* autogenerated by gensyscalls.py */
|
||||
#include <asm/unistd.h>
|
||||
#include <linux/err.h>
|
||||
#include <machine/asm.h>
|
||||
#include <sys/linux-syscalls.h>
|
||||
|
||||
ENTRY(__set_tls)
|
||||
mov ip, r7
|
||||
ldr r7, =__ARM_NR_set_tls
|
||||
.save {r4, r7}
|
||||
stmfd sp!, {r4, r7}
|
||||
ldr r7, =__NR_ARM_set_tls
|
||||
swi #0
|
||||
mov r7, ip
|
||||
cmn r0, #(MAX_ERRNO + 1)
|
||||
bxls lr
|
||||
neg r0, r0
|
||||
b __set_errno
|
||||
ldmfd sp!, {r4, r7}
|
||||
movs r0, r0
|
||||
bxpl lr
|
||||
b __set_syscall_errno
|
||||
END(__set_tls)
|
||||
|
||||
@@ -1,15 +1,14 @@
|
||||
/* autogenerated by gensyscalls.py */
|
||||
#include <asm/unistd.h>
|
||||
#include <linux/err.h>
|
||||
#include <machine/asm.h>
|
||||
#include <sys/linux-syscalls.h>
|
||||
|
||||
ENTRY(__setresuid)
|
||||
mov ip, r7
|
||||
.save {r4, r7}
|
||||
stmfd sp!, {r4, r7}
|
||||
ldr r7, =__NR_setresuid32
|
||||
swi #0
|
||||
mov r7, ip
|
||||
cmn r0, #(MAX_ERRNO + 1)
|
||||
bxls lr
|
||||
neg r0, r0
|
||||
b __set_errno
|
||||
ldmfd sp!, {r4, r7}
|
||||
movs r0, r0
|
||||
bxpl lr
|
||||
b __set_syscall_errno
|
||||
END(__setresuid)
|
||||
|
||||
@@ -1,15 +1,14 @@
|
||||
/* autogenerated by gensyscalls.py */
|
||||
#include <asm/unistd.h>
|
||||
#include <linux/err.h>
|
||||
#include <machine/asm.h>
|
||||
#include <sys/linux-syscalls.h>
|
||||
|
||||
ENTRY(__setreuid)
|
||||
mov ip, r7
|
||||
.save {r4, r7}
|
||||
stmfd sp!, {r4, r7}
|
||||
ldr r7, =__NR_setreuid32
|
||||
swi #0
|
||||
mov r7, ip
|
||||
cmn r0, #(MAX_ERRNO + 1)
|
||||
bxls lr
|
||||
neg r0, r0
|
||||
b __set_errno
|
||||
ldmfd sp!, {r4, r7}
|
||||
movs r0, r0
|
||||
bxpl lr
|
||||
b __set_syscall_errno
|
||||
END(__setreuid)
|
||||
|
||||
@@ -1,15 +1,14 @@
|
||||
/* autogenerated by gensyscalls.py */
|
||||
#include <asm/unistd.h>
|
||||
#include <linux/err.h>
|
||||
#include <machine/asm.h>
|
||||
#include <sys/linux-syscalls.h>
|
||||
|
||||
ENTRY(__setuid)
|
||||
mov ip, r7
|
||||
.save {r4, r7}
|
||||
stmfd sp!, {r4, r7}
|
||||
ldr r7, =__NR_setuid32
|
||||
swi #0
|
||||
mov r7, ip
|
||||
cmn r0, #(MAX_ERRNO + 1)
|
||||
bxls lr
|
||||
neg r0, r0
|
||||
b __set_errno
|
||||
ldmfd sp!, {r4, r7}
|
||||
movs r0, r0
|
||||
bxpl lr
|
||||
b __set_syscall_errno
|
||||
END(__setuid)
|
||||
|
||||
@@ -1,15 +1,14 @@
|
||||
/* autogenerated by gensyscalls.py */
|
||||
#include <asm/unistd.h>
|
||||
#include <linux/err.h>
|
||||
#include <machine/asm.h>
|
||||
#include <sys/linux-syscalls.h>
|
||||
|
||||
ENTRY(__sigsuspend)
|
||||
mov ip, r7
|
||||
.save {r4, r7}
|
||||
stmfd sp!, {r4, r7}
|
||||
ldr r7, =__NR_sigsuspend
|
||||
swi #0
|
||||
mov r7, ip
|
||||
cmn r0, #(MAX_ERRNO + 1)
|
||||
bxls lr
|
||||
neg r0, r0
|
||||
b __set_errno
|
||||
ldmfd sp!, {r4, r7}
|
||||
movs r0, r0
|
||||
bxpl lr
|
||||
b __set_syscall_errno
|
||||
END(__sigsuspend)
|
||||
|
||||
@@ -1,15 +1,14 @@
|
||||
/* autogenerated by gensyscalls.py */
|
||||
#include <asm/unistd.h>
|
||||
#include <linux/err.h>
|
||||
#include <machine/asm.h>
|
||||
#include <sys/linux-syscalls.h>
|
||||
|
||||
ENTRY(__statfs64)
|
||||
mov ip, r7
|
||||
.save {r4, r7}
|
||||
stmfd sp!, {r4, r7}
|
||||
ldr r7, =__NR_statfs64
|
||||
swi #0
|
||||
mov r7, ip
|
||||
cmn r0, #(MAX_ERRNO + 1)
|
||||
bxls lr
|
||||
neg r0, r0
|
||||
b __set_errno
|
||||
ldmfd sp!, {r4, r7}
|
||||
movs r0, r0
|
||||
bxpl lr
|
||||
b __set_syscall_errno
|
||||
END(__statfs64)
|
||||
|
||||
@@ -1,7 +1,6 @@
|
||||
/* autogenerated by gensyscalls.py */
|
||||
#include <asm/unistd.h>
|
||||
#include <linux/err.h>
|
||||
#include <machine/asm.h>
|
||||
#include <sys/linux-syscalls.h>
|
||||
|
||||
ENTRY(__sys_clone)
|
||||
mov ip, sp
|
||||
@@ -11,8 +10,7 @@ ENTRY(__sys_clone)
|
||||
ldr r7, =__NR_clone
|
||||
swi #0
|
||||
ldmfd sp!, {r4, r5, r6, r7}
|
||||
cmn r0, #(MAX_ERRNO + 1)
|
||||
bxls lr
|
||||
neg r0, r0
|
||||
b __set_errno
|
||||
movs r0, r0
|
||||
bxpl lr
|
||||
b __set_syscall_errno
|
||||
END(__sys_clone)
|
||||
|
||||
@@ -1,15 +1,14 @@
|
||||
/* autogenerated by gensyscalls.py */
|
||||
#include <asm/unistd.h>
|
||||
#include <linux/err.h>
|
||||
#include <machine/asm.h>
|
||||
#include <sys/linux-syscalls.h>
|
||||
|
||||
ENTRY(__syslog)
|
||||
mov ip, r7
|
||||
.save {r4, r7}
|
||||
stmfd sp!, {r4, r7}
|
||||
ldr r7, =__NR_syslog
|
||||
swi #0
|
||||
mov r7, ip
|
||||
cmn r0, #(MAX_ERRNO + 1)
|
||||
bxls lr
|
||||
neg r0, r0
|
||||
b __set_errno
|
||||
ldmfd sp!, {r4, r7}
|
||||
movs r0, r0
|
||||
bxpl lr
|
||||
b __set_syscall_errno
|
||||
END(__syslog)
|
||||
|
||||
@@ -1,15 +1,14 @@
|
||||
/* autogenerated by gensyscalls.py */
|
||||
#include <asm/unistd.h>
|
||||
#include <linux/err.h>
|
||||
#include <machine/asm.h>
|
||||
#include <sys/linux-syscalls.h>
|
||||
|
||||
ENTRY(__timer_create)
|
||||
mov ip, r7
|
||||
.save {r4, r7}
|
||||
stmfd sp!, {r4, r7}
|
||||
ldr r7, =__NR_timer_create
|
||||
swi #0
|
||||
mov r7, ip
|
||||
cmn r0, #(MAX_ERRNO + 1)
|
||||
bxls lr
|
||||
neg r0, r0
|
||||
b __set_errno
|
||||
ldmfd sp!, {r4, r7}
|
||||
movs r0, r0
|
||||
bxpl lr
|
||||
b __set_syscall_errno
|
||||
END(__timer_create)
|
||||
|
||||
@@ -1,15 +1,14 @@
|
||||
/* autogenerated by gensyscalls.py */
|
||||
#include <asm/unistd.h>
|
||||
#include <linux/err.h>
|
||||
#include <machine/asm.h>
|
||||
#include <sys/linux-syscalls.h>
|
||||
|
||||
ENTRY(__timer_delete)
|
||||
mov ip, r7
|
||||
.save {r4, r7}
|
||||
stmfd sp!, {r4, r7}
|
||||
ldr r7, =__NR_timer_delete
|
||||
swi #0
|
||||
mov r7, ip
|
||||
cmn r0, #(MAX_ERRNO + 1)
|
||||
bxls lr
|
||||
neg r0, r0
|
||||
b __set_errno
|
||||
ldmfd sp!, {r4, r7}
|
||||
movs r0, r0
|
||||
bxpl lr
|
||||
b __set_syscall_errno
|
||||
END(__timer_delete)
|
||||
|
||||
@@ -1,15 +1,14 @@
|
||||
/* autogenerated by gensyscalls.py */
|
||||
#include <asm/unistd.h>
|
||||
#include <linux/err.h>
|
||||
#include <machine/asm.h>
|
||||
#include <sys/linux-syscalls.h>
|
||||
|
||||
ENTRY(__timer_getoverrun)
|
||||
mov ip, r7
|
||||
.save {r4, r7}
|
||||
stmfd sp!, {r4, r7}
|
||||
ldr r7, =__NR_timer_getoverrun
|
||||
swi #0
|
||||
mov r7, ip
|
||||
cmn r0, #(MAX_ERRNO + 1)
|
||||
bxls lr
|
||||
neg r0, r0
|
||||
b __set_errno
|
||||
ldmfd sp!, {r4, r7}
|
||||
movs r0, r0
|
||||
bxpl lr
|
||||
b __set_syscall_errno
|
||||
END(__timer_getoverrun)
|
||||
|
||||
@@ -1,15 +1,14 @@
|
||||
/* autogenerated by gensyscalls.py */
|
||||
#include <asm/unistd.h>
|
||||
#include <linux/err.h>
|
||||
#include <machine/asm.h>
|
||||
#include <sys/linux-syscalls.h>
|
||||
|
||||
ENTRY(__timer_gettime)
|
||||
mov ip, r7
|
||||
.save {r4, r7}
|
||||
stmfd sp!, {r4, r7}
|
||||
ldr r7, =__NR_timer_gettime
|
||||
swi #0
|
||||
mov r7, ip
|
||||
cmn r0, #(MAX_ERRNO + 1)
|
||||
bxls lr
|
||||
neg r0, r0
|
||||
b __set_errno
|
||||
ldmfd sp!, {r4, r7}
|
||||
movs r0, r0
|
||||
bxpl lr
|
||||
b __set_syscall_errno
|
||||
END(__timer_gettime)
|
||||
|
||||
@@ -1,15 +1,14 @@
|
||||
/* autogenerated by gensyscalls.py */
|
||||
#include <asm/unistd.h>
|
||||
#include <linux/err.h>
|
||||
#include <machine/asm.h>
|
||||
#include <sys/linux-syscalls.h>
|
||||
|
||||
ENTRY(__timer_settime)
|
||||
mov ip, r7
|
||||
.save {r4, r7}
|
||||
stmfd sp!, {r4, r7}
|
||||
ldr r7, =__NR_timer_settime
|
||||
swi #0
|
||||
mov r7, ip
|
||||
cmn r0, #(MAX_ERRNO + 1)
|
||||
bxls lr
|
||||
neg r0, r0
|
||||
b __set_errno
|
||||
ldmfd sp!, {r4, r7}
|
||||
movs r0, r0
|
||||
bxpl lr
|
||||
b __set_syscall_errno
|
||||
END(__timer_settime)
|
||||
|
||||
14
libc/arch-arm/syscalls/__wait4.S
Normal file
14
libc/arch-arm/syscalls/__wait4.S
Normal file
@@ -0,0 +1,14 @@
|
||||
/* autogenerated by gensyscalls.py */
|
||||
#include <machine/asm.h>
|
||||
#include <sys/linux-syscalls.h>
|
||||
|
||||
ENTRY(__wait4)
|
||||
.save {r4, r7}
|
||||
stmfd sp!, {r4, r7}
|
||||
ldr r7, =__NR_wait4
|
||||
swi #0
|
||||
ldmfd sp!, {r4, r7}
|
||||
movs r0, r0
|
||||
bxpl lr
|
||||
b __set_syscall_errno
|
||||
END(__wait4)
|
||||
@@ -1,7 +1,6 @@
|
||||
/* autogenerated by gensyscalls.py */
|
||||
#include <asm/unistd.h>
|
||||
#include <linux/err.h>
|
||||
#include <machine/asm.h>
|
||||
#include <sys/linux-syscalls.h>
|
||||
|
||||
ENTRY(__waitid)
|
||||
mov ip, sp
|
||||
@@ -11,8 +10,7 @@ ENTRY(__waitid)
|
||||
ldr r7, =__NR_waitid
|
||||
swi #0
|
||||
ldmfd sp!, {r4, r5, r6, r7}
|
||||
cmn r0, #(MAX_ERRNO + 1)
|
||||
bxls lr
|
||||
neg r0, r0
|
||||
b __set_errno
|
||||
movs r0, r0
|
||||
bxpl lr
|
||||
b __set_syscall_errno
|
||||
END(__waitid)
|
||||
|
||||
@@ -1,15 +1,14 @@
|
||||
/* autogenerated by gensyscalls.py */
|
||||
#include <asm/unistd.h>
|
||||
#include <linux/err.h>
|
||||
#include <machine/asm.h>
|
||||
#include <sys/linux-syscalls.h>
|
||||
|
||||
ENTRY(_exit)
|
||||
mov ip, r7
|
||||
.save {r4, r7}
|
||||
stmfd sp!, {r4, r7}
|
||||
ldr r7, =__NR_exit_group
|
||||
swi #0
|
||||
mov r7, ip
|
||||
cmn r0, #(MAX_ERRNO + 1)
|
||||
bxls lr
|
||||
neg r0, r0
|
||||
b __set_errno
|
||||
ldmfd sp!, {r4, r7}
|
||||
movs r0, r0
|
||||
bxpl lr
|
||||
b __set_syscall_errno
|
||||
END(_exit)
|
||||
|
||||
@@ -1,15 +1,14 @@
|
||||
/* autogenerated by gensyscalls.py */
|
||||
#include <asm/unistd.h>
|
||||
#include <linux/err.h>
|
||||
#include <machine/asm.h>
|
||||
#include <sys/linux-syscalls.h>
|
||||
|
||||
ENTRY(_exit_thread)
|
||||
mov ip, r7
|
||||
.save {r4, r7}
|
||||
stmfd sp!, {r4, r7}
|
||||
ldr r7, =__NR_exit
|
||||
swi #0
|
||||
mov r7, ip
|
||||
cmn r0, #(MAX_ERRNO + 1)
|
||||
bxls lr
|
||||
neg r0, r0
|
||||
b __set_errno
|
||||
ldmfd sp!, {r4, r7}
|
||||
movs r0, r0
|
||||
bxpl lr
|
||||
b __set_syscall_errno
|
||||
END(_exit_thread)
|
||||
|
||||
@@ -1,15 +1,14 @@
|
||||
/* autogenerated by gensyscalls.py */
|
||||
#include <asm/unistd.h>
|
||||
#include <linux/err.h>
|
||||
#include <machine/asm.h>
|
||||
#include <sys/linux-syscalls.h>
|
||||
|
||||
ENTRY(accept)
|
||||
mov ip, r7
|
||||
.save {r4, r7}
|
||||
stmfd sp!, {r4, r7}
|
||||
ldr r7, =__NR_accept
|
||||
swi #0
|
||||
mov r7, ip
|
||||
cmn r0, #(MAX_ERRNO + 1)
|
||||
bxls lr
|
||||
neg r0, r0
|
||||
b __set_errno
|
||||
ldmfd sp!, {r4, r7}
|
||||
movs r0, r0
|
||||
bxpl lr
|
||||
b __set_syscall_errno
|
||||
END(accept)
|
||||
|
||||
@@ -1,15 +1,14 @@
|
||||
/* autogenerated by gensyscalls.py */
|
||||
#include <asm/unistd.h>
|
||||
#include <linux/err.h>
|
||||
#include <machine/asm.h>
|
||||
#include <sys/linux-syscalls.h>
|
||||
|
||||
ENTRY(access)
|
||||
mov ip, r7
|
||||
.save {r4, r7}
|
||||
stmfd sp!, {r4, r7}
|
||||
ldr r7, =__NR_access
|
||||
swi #0
|
||||
mov r7, ip
|
||||
cmn r0, #(MAX_ERRNO + 1)
|
||||
bxls lr
|
||||
neg r0, r0
|
||||
b __set_errno
|
||||
ldmfd sp!, {r4, r7}
|
||||
movs r0, r0
|
||||
bxpl lr
|
||||
b __set_syscall_errno
|
||||
END(access)
|
||||
|
||||
@@ -1,15 +1,14 @@
|
||||
/* autogenerated by gensyscalls.py */
|
||||
#include <asm/unistd.h>
|
||||
#include <linux/err.h>
|
||||
#include <machine/asm.h>
|
||||
#include <sys/linux-syscalls.h>
|
||||
|
||||
ENTRY(acct)
|
||||
mov ip, r7
|
||||
.save {r4, r7}
|
||||
stmfd sp!, {r4, r7}
|
||||
ldr r7, =__NR_acct
|
||||
swi #0
|
||||
mov r7, ip
|
||||
cmn r0, #(MAX_ERRNO + 1)
|
||||
bxls lr
|
||||
neg r0, r0
|
||||
b __set_errno
|
||||
ldmfd sp!, {r4, r7}
|
||||
movs r0, r0
|
||||
bxpl lr
|
||||
b __set_syscall_errno
|
||||
END(acct)
|
||||
|
||||
@@ -1,15 +1,14 @@
|
||||
/* autogenerated by gensyscalls.py */
|
||||
#include <asm/unistd.h>
|
||||
#include <linux/err.h>
|
||||
#include <machine/asm.h>
|
||||
#include <sys/linux-syscalls.h>
|
||||
|
||||
ENTRY(bind)
|
||||
mov ip, r7
|
||||
.save {r4, r7}
|
||||
stmfd sp!, {r4, r7}
|
||||
ldr r7, =__NR_bind
|
||||
swi #0
|
||||
mov r7, ip
|
||||
cmn r0, #(MAX_ERRNO + 1)
|
||||
bxls lr
|
||||
neg r0, r0
|
||||
b __set_errno
|
||||
ldmfd sp!, {r4, r7}
|
||||
movs r0, r0
|
||||
bxpl lr
|
||||
b __set_syscall_errno
|
||||
END(bind)
|
||||
|
||||
@@ -1,15 +1,14 @@
|
||||
/* autogenerated by gensyscalls.py */
|
||||
#include <asm/unistd.h>
|
||||
#include <linux/err.h>
|
||||
#include <machine/asm.h>
|
||||
#include <sys/linux-syscalls.h>
|
||||
|
||||
ENTRY(cacheflush)
|
||||
mov ip, r7
|
||||
ldr r7, =__ARM_NR_cacheflush
|
||||
.save {r4, r7}
|
||||
stmfd sp!, {r4, r7}
|
||||
ldr r7, =__NR_ARM_cacheflush
|
||||
swi #0
|
||||
mov r7, ip
|
||||
cmn r0, #(MAX_ERRNO + 1)
|
||||
bxls lr
|
||||
neg r0, r0
|
||||
b __set_errno
|
||||
ldmfd sp!, {r4, r7}
|
||||
movs r0, r0
|
||||
bxpl lr
|
||||
b __set_syscall_errno
|
||||
END(cacheflush)
|
||||
|
||||
@@ -1,15 +1,14 @@
|
||||
/* autogenerated by gensyscalls.py */
|
||||
#include <asm/unistd.h>
|
||||
#include <linux/err.h>
|
||||
#include <machine/asm.h>
|
||||
#include <sys/linux-syscalls.h>
|
||||
|
||||
ENTRY(capget)
|
||||
mov ip, r7
|
||||
.save {r4, r7}
|
||||
stmfd sp!, {r4, r7}
|
||||
ldr r7, =__NR_capget
|
||||
swi #0
|
||||
mov r7, ip
|
||||
cmn r0, #(MAX_ERRNO + 1)
|
||||
bxls lr
|
||||
neg r0, r0
|
||||
b __set_errno
|
||||
ldmfd sp!, {r4, r7}
|
||||
movs r0, r0
|
||||
bxpl lr
|
||||
b __set_syscall_errno
|
||||
END(capget)
|
||||
|
||||
@@ -1,15 +1,14 @@
|
||||
/* autogenerated by gensyscalls.py */
|
||||
#include <asm/unistd.h>
|
||||
#include <linux/err.h>
|
||||
#include <machine/asm.h>
|
||||
#include <sys/linux-syscalls.h>
|
||||
|
||||
ENTRY(capset)
|
||||
mov ip, r7
|
||||
.save {r4, r7}
|
||||
stmfd sp!, {r4, r7}
|
||||
ldr r7, =__NR_capset
|
||||
swi #0
|
||||
mov r7, ip
|
||||
cmn r0, #(MAX_ERRNO + 1)
|
||||
bxls lr
|
||||
neg r0, r0
|
||||
b __set_errno
|
||||
ldmfd sp!, {r4, r7}
|
||||
movs r0, r0
|
||||
bxpl lr
|
||||
b __set_syscall_errno
|
||||
END(capset)
|
||||
|
||||
@@ -1,15 +1,14 @@
|
||||
/* autogenerated by gensyscalls.py */
|
||||
#include <asm/unistd.h>
|
||||
#include <linux/err.h>
|
||||
#include <machine/asm.h>
|
||||
#include <sys/linux-syscalls.h>
|
||||
|
||||
ENTRY(chdir)
|
||||
mov ip, r7
|
||||
.save {r4, r7}
|
||||
stmfd sp!, {r4, r7}
|
||||
ldr r7, =__NR_chdir
|
||||
swi #0
|
||||
mov r7, ip
|
||||
cmn r0, #(MAX_ERRNO + 1)
|
||||
bxls lr
|
||||
neg r0, r0
|
||||
b __set_errno
|
||||
ldmfd sp!, {r4, r7}
|
||||
movs r0, r0
|
||||
bxpl lr
|
||||
b __set_syscall_errno
|
||||
END(chdir)
|
||||
|
||||
@@ -1,15 +1,14 @@
|
||||
/* autogenerated by gensyscalls.py */
|
||||
#include <asm/unistd.h>
|
||||
#include <linux/err.h>
|
||||
#include <machine/asm.h>
|
||||
#include <sys/linux-syscalls.h>
|
||||
|
||||
ENTRY(chmod)
|
||||
mov ip, r7
|
||||
.save {r4, r7}
|
||||
stmfd sp!, {r4, r7}
|
||||
ldr r7, =__NR_chmod
|
||||
swi #0
|
||||
mov r7, ip
|
||||
cmn r0, #(MAX_ERRNO + 1)
|
||||
bxls lr
|
||||
neg r0, r0
|
||||
b __set_errno
|
||||
ldmfd sp!, {r4, r7}
|
||||
movs r0, r0
|
||||
bxpl lr
|
||||
b __set_syscall_errno
|
||||
END(chmod)
|
||||
|
||||
@@ -1,15 +1,14 @@
|
||||
/* autogenerated by gensyscalls.py */
|
||||
#include <asm/unistd.h>
|
||||
#include <linux/err.h>
|
||||
#include <machine/asm.h>
|
||||
#include <sys/linux-syscalls.h>
|
||||
|
||||
ENTRY(chown)
|
||||
mov ip, r7
|
||||
.save {r4, r7}
|
||||
stmfd sp!, {r4, r7}
|
||||
ldr r7, =__NR_chown32
|
||||
swi #0
|
||||
mov r7, ip
|
||||
cmn r0, #(MAX_ERRNO + 1)
|
||||
bxls lr
|
||||
neg r0, r0
|
||||
b __set_errno
|
||||
ldmfd sp!, {r4, r7}
|
||||
movs r0, r0
|
||||
bxpl lr
|
||||
b __set_syscall_errno
|
||||
END(chown)
|
||||
|
||||
@@ -1,15 +1,14 @@
|
||||
/* autogenerated by gensyscalls.py */
|
||||
#include <asm/unistd.h>
|
||||
#include <linux/err.h>
|
||||
#include <machine/asm.h>
|
||||
#include <sys/linux-syscalls.h>
|
||||
|
||||
ENTRY(chroot)
|
||||
mov ip, r7
|
||||
.save {r4, r7}
|
||||
stmfd sp!, {r4, r7}
|
||||
ldr r7, =__NR_chroot
|
||||
swi #0
|
||||
mov r7, ip
|
||||
cmn r0, #(MAX_ERRNO + 1)
|
||||
bxls lr
|
||||
neg r0, r0
|
||||
b __set_errno
|
||||
ldmfd sp!, {r4, r7}
|
||||
movs r0, r0
|
||||
bxpl lr
|
||||
b __set_syscall_errno
|
||||
END(chroot)
|
||||
|
||||
@@ -1,15 +1,14 @@
|
||||
/* autogenerated by gensyscalls.py */
|
||||
#include <asm/unistd.h>
|
||||
#include <linux/err.h>
|
||||
#include <machine/asm.h>
|
||||
#include <sys/linux-syscalls.h>
|
||||
|
||||
ENTRY(clock_getres)
|
||||
mov ip, r7
|
||||
.save {r4, r7}
|
||||
stmfd sp!, {r4, r7}
|
||||
ldr r7, =__NR_clock_getres
|
||||
swi #0
|
||||
mov r7, ip
|
||||
cmn r0, #(MAX_ERRNO + 1)
|
||||
bxls lr
|
||||
neg r0, r0
|
||||
b __set_errno
|
||||
ldmfd sp!, {r4, r7}
|
||||
movs r0, r0
|
||||
bxpl lr
|
||||
b __set_syscall_errno
|
||||
END(clock_getres)
|
||||
|
||||
@@ -1,15 +1,14 @@
|
||||
/* autogenerated by gensyscalls.py */
|
||||
#include <asm/unistd.h>
|
||||
#include <linux/err.h>
|
||||
#include <machine/asm.h>
|
||||
#include <sys/linux-syscalls.h>
|
||||
|
||||
ENTRY(clock_gettime)
|
||||
mov ip, r7
|
||||
.save {r4, r7}
|
||||
stmfd sp!, {r4, r7}
|
||||
ldr r7, =__NR_clock_gettime
|
||||
swi #0
|
||||
mov r7, ip
|
||||
cmn r0, #(MAX_ERRNO + 1)
|
||||
bxls lr
|
||||
neg r0, r0
|
||||
b __set_errno
|
||||
ldmfd sp!, {r4, r7}
|
||||
movs r0, r0
|
||||
bxpl lr
|
||||
b __set_syscall_errno
|
||||
END(clock_gettime)
|
||||
|
||||
@@ -1,15 +1,14 @@
|
||||
/* autogenerated by gensyscalls.py */
|
||||
#include <asm/unistd.h>
|
||||
#include <linux/err.h>
|
||||
#include <machine/asm.h>
|
||||
#include <sys/linux-syscalls.h>
|
||||
|
||||
ENTRY(clock_nanosleep)
|
||||
mov ip, r7
|
||||
.save {r4, r7}
|
||||
stmfd sp!, {r4, r7}
|
||||
ldr r7, =__NR_clock_nanosleep
|
||||
swi #0
|
||||
mov r7, ip
|
||||
cmn r0, #(MAX_ERRNO + 1)
|
||||
bxls lr
|
||||
neg r0, r0
|
||||
b __set_errno
|
||||
ldmfd sp!, {r4, r7}
|
||||
movs r0, r0
|
||||
bxpl lr
|
||||
b __set_syscall_errno
|
||||
END(clock_nanosleep)
|
||||
|
||||
@@ -1,15 +1,14 @@
|
||||
/* autogenerated by gensyscalls.py */
|
||||
#include <asm/unistd.h>
|
||||
#include <linux/err.h>
|
||||
#include <machine/asm.h>
|
||||
#include <sys/linux-syscalls.h>
|
||||
|
||||
ENTRY(clock_settime)
|
||||
mov ip, r7
|
||||
.save {r4, r7}
|
||||
stmfd sp!, {r4, r7}
|
||||
ldr r7, =__NR_clock_settime
|
||||
swi #0
|
||||
mov r7, ip
|
||||
cmn r0, #(MAX_ERRNO + 1)
|
||||
bxls lr
|
||||
neg r0, r0
|
||||
b __set_errno
|
||||
ldmfd sp!, {r4, r7}
|
||||
movs r0, r0
|
||||
bxpl lr
|
||||
b __set_syscall_errno
|
||||
END(clock_settime)
|
||||
|
||||
@@ -1,15 +1,14 @@
|
||||
/* autogenerated by gensyscalls.py */
|
||||
#include <asm/unistd.h>
|
||||
#include <linux/err.h>
|
||||
#include <machine/asm.h>
|
||||
#include <sys/linux-syscalls.h>
|
||||
|
||||
ENTRY(close)
|
||||
mov ip, r7
|
||||
.save {r4, r7}
|
||||
stmfd sp!, {r4, r7}
|
||||
ldr r7, =__NR_close
|
||||
swi #0
|
||||
mov r7, ip
|
||||
cmn r0, #(MAX_ERRNO + 1)
|
||||
bxls lr
|
||||
neg r0, r0
|
||||
b __set_errno
|
||||
ldmfd sp!, {r4, r7}
|
||||
movs r0, r0
|
||||
bxpl lr
|
||||
b __set_syscall_errno
|
||||
END(close)
|
||||
|
||||
@@ -1,15 +1,14 @@
|
||||
/* autogenerated by gensyscalls.py */
|
||||
#include <asm/unistd.h>
|
||||
#include <linux/err.h>
|
||||
#include <machine/asm.h>
|
||||
#include <sys/linux-syscalls.h>
|
||||
|
||||
ENTRY(connect)
|
||||
mov ip, r7
|
||||
.save {r4, r7}
|
||||
stmfd sp!, {r4, r7}
|
||||
ldr r7, =__NR_connect
|
||||
swi #0
|
||||
mov r7, ip
|
||||
cmn r0, #(MAX_ERRNO + 1)
|
||||
bxls lr
|
||||
neg r0, r0
|
||||
b __set_errno
|
||||
ldmfd sp!, {r4, r7}
|
||||
movs r0, r0
|
||||
bxpl lr
|
||||
b __set_syscall_errno
|
||||
END(connect)
|
||||
|
||||
@@ -1,15 +1,14 @@
|
||||
/* autogenerated by gensyscalls.py */
|
||||
#include <asm/unistd.h>
|
||||
#include <linux/err.h>
|
||||
#include <machine/asm.h>
|
||||
#include <sys/linux-syscalls.h>
|
||||
|
||||
ENTRY(delete_module)
|
||||
mov ip, r7
|
||||
.save {r4, r7}
|
||||
stmfd sp!, {r4, r7}
|
||||
ldr r7, =__NR_delete_module
|
||||
swi #0
|
||||
mov r7, ip
|
||||
cmn r0, #(MAX_ERRNO + 1)
|
||||
bxls lr
|
||||
neg r0, r0
|
||||
b __set_errno
|
||||
ldmfd sp!, {r4, r7}
|
||||
movs r0, r0
|
||||
bxpl lr
|
||||
b __set_syscall_errno
|
||||
END(delete_module)
|
||||
|
||||
@@ -1,15 +1,14 @@
|
||||
/* autogenerated by gensyscalls.py */
|
||||
#include <asm/unistd.h>
|
||||
#include <linux/err.h>
|
||||
#include <machine/asm.h>
|
||||
#include <sys/linux-syscalls.h>
|
||||
|
||||
ENTRY(dup)
|
||||
mov ip, r7
|
||||
.save {r4, r7}
|
||||
stmfd sp!, {r4, r7}
|
||||
ldr r7, =__NR_dup
|
||||
swi #0
|
||||
mov r7, ip
|
||||
cmn r0, #(MAX_ERRNO + 1)
|
||||
bxls lr
|
||||
neg r0, r0
|
||||
b __set_errno
|
||||
ldmfd sp!, {r4, r7}
|
||||
movs r0, r0
|
||||
bxpl lr
|
||||
b __set_syscall_errno
|
||||
END(dup)
|
||||
|
||||
@@ -1,15 +1,14 @@
|
||||
/* autogenerated by gensyscalls.py */
|
||||
#include <asm/unistd.h>
|
||||
#include <linux/err.h>
|
||||
#include <machine/asm.h>
|
||||
#include <sys/linux-syscalls.h>
|
||||
|
||||
ENTRY(dup2)
|
||||
mov ip, r7
|
||||
.save {r4, r7}
|
||||
stmfd sp!, {r4, r7}
|
||||
ldr r7, =__NR_dup2
|
||||
swi #0
|
||||
mov r7, ip
|
||||
cmn r0, #(MAX_ERRNO + 1)
|
||||
bxls lr
|
||||
neg r0, r0
|
||||
b __set_errno
|
||||
ldmfd sp!, {r4, r7}
|
||||
movs r0, r0
|
||||
bxpl lr
|
||||
b __set_syscall_errno
|
||||
END(dup2)
|
||||
|
||||
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Reference in New Issue
Block a user