Commit Graph

10 Commits

Author SHA1 Message Date
Kenny Root
420878c690 Add function marks and size indications
Add a macro to annotate function end and start using both ENTRY and END
for each function. This allows valgrind (and presumably other debugging
tools) to use the debug symbols to trace the functions.

Change-Id: I5f09cef8e22fb356eb6f5cee952b031e567599b6
2011-02-17 09:07:25 -08:00
Jean-Baptiste Queru
d29b8a51a5 am 5109146f: Merge "Reconcile assembly-only macros in <machine/cpu-features.h>"
Merge commit '5109146f954d8cca39d34689bff2762e15bc6933' into gingerbread-plus-aosp

* commit '5109146f954d8cca39d34689bff2762e15bc6933':
  Reconcile assembly-only macros in <machine/cpu-features.h>
2010-10-19 15:21:57 -07:00
Jim Huang
94e5c5ef37 Reconcile assembly-only macros in <machine/cpu-features.h>
The change explicitly isolates the assembly-only macros in header
<machine/cpu-features.h> in order to prevent mis-inclusion in C/C++
source files.

Change-Id: I0258e87c5ac3fd24944fb227290ac3b9cac4bfba
2010-10-01 17:00:46 +08:00
David 'Digit' Turner
bd8d987b3c libc: remove C++ comments from public headers.
Change-Id: I4af84f912062cd2ff34711c25122fb323f20c032
2010-09-27 17:35:26 +02:00
Jim Huang
a172709259 bionic: Rename _ARM_HAVE_LDREX_STREX to __ARM_HAVE_LDREX_STREX for consistency
The patch follows the naming manner in existing macros with prefix
__ARM_HAVE.

Change-Id: I6763ce2bf3ee85fd1da112c719543061d8d19bf4
2010-08-09 05:35:11 +08:00
David 'Digit' Turner
b8e6c50cfa Fix setjmp()/longjmp() to save FP registers on ARMv7. - DO NOT MERGE
Change-Id: I3a0c2c05e295ac05ed51a531dabda668be204ca0
2010-06-09 13:18:29 -07:00
Andy McFadden
4fdbadde92 Atomic/SMP update.
Added an underscore to _ARM_HAVE_LDREX_STREX to make it match the others.

Added __ARM_HAVE_DMB and __ARM_HAVE_LDREXD when appropriate.

Fixed some typos.

Change-Id: I2f55febcff4aeb7de572a514fb2cd2f820dca27c
2010-05-20 15:59:32 -07:00
vinay harugop
76ec6891e2 ARM architecture reference manuals for ARMv6 & ARMv7 state that the use of 'swp' instruction is deprecated
ARMv6 onwards. These architectures provide the load-linked, store-conditional pair of ldrex/strex whose use
is recommended in place of 'swp'. Also, the description of the 'swp' instruction in the ARMv6 reference
manual states that the swap operation does not include any memory barrier guarantees.This fix attempts to
address these issues by providing an atomic swap implementation using ldrex/strex under _ARM_HAVE_LDREX_STREX
macro.  This Fix is verified on ST Ericsson's U8500 platform and Submitted on behalf of a third-party:
Surinder-pal SINGH from STMicroelectronics.
2009-09-09 21:01:46 +05:30
The Android Open Source Project
4e468ed2eb Code drop from //branches/cupcake/...@124589 2008-12-17 18:03:48 -08:00
The Android Open Source Project
a27d2baa0c Initial Contribution 2008-10-21 07:00:00 -07:00