This patch changes the domain that the memory barrier operates on. Assumes
that the scope of bionic_atomic_barrier() does not include device memory,
memory shared with the GPU or any other memory external to the processor
cluster.
Change-Id: I291e741c98a64c86f3a3cf99811bbf1e714ac9aa
Signed-off-by: Serban Constantinescu <serban.constantinescu@arm.com>
This patch adds support for AArch64 atomic operations. Some
of the stubs use the lightweight store/load exclusive.
Change-Id: Iaf704d048b2dc15bf08cf8e4f0c3ea9f2052fe13
Signed-off-by: Serban Constantinescu <serban.constantinescu@arm.com>