Commit Graph

9 Commits

Author SHA1 Message Date
Elliott Hughes
bfbf7a4300 Remove remaining bionic support for TARGET_CPU_SMP being false.
Change-Id: I02a0a1c0ae55ccb5c45d17fb99a09c374d71def4
2014-11-17 10:06:20 -08:00
Colin Cross
d1973ca513 bionic: rename aarch64 target to arm64
Rename aarch64 build targets to arm64.  The gcc toolchain is still
aarch64.

Change-Id: Ia92d8a50824e5329cf00fd6f4f92eae112b7f3a3
2014-01-23 18:35:39 -08:00
Serban Constantinescu
845c778fa6 ARM: Change dmb domain for bionic_atomic_barrier()
This patch changes the domain that the memory barrier operates on. Assumes
that the scope of bionic_atomic_barrier() does not include device memory,
memory shared with the GPU or any other memory external to the processor
cluster.

Change-Id: I291e741c98a64c86f3a3cf99811bbf1e714ac9aa
Signed-off-by: Serban Constantinescu <serban.constantinescu@arm.com>
2013-12-19 11:39:01 -08:00
Serban Constantinescu
1924a5c92e AArch64: Add support for AArch64 atomic operations
This patch adds support for AArch64 atomic operations. Some
of the stubs use the lightweight store/load exclusive.

Change-Id: Iaf704d048b2dc15bf08cf8e4f0c3ea9f2052fe13
Signed-off-by: Serban Constantinescu <serban.constantinescu@arm.com>
2013-12-16 13:09:33 -08:00
Elliott Hughes
2b333b97a2 Clean up the pthread-only atomic stuff a little.
It looks like we can probably just use the generic GCC stuff instead;
the generated code looks pretty similar. We should come back to that.

These routines are only used by the pthread implementation, and
__bionic_atomic_inc isn't used, so we can remove it.

Change-Id: I8b5b8cb30a1b159f0e85c3675aee06ddef39b429
2013-12-16 10:18:11 -08:00
Elliott Hughes
52d6233296 Report errors to the log, not just stderr.
In particular this affects assert(3) and __cxa_pure_virtual, both of
which have managed to confuse people this week by apparently aborting
without reason. (Because stderr goes nowhere, normally.)

Bug: 6852995
Bug: 6840813
Change-Id: I7f5d17d5ddda439e217b7932096702dc013b9142
2012-07-27 17:43:38 -07:00
Raghu Gandham
f7fb9e1ef1 [MIPS] Add atomic routines
Change-Id: I2cb20ce44dd230d222b7fc1ede2e1e3dce6e692b
2012-07-24 10:30:22 -07:00
David 'Digit' Turner
e31bfae2ba bionic: Do not use <sys/atomics.h> for platform code.
We're going to modify the __atomic_xxx implementation to provide
full memory barriers, to avoid problems for NDK machine code that
link to these functions.

First step is to remove their usage from our platform code.
We now use inlined versions of the same functions for a slight
performance boost.

+ remove obsolete atomics_x86.c (was never compiled)

NOTE: This improvement was benchmarked on various devices.
      Comparing a pthread mutex lock + atomic increment + unlock
      we get:

  - ARMv7 emulator, running on a 2.4 GHz Xeon:
       before: 396 ns    after: 288 ns

  - x86 emulator in KVM mode on same machine:
       before: 27 ns     after: 27 ns

  - Google Nexus S, in ARMv7 mode (single-core):
       before: 82 ns     after: 76 ns

  - Motorola Xoom, in ARMv7 mode (multi-core):
       before: 121 ns    after: 120 ns

The code has also been rebuilt in ARMv5TE mode for correctness.

Change-Id: Ic1dc72b173d59b2e7af901dd70d6a72fb2f64b17
2011-11-16 16:28:10 +01:00
David 'Digit' Turner
6c8a2f2a5b libc: remove cutils dependencies
We simply copy the stuff we need from cutils headers.

A future patch will change cutils to include the private <bionic_atomic_inline.h>

Change-Id: Ib6fd9a03bc9e337ce867bd606dc94c2b4438480a
2010-06-11 13:49:09 -07:00