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am 8120a8df: am 3cf53d1a: Fixes for the ARM-specific bswap_16, bswap_32, and bswap_64.

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Merge commit '8120a8df848e6dec31ef5f00bc0b41ed95ce1310'

* commit '8120a8df848e6dec31ef5f00bc0b41ed95ce1310':
  Fixes for the ARM-specific bswap_16, bswap_32, and bswap_64.
This commit is contained in:
Elliott Hughes
2010-09-27 11:51:39 -07:00
committed by Android Git Automerger
parent eb4338e03e 8120a8df84
commit d285151df6
2 changed files with 27 additions and 30 deletions
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54
libc/arch-arm/include/endian.h
View File

@@ -33,14 +33,14 @@
#ifdef __GNUC__ #ifdef __GNUC__
/* NOTE: header <machine/cpu-features.h> could not be included directly /*
* since it defines extra macros, such as PLD. * REV and REV16 weren't available on ARM5 or ARM4.
* We don't include <machine/cpu-features.h> because it pollutes the
* namespace with macros like PLD.
*/ */
#if defined(__ARM_ARCH_7A__) || defined(__ARM_ARCH_7R__) || \ #if !defined __ARM_ARCH_5__ && !defined __ARM_ARCH_5T__ && \
defined(__ARM_ARCH_7__) || \ !defined __ARM_ARCH_5TE__ && !defined __ARM_ARCH_5TEJ__ && \
defined(__ARM_ARCH_6__) || defined(__ARM_ARCH_6J__) || \ !defined __ARM_ARCH_4T__ && !defined __ARM_ARCH_4__
defined(__ARM_ARCH_6K__) || defined(__ARM_ARCH_6Z__) || \
defined(__ARM_ARCH_6ZK__) || defined(__ARM_ARCH_6T2__)
/* According to RealView Assembler User's Guide, REV and REV16 are available /* According to RealView Assembler User's Guide, REV and REV16 are available
* in Thumb code and 16-bit instructions when used in Thumb-2 code. * in Thumb code and 16-bit instructions when used in Thumb-2 code.
@@ -50,44 +50,40 @@
* *
* REV16 Rd, Rm * REV16 Rd, Rm
* Rd and Rm must both be Lo registers. * Rd and Rm must both be Lo registers.
*
* The +l constraint takes care of this without constraining us in ARM mode.
*/ */
#ifdef __thumb__ #define __swap16md(x) ({ \
#define REV_LO_REG asm("r4") register u_int16_t _x = (x); \
#else __asm volatile ("rev16 %0, %0" : "+l" (_x)); \
#define REV_LO_REG _x; \
#endif
#define __swap16md(x) ({ \
register u_int16_t _x REV_LO_REG = (x); \
__asm volatile ("rev16 %0, %0" : "+r" (_x)); \
_x; \
}) })
#define __swap32md(x) ({ \ #define __swap32md(x) ({ \
register u_int32_t _x REV_LO_REG = (x); \ register u_int32_t _x = (x); \
__asm volatile ("rev %0, %0" : "+r" (_x)); \ __asm volatile ("rev %0, %0" : "+l" (_x)); \
_x; \ _x; \
}) })
#define __swap64md(x) ({ \ #define __swap64md(x) ({ \
u_int64_t _x = (x); \ u_int64_t _swap64md_x = (x); \
(u_int64_t) __swap32md(_x >> 32) | \ (u_int64_t) __swap32md(_swap64md_x >> 32) | \
(u_int64_t) __swap32md(_x & 0xffffffff) << 32; \ (u_int64_t) __swap32md(_swap64md_x & 0xffffffff) << 32; \
}) })
/* Tell sys/endian.h we have MD variants of the swap macros. */ /* Tell sys/endian.h we have MD variants of the swap macros. */
#define MD_SWAP #define MD_SWAP
#endif /* __ARM_ARCH__ */ #endif /* __ARM_ARCH__ */
#endif /* __GNUC__ */ #endif /* __GNUC__ */
#ifdef __ARMEB__ #ifdef __ARMEB__
#define _BYTE_ORDER _BIG_ENDIAN #define _BYTE_ORDER _BIG_ENDIAN
#else #else
#define _BYTE_ORDER _LITTLE_ENDIAN #define _BYTE_ORDER _LITTLE_ENDIAN
#endif #endif
#define __STRICT_ALIGNMENT #define __STRICT_ALIGNMENT
#include <sys/types.h> #include <sys/types.h>
#include <sys/endian.h> #include <sys/endian.h>
#endif /* !_ARM_ENDIAN_H_ */ #endif /* !_ARM_ENDIAN_H_ */

3
libc/include/byteswap.h
View File

@@ -28,7 +28,8 @@
#ifndef _BYTESWAP_H_ #ifndef _BYTESWAP_H_
#define _BYTESWAP_H_ #define _BYTESWAP_H_
#include <sys/endian.h> /* endian.h rather than sys/endian.h so we get the machine-specific file. */
#include <endian.h>
#define bswap_16(x) swap16(x) #define bswap_16(x) swap16(x)
#define bswap_32(x) swap32(x) #define bswap_32(x) swap32(x)