am 577fce01: Merge "[MIPS64] Dynamic linker"

* commit '577fce0108feda58296beacfbc0ada4a6d6afbc2':
  [MIPS64] Dynamic linker
This commit is contained in:
Elliott Hughes 2014-03-07 02:27:21 +00:00 committed by Android Git Automerger
commit 8f0d531289
5 changed files with 200 additions and 47 deletions

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@ -622,6 +622,10 @@ ifeq ($(TARGET_ARCH),$(filter $(TARGET_ARCH),mips mips64))
libc_common_cflags += -fstrict-aliasing
libc_crt_target_cflags += $(TARGET_GLOBAL_CFLAGS)
endif # mips
ifeq ($(TARGET_ARCH),mips64)
libc_crt_target_ldflags := -melf64ltsmip
endif
ifeq ($(TARGET_ARCH),x86)
libc_crt_target_cflags += -m32

128
linker/arch/mips64/begin.S Normal file
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@ -0,0 +1,128 @@
/*
* Copyright (C) 2012 The Android Open Source Project
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
* * Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* * Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in
* the documentation and/or other materials provided with the
* distribution.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
* OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
* AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT
* OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
* SUCH DAMAGE.
*/
#include <machine/asm.h>
#if (_MIPS_SIM == _ABIO32) || (_MIPS_SIM == _ABI32)
#define ELF_DYNSZ 8
#define ELF_DYN_TAG 0
#define ELF_DYN_VAL 4
#define GOTENT_SZ 4
#else
#define ELF_DYNSZ 16
#define ELF_DYN_TAG 0
#define ELF_DYN_VAL 8
#define GOTENT_SZ 8
#endif
.text
.align 4
.type __start,@function
.ent __start
.globl __start
__start:
.set noreorder
bal 1f
nop
1:
#if (_MIPS_SIM == _ABIO32) || (_MIPS_SIM == _ABI32)
.cpload ra
#else
.cpsetup ra, $0, 1b
#endif
.set reorder
/* Discover the load address */
LA t0, 1b
PTR_SUBU t0, ra, t0
#define DT_PLTGOT 3
#define DT_MIPS_LOCAL_GOTNO 0x7000000a
/* Search dynamic table for DT_MIPS_LOCAL_GOTNO and DT_PLTGOT values */
LA t1, _DYNAMIC
PTR_ADDU t1, t0
LI t3, DT_PLTGOT
LI ta0, DT_MIPS_LOCAL_GOTNO
0:
REG_L t2, ELF_DYN_TAG(t1)
beqz t2, .Lrelocate_local_got
bne t2, t3, 1f /* DT_PLTGOT? */
REG_L s0, ELF_DYN_VAL(t1)
PTR_ADDU s0, t0
b 2f
1:
bne t2, ta0, 2f /* DT_MIPS_LOCAL_GOTNO? */
REG_L s1, ELF_DYN_VAL(t1)
2: PTR_ADDU t1, ELF_DYNSZ
b 0b
.Lrelocate_local_got:
/*
* Relocate the local GOT entries
* got[0] is address of lazy resolver function
* got[1] may be used for a GNU extension
*/
PTR_ADDU s0, GOTENT_SZ
SUBU s1, 1
PTR_L t1, (s0)
bgez t1, 9f
PTR_ADDU s0, GOTENT_SZ
SUBU s1, 1
b 9f
1: PTR_L t1, (s0)
PTR_ADDU t1, t0
PTR_S t1, (s0)
PTR_ADDU s0, GOTENT_SZ
9: SUBU s1, 1
bgez s1, 1b
/* call linker_init */
move a0, sp
#if (_MIPS_SIM == _ABIO32) || (_MIPS_SIM == _ABI32)
PTR_SUBU sp, 4*REGSZ /* space for arg saves in linker_init */
#endif
jal __linker_init
#if (_MIPS_SIM == _ABIO32) || (_MIPS_SIM == _ABI32)
PTR_ADDU sp, 4*REGSZ /* restore sp */
#endif
move t9, v0
j t9
.end __start
/* FIXME:Is this still needed? */
.section .ctors, "wa"
.globl __CTOR_LIST__
__CTOR_LIST__:
.long -1

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@ -178,7 +178,7 @@ int dlclose(void* handle) {
# define ANDROID_LIBDL_STRTAB \
"dlopen\0dlclose\0dlsym\0dlerror\0dladdr\0android_update_LD_LIBRARY_PATH\0android_get_LD_LIBRARY_PATH\0dl_iterate_phdr\0"
#else
# error Unsupported architecture. Only arm, arm64, mips, x86, and x86_64 are presently supported.
# error Unsupported architecture. Only arm, arm64, mips, mips64, x86 and x86_64 are presently supported.
#endif
static ElfW(Sym) gLibDlSymtab[] = {

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@ -858,7 +858,7 @@ int do_dlclose(soinfo* si) {
}
#if defined(USE_RELA)
static int soinfo_relocate_a(soinfo* si, ElfW(Rela)* rela, unsigned count, soinfo* needed[]) {
static int soinfo_relocate(soinfo* si, ElfW(Rela)* rela, unsigned count, soinfo* needed[]) {
ElfW(Sym)* symtab = si->symtab;
const char* strtab = si->strtab;
ElfW(Sym)* s;
@ -1155,7 +1155,9 @@ static int soinfo_relocate_a(soinfo* si, ElfW(Rela)* rela, unsigned count, soinf
}
return 0;
}
#else
#else // REL, not RELA.
static int soinfo_relocate(soinfo* si, ElfW(Rel)* rel, unsigned count, soinfo* needed[]) {
ElfW(Sym)* symtab = si->symtab;
const char* strtab = si->strtab;
@ -1337,10 +1339,21 @@ static int soinfo_relocate(soinfo* si, ElfW(Rel)* rel, unsigned count, soinfo* n
break;
#elif defined(__mips__)
case R_MIPS_REL32:
#if defined(__LP64__)
// MIPS Elf64_Rel entries contain compound relocations
// We only handle the R_MIPS_NONE|R_MIPS_64|R_MIPS_REL32 case
if (ELF64_R_TYPE2(rel->r_info) != R_MIPS_64 ||
ELF64_R_TYPE3(rel->r_info) != R_MIPS_NONE) {
DL_ERR("Unexpected compound relocation type:%d type2:%d type3:%d @ %p (%d)",
type, (unsigned)ELF64_R_TYPE2(rel->r_info),
(unsigned)ELF64_R_TYPE3(rel->r_info), rel, (int) (rel - start));
return -1;
}
#endif
count_relocation(kRelocAbsolute);
MARK(rel->r_offset);
TRACE_TYPE(RELO, "RELO REL32 %08x <- %08x %s",
reloc, sym_addr, (sym_name) ? sym_name : "*SECTIONHDR*");
TRACE_TYPE(RELO, "RELO REL32 %08zx <- %08zx %s", static_cast<size_t>(reloc),
static_cast<size_t>(sym_addr), sym_name ? sym_name : "*SECTIONHDR*");
if (s) {
*reinterpret_cast<ElfW(Addr)*>(reloc) += sym_addr;
} else {
@ -1376,7 +1389,7 @@ static int soinfo_relocate(soinfo* si, ElfW(Rel)* rel, unsigned count, soinfo* n
#if defined(__mips__)
static bool mips_relocate_got(soinfo* si, soinfo* needed[]) {
unsigned* got = si->plt_got;
ElfW(Addr)** got = si->plt_got;
if (got == NULL) {
return true;
}
@ -1385,55 +1398,43 @@ static bool mips_relocate_got(soinfo* si, soinfo* needed[]) {
unsigned symtabno = si->mips_symtabno;
ElfW(Sym)* symtab = si->symtab;
/*
* got[0] is address of lazy resolver function
* got[1] may be used for a GNU extension
* set it to a recognizable address in case someone calls it
* (should be _rtld_bind_start)
* FIXME: maybe this should be in a separate routine
*/
// got[0] is the address of the lazy resolver function.
// got[1] may be used for a GNU extension.
// Set it to a recognizable address in case someone calls it (should be _rtld_bind_start).
// FIXME: maybe this should be in a separate routine?
if ((si->flags & FLAG_LINKER) == 0) {
size_t g = 0;
got[g++] = 0xdeadbeef;
if (got[g] & 0x80000000) {
got[g++] = 0xdeadfeed;
got[g++] = reinterpret_cast<ElfW(Addr)*>(0xdeadbeef);
if (reinterpret_cast<intptr_t>(got[g]) < 0) {
got[g++] = reinterpret_cast<ElfW(Addr)*>(0xdeadfeed);
}
/*
* Relocate the local GOT entries need to be relocated
*/
// Relocate the local GOT entries.
for (; g < local_gotno; g++) {
got[g] += si->load_bias;
got[g] = reinterpret_cast<ElfW(Addr)*>(reinterpret_cast<uintptr_t>(got[g]) + si->load_bias);
}
}
/* Now for the global GOT entries */
// Now for the global GOT entries...
ElfW(Sym)* sym = symtab + gotsym;
got = si->plt_got + local_gotno;
for (size_t g = gotsym; g < symtabno; g++, sym++, got++) {
const char* sym_name;
ElfW(Sym)* s;
// This is an undefined reference... try to locate it.
const char* sym_name = si->strtab + sym->st_name;
soinfo* lsi;
/* This is an undefined reference... try to locate it */
sym_name = si->strtab + sym->st_name;
s = soinfo_do_lookup(si, sym_name, &lsi, needed);
ElfW(Sym)* s = soinfo_do_lookup(si, sym_name, &lsi, needed);
if (s == NULL) {
/* We only allow an undefined symbol if this is a weak
reference.. */
// We only allow an undefined symbol if this is a weak reference.
s = &symtab[g];
if (ELF_ST_BIND(s->st_info) != STB_WEAK) {
DL_ERR("cannot locate \"%s\"...", sym_name);
return false;
}
*got = 0;
}
else {
/* FIXME: is this sufficient?
* For reference see NetBSD link loader
* http://cvsweb.netbsd.org/bsdweb.cgi/src/libexec/ld.elf_so/arch/mips/mips_reloc.c?rev=1.53&content-type=text/x-cvsweb-markup
*/
*got = lsi->load_bias + s->st_value;
} else {
// FIXME: is this sufficient?
// For reference see NetBSD link loader
// http://cvsweb.netbsd.org/bsdweb.cgi/src/libexec/ld.elf_so/arch/mips/mips_reloc.c?rev=1.53&content-type=text/x-cvsweb-markup
*got = reinterpret_cast<ElfW(Addr)*>(lsi->load_bias + s->st_value);
}
}
return true;
@ -1664,19 +1665,25 @@ static bool soinfo_link_image(soinfo* si) {
si->plt_rel_count = d->d_un.d_val / sizeof(ElfW(Rel));
#endif
break;
#if !defined(__LP64__)
#if defined(__mips__)
case DT_PLTGOT:
// Used by 32-bit MIPS.
si->plt_got = (unsigned *)(base + d->d_un.d_ptr);
// Used by mips and mips64.
si->plt_got = reinterpret_cast<ElfW(Addr)**>(base + d->d_un.d_ptr);
break;
#endif
case DT_DEBUG:
// Set the DT_DEBUG entry to the address of _r_debug for GDB
// if the dynamic table is writable
// FIXME: not working currently for N64
// The flags for the LOAD and DYNAMIC program headers do not agree.
// The LOAD section containng the dynamic table has been mapped as
// read-only, but the DYNAMIC header claims it is writable.
#if !(defined(__mips__) && defined(__LP64__))
if ((dynamic_flags & PF_W) != 0) {
d->d_un.d_val = reinterpret_cast<uintptr_t>(&_r_debug);
}
break;
#endif
#if defined(USE_RELA)
case DT_RELA:
si->rela = (ElfW(Rela)*) (base + d->d_un.d_ptr);
@ -1868,13 +1875,13 @@ static bool soinfo_link_image(soinfo* si) {
#if defined(USE_RELA)
if (si->plt_rela != NULL) {
DEBUG("[ relocating %s plt ]\n", si->name );
if (soinfo_relocate_a(si, si->plt_rela, si->plt_rela_count, needed)) {
if (soinfo_relocate(si, si->plt_rela, si->plt_rela_count, needed)) {
return false;
}
}
if (si->rela != NULL) {
DEBUG("[ relocating %s ]\n", si->name );
if (soinfo_relocate_a(si, si->rela, si->rela_count, needed)) {
if (soinfo_relocate(si, si->rela, si->rela_count, needed)) {
return false;
}
}

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@ -56,6 +56,20 @@
#define ELFW(what) ELF32_ ## what
#endif
// mips64 interprets Elf64_Rel structures' r_info field differently.
// bionic (like other C libraries) has macros that assume regular ELF files,
// but the dynamic linker needs to be able to load mips64 ELF files.
#if defined(__mips__) && defined(__LP64__)
#undef ELF64_R_SYM
#undef ELF64_R_TYPE
#undef ELF64_R_INFO
#define ELF64_R_SYM(info) (((info) >> 0) & 0xffffffff)
#define ELF64_R_SSYM(info) (((info) >> 32) & 0xff)
#define ELF64_R_TYPE3(info) (((info) >> 40) & 0xff)
#define ELF64_R_TYPE2(info) (((info) >> 48) & 0xff)
#define ELF64_R_TYPE(info) (((info) >> 56) & 0xff)
#endif
// Returns the address of the page containing address 'x'.
#define PAGE_START(x) ((x) & PAGE_MASK)
@ -74,8 +88,8 @@
typedef void (*linker_function_t)();
// Android uses REL for 32-bit but only uses RELA for 64-bit.
#if defined(__LP64__)
// Android uses RELA for aarch64 and x86_64. mips64 still uses REL.
#if defined(__aarch64__) || defined(__x86_64__)
#define USE_RELA 1
#endif
@ -110,10 +124,10 @@ struct soinfo {
unsigned* bucket;
unsigned* chain;
#if !defined(__LP64__)
// This is only used by 32-bit MIPS, but needs to be here for
#if defined(__mips__) || !defined(__LP64__)
// This is only used by mips and mips64, but needs to be here for
// all 32-bit architectures to preserve binary compatibility.
unsigned* plt_got;
ElfW(Addr)** plt_got;
#endif
#if defined(USE_RELA)