am 4e78ca63: Merge "AArch64: Initial AArch64 port of libm"
* commit '4e78ca63b8d53b96c590d3f1b29b0cfb65a651bc': AArch64: Initial AArch64 port of libm
This commit is contained in:
Elliott Hughes
Android Git Automerger
commit
5f0cc63a25
@ -224,6 +224,9 @@ libm_common_cflags := \
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libm_common_includes := $(LOCAL_PATH)/upstream-freebsd/lib/msun/src/
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libm_aarch64_includes := $(LOCAL_PATH)/aarch64
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libm_aarch64_src_files := aarch64/fenv.c
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libm_arm_includes := $(LOCAL_PATH)/arm
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libm_arm_src_files := arm/fenv.c
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56
libm/aarch64/_fpmath.h
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56
libm/aarch64/_fpmath.h
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@ -0,0 +1,56 @@
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/*-
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* Copyright (c) 2002, 2003 David Schultz <das@FreeBSD.ORG>
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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*
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* THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
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* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
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* ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
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* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
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* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
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* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
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* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
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* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
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* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
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* SUCH DAMAGE.
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*
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* $FreeBSD: src/lib/libc/aarch64/_fpmath.h $
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*/
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union IEEEl2bits {
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long double e;
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struct {
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#ifndef __AARCH64EB__
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unsigned int manl :32;
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unsigned int manh :20;
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unsigned int exp :11;
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unsigned int sign :1;
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#else
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unsigned int sign :1;
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unsigned int exp :11;
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unsigned int manh :20;
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unsigned int manl :32;
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#endif
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} bits;
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};
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#define LDBL_NBIT 0
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#define LDBL_IMPLICIT_NBIT
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#define mask_nbit_l(u) ((void)0)
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#define LDBL_MANH_SIZE 32
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#define LDBL_MANL_SIZE 32
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#define LDBL_TO_ARRAY32(u, a) do { \
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(a)[0] = (uint32_t)(u).bits.manl; \
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(a)[1] = (uint32_t)(u).bits.manh; \
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} while(0)
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35
libm/aarch64/fenv.c
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35
libm/aarch64/fenv.c
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@ -0,0 +1,35 @@
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/*-
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* Copyright (c) 2004 David Schultz <das@FreeBSD.ORG>
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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*
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* THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
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* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
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* ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
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* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
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* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
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* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
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* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
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* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
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* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
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* SUCH DAMAGE.
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*
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* $FreeBSD: libm/aarch64/fenv.c $
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*/
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#include <fenv.h>
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/*
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* Hopefully the system ID byte is immutable, so it's valid to use
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* this as a default environment.
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*/
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const fenv_t __fe_dfl_env = 0;
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232
libm/include/aarch64/fenv.h
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232
libm/include/aarch64/fenv.h
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@ -0,0 +1,232 @@
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/*-
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* Copyright (c) 2004-2005 David Schultz <das@FreeBSD.ORG>
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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*
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* THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
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* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
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* ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
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* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
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* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
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* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
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* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
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* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
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* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
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* SUCH DAMAGE.
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*
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* $FreeBSD: src/lib/msun/arm/fenv.h,v 1.5 2005/03/16 19:03:45 das Exp $
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*/
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/*
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* Rewritten for Android.
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*
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* The ARM FPSCR (Floating-point Status and Control Register) described here:
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* http://infocenter.arm.com/help/index.jsp?topic=/com.arm.doc.ddi0344b/Chdfafia.html
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* has been split into the FPCR (Floating-point Control Register) and FPSR
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* (Floating-point Status Register) on the ARMv8. These are described briefly in
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* "Procedure Call Standard for the ARM 64-bit Architecture"
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* http://infocenter.arm.com/help/topic/com.arm.doc.ihi0055a/IHI0055A_aapcs64.pdf
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* section 5.1.2 SIMD and Floating-Point Registers
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*/
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#ifndef _FENV_H_
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#define _FENV_H_
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#include <sys/types.h>
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__BEGIN_DECLS
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typedef __uint32_t fenv_t;
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typedef __uint32_t fexcept_t;
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/* Exception flags. */
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#define FE_INVALID 0x01
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#define FE_DIVBYZERO 0x02
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#define FE_OVERFLOW 0x04
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#define FE_UNDERFLOW 0x08
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#define FE_INEXACT 0x10
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#define FE_ALL_EXCEPT (FE_DIVBYZERO | FE_INEXACT | FE_INVALID | FE_OVERFLOW | FE_UNDERFLOW)
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#define _FPSCR_ENABLE_SHIFT 8
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#define _FPSCR_ENABLE_MASK (FE_ALL_EXCEPT << _FPSCR_ENABLE_SHIFT)
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/* Rounding modes. */
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#define FE_TONEAREST 0x0
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#define FE_UPWARD 0x1
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#define FE_DOWNWARD 0x2
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#define FE_TOWARDZERO 0x3
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#define _FPSCR_RMODE_SHIFT 22
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#define FPCR_IOE (1 << 8)
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#define FPCR_DZE (1 << 9)
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#define FPCR_OFE (1 << 10)
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#define FPCR_UFE (1 << 11)
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#define FPCR_IXE (1 << 12)
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#define FPCR_IDE (1 << 15)
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#define FPCR_LEN (7 << 16)
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#define FPCR_STRIDE (3 << 20)
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#define FPCR_RMODE (3 << 22)
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#define FPCR_FZ (1 << 24)
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#define FPCR_DN (1 << 25)
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#define FPCR_AHP (1 << 26)
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#define FPCR_MASK (FPCR_IOE | \
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FPCR_DZE | \
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FPCR_OFE | \
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FPCR_UFE | \
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FPCR_IXE | \
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FPCR_IDE | \
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FPCR_LEN | \
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FPCR_STRIDE | \
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FPCR_RMODE | \
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FPCR_FZ | \
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FPCR_DN | \
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FPCR_AHP )
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#define FPSR_IOC (1 << 0)
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#define FPSR_DZC (1 << 1)
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#define FPSR_OFC (1 << 2)
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#define FPSR_UFC (1 << 3)
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#define FPSR_IXC (1 << 4)
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#define FPSR_IDC (1 << 7)
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#define FPSR_QC (1 << 27)
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#define FPSR_V (1 << 28)
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#define FPSR_C (1 << 29)
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#define FPSR_Z (1 << 30)
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#define FPSR_N (1 << 31)
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#define FPSR_MASK (FPSR_IOC | \
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FPSR_DZC | \
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FPSR_OFC | \
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FPSR_UFC | \
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FPSR_IXC | \
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FPSR_IDC | \
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FPSR_QC | \
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FPSR_V | \
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FPSR_C | \
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FPSR_Z | \
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FPSR_N )
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/* Default floating-point environment. */
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extern const fenv_t __fe_dfl_env;
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#define FE_DFL_ENV (&__fe_dfl_env)
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static __inline int fegetenv(fenv_t* __envp) {
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fenv_t _fpcr, _fpsr;
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__asm__ __volatile__("mrs %0,fpcr" : "=r" (_fpcr));
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__asm__ __volatile__("mrs %0,fpsr" : "=r" (_fpsr));
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*__envp = (_fpcr | _fpsr);
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return 0;
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}
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static __inline int fesetenv(const fenv_t* __envp) {
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fenv_t _fpcr = (*__envp & FPCR_MASK);
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fenv_t _fpsr = (*__envp & FPSR_MASK);
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__asm__ __volatile__("msr fpcr,%0" : :"ri" (_fpcr));
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__asm__ __volatile__("msr fpsr,%0" : :"ri" (_fpsr));
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return 0;
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}
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static __inline int feclearexcept(int __excepts) {
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fexcept_t __fpscr;
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fegetenv(&__fpscr);
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__fpscr &= ~__excepts;
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fesetenv(&__fpscr);
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return 0;
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}
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static __inline int fegetexceptflag(fexcept_t* __flagp, int __excepts) {
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fexcept_t __fpscr;
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fegetenv(&__fpscr);
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*__flagp = __fpscr & __excepts;
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return 0;
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}
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static __inline int fesetexceptflag(const fexcept_t* __flagp, int __excepts) {
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fexcept_t __fpscr;
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fegetenv(&__fpscr);
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__fpscr &= ~__excepts;
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__fpscr |= *__flagp & __excepts;
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fesetenv(&__fpscr);
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return 0;
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}
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static __inline int feraiseexcept(int __excepts) {
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fexcept_t __ex = __excepts;
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fesetexceptflag(&__ex, __excepts);
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return 0;
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}
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static __inline int fetestexcept(int __excepts) {
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fexcept_t __fpscr;
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fegetenv(&__fpscr);
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return (__fpscr & __excepts);
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}
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static __inline int fegetround(void) {
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fenv_t _fpscr;
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fegetenv(&_fpscr);
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return ((_fpscr >> _FPSCR_RMODE_SHIFT) & 0x3);
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}
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static __inline int fesetround(int __round) {
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fenv_t _fpscr;
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fegetenv(&_fpscr);
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_fpscr &= ~(0x3 << _FPSCR_RMODE_SHIFT);
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_fpscr |= (__round << _FPSCR_RMODE_SHIFT);
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fesetenv(&_fpscr);
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return 0;
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}
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static __inline int feholdexcept(fenv_t* __envp) {
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fenv_t __env;
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fegetenv(&__env);
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*__envp = __env;
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__env &= ~(FE_ALL_EXCEPT | _FPSCR_ENABLE_MASK);
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fesetenv(&__env);
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return 0;
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}
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static __inline int feupdateenv(const fenv_t* __envp) {
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fexcept_t __fpscr;
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fegetenv(&__fpscr);
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fesetenv(__envp);
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feraiseexcept(__fpscr & FE_ALL_EXCEPT);
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return 0;
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}
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#if __BSD_VISIBLE
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static __inline int feenableexcept(int __mask) {
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fenv_t __old_fpscr, __new_fpscr;
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fegetenv(&__old_fpscr);
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__new_fpscr = __old_fpscr | (__mask & FE_ALL_EXCEPT) << _FPSCR_ENABLE_SHIFT;
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fesetenv(&__new_fpscr);
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return ((__old_fpscr >> _FPSCR_ENABLE_SHIFT) & FE_ALL_EXCEPT);
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}
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static __inline int fedisableexcept(int __mask) {
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fenv_t __old_fpscr, __new_fpscr;
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fegetenv(&__old_fpscr);
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__new_fpscr = __old_fpscr & ~((__mask & FE_ALL_EXCEPT) << _FPSCR_ENABLE_SHIFT);
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fesetenv(&__new_fpscr);
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return ((__old_fpscr >> _FPSCR_ENABLE_SHIFT) & FE_ALL_EXCEPT);
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}
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static __inline int fegetexcept(void) {
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fenv_t __fpscr;
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fegetenv(&__fpscr);
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return ((__fpscr & _FPSCR_ENABLE_MASK) >> _FPSCR_ENABLE_SHIFT);
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}
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#endif /* __BSD_VISIBLE */
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__END_DECLS
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#endif /* !_FENV_H_ */
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