generic-library/bionic
1
0
Fork 0
Code Issues Pull Requests Releases Wiki Activity

am b1b8babb: am c7e8e990: am 5e244a9b: Merge "Fix libm build for x86_64."

Browse Source 
* commit 'b1b8babbbb672086a7678741e8769303a2814bca':
  Fix libm build for x86_64.
This commit is contained in:
Elliott Hughes 2013-10-01 20:59:43 -07:00 committed by Android Git Automerger
commit 4b6f785fa9
3 changed files with 438 additions and 77 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

4
libm/Android.mk
View File

@ -217,7 +217,7 @@ libm_common_src_files += fake_long_double.c
# TODO: re-enable i387/e_sqrtf.S for x86, and maybe others.
libm_common_cflags := -DFLT_EVAL_METHOD=0
libm_common_cflags := -DFLT_EVAL_METHOD=0 -std=c99
libm_common_includes := $(LOCAL_PATH)/upstream-freebsd/lib/msun/src/
libm_arm_includes := $(LOCAL_PATH)/arm
@ -226,7 +226,7 @@ libm_arm_src_files := arm/fenv.c
libm_x86_includes := $(LOCAL_PATH)/i386 $(LOCAL_PATH)/i387
libm_x86_src_files := i387/fenv.c
libm_x86_64_includes := $(LOCAL_PATH)/amd64 $(LOCAL_PATH)/i387
libm_x86_64_includes := $(LOCAL_PATH)/amd64
libm_x86_64_src_files := amd64/fenv.c
libm_mips_cflags := -fno-builtin-rintf -fno-builtin-rint

394
libm/amd64/fenv.c
View File

@ -1,5 +1,8 @@
/* $OpenBSD: fenv.c,v 1.3 2012/12/05 23:20:02 deraadt Exp $ */
/* $NetBSD: fenv.c,v 1.1 2010/07/31 21:47:53 joerg Exp $ */
/*-
* Copyright (c) 2004-2005 David Schultz <das@FreeBSD.ORG>
* Copyright (c) 2004-2005 David Schultz <das (at) FreeBSD.ORG>
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
@ -22,143 +25,384 @@
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
* SUCH DAMAGE.
*
* $FreeBSD$
*/
#include <sys/cdefs.h>
#include <sys/types.h>
#include <fenv.h>
#include <machine/fpu.h>
#define __fenv_static
#include "fenv.h"
#ifdef __GNUC_GNU_INLINE__
#error "This file must be compiled with C99 'inline' semantics"
#endif
const fenv_t __fe_dfl_env = {
{ 0xffff0000 | __INITIAL_FPUCW__,
0xffff0000,
0xffffffff,
{ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xff, 0xff }
/*
* The following constant represents the default floating-point environment
* (that is, the one installed at program startup) and has type pointer to
* const-qualified fenv_t.
*
* It can be used as an argument to the functions within the <fenv.h> header
* that manage the floating-point environment, namely fesetenv() and
* feupdateenv().
*
* x87 fpu registers are 16bit wide. The upper bits, 31-16, are marked as
* RESERVED.
*/
fenv_t __fe_dfl_env = {
{
0xffff0000 | __INITIAL_NPXCW__, /* Control word register */
0xffff0000, /* Status word register */
0xffffffff, /* Tag word register */
{
0x00000000,
0x00000000,
0x00000000,
0xffff0000
}
},
__INITIAL_MXCSR__
__INITIAL_MXCSR__ /* MXCSR register */
};
extern inline int feclearexcept(int __excepts);
extern inline int fegetexceptflag(fexcept_t *__flagp, int __excepts);
/*
* The feclearexcept() function clears the supported floating-point exceptions
* represented by `excepts'.
*/
int
fesetexceptflag(const fexcept_t *flagp, int excepts)
feclearexcept(int excepts)
{
fenv_t env;
fenv_t fenv;
unsigned int mxcsr;
__fnstenv(&env.__x87);
env.__x87.__status &= ~excepts;
env.__x87.__status |= *flagp & excepts;
__fldenv(env.__x87);
excepts &= FE_ALL_EXCEPT;
__stmxcsr(&env.__mxcsr);
env.__mxcsr &= ~excepts;
env.__mxcsr |= *flagp & excepts;
__ldmxcsr(env.__mxcsr);
/* Store the current x87 floating-point environment */
__asm__ __volatile__ ("fnstenv %0" : "=m" (fenv));
/* Clear the requested floating-point exceptions */
fenv.__x87.__status &= ~excepts;
/* Load the x87 floating-point environent */
__asm__ __volatile__ ("fldenv %0" : : "m" (fenv));
/* Same for SSE environment */
__asm__ __volatile__ ("stmxcsr %0" : "=m" (mxcsr));
mxcsr &= ~excepts;
__asm__ __volatile__ ("ldmxcsr %0" : : "m" (mxcsr));
return (0);
}
/*
* The fegetexceptflag() function stores an implementation-defined
* representation of the states of the floating-point status flags indicated by
* the argument excepts in the object pointed to by the argument flagp.
*/
int
fegetexceptflag(fexcept_t *flagp, int excepts)
{
unsigned short status;
unsigned int mxcsr;
excepts &= FE_ALL_EXCEPT;
/* Store the current x87 status register */
__asm__ __volatile__ ("fnstsw %0" : "=am" (status));
/* Store the MXCSR register */
__asm__ __volatile__ ("stmxcsr %0" : "=m" (mxcsr));
/* Store the results in flagp */
*flagp = (status | mxcsr) & excepts;
return (0);
}
/*
* The feraiseexcept() function raises the supported floating-point exceptions
* represented by the argument `excepts'.
*
* The standard explicitly allows us to execute an instruction that has the
* exception as a side effect, but we choose to manipulate the status register
* directly.
*
* The validation of input is being deferred to fesetexceptflag().
*/
int
feraiseexcept(int excepts)
{
fexcept_t ex = excepts;
excepts &= FE_ALL_EXCEPT;
fesetexceptflag((fexcept_t *)&excepts, excepts);
__asm__ __volatile__ ("fwait");
fesetexceptflag(&ex, excepts);
__fwait();
return (0);
}
extern inline int fetestexcept(int __excepts);
extern inline int fegetround(void);
extern inline int fesetround(int __round);
/*
* This function sets the floating-point status flags indicated by the argument
* `excepts' to the states stored in the object pointed to by `flagp'. It does
* NOT raise any floating-point exceptions, but only sets the state of the flags.
*/
int
fesetexceptflag(const fexcept_t *flagp, int excepts)
{
fenv_t fenv;
unsigned int mxcsr;
excepts &= FE_ALL_EXCEPT;
/* Store the current x87 floating-point environment */
__asm__ __volatile__ ("fnstenv %0" : "=m" (fenv));
/* Set the requested status flags */
fenv.__x87.__status &= ~excepts;
fenv.__x87.__status |= *flagp & excepts;
/* Load the x87 floating-point environent */
__asm__ __volatile__ ("fldenv %0" : : "m" (fenv));
/* Same for SSE environment */
__asm__ __volatile__ ("stmxcsr %0" : "=m" (mxcsr));
mxcsr &= ~excepts;
mxcsr |= *flagp & excepts;
__asm__ __volatile__ ("ldmxcsr %0" : : "m" (mxcsr));
return (0);
}
/*
* The fetestexcept() function determines which of a specified subset of the
* floating-point exception flags are currently set. The `excepts' argument
* specifies the floating-point status flags to be queried.
*/
int
fetestexcept(int excepts)
{
unsigned short status;
unsigned int mxcsr;
excepts &= FE_ALL_EXCEPT;
/* Store the current x87 status register */
__asm__ __volatile__ ("fnstsw %0" : "=am" (status));
/* Store the MXCSR register state */
__asm__ __volatile__ ("stmxcsr %0" : "=m" (mxcsr));
return ((status | mxcsr) & excepts);
}
/*
* The fegetround() function gets the current rounding direction.
*/
int
fegetround(void)
{
unsigned short control;
/*
* We assume that the x87 and the SSE unit agree on the
* rounding mode. Reading the control word on the x87 turns
* out to be about 5 times faster than reading it on the SSE
* unit on an Opteron 244.
*/
__asm__ __volatile__ ("fnstcw %0" : "=m" (control));
return (control & _X87_ROUND_MASK);
}
/*
* The fesetround() function establishes the rounding direction represented by
* its argument `round'. If the argument is not equal to the value of a rounding
* direction macro, the rounding direction is not changed.
*/
int
fesetround(int round)
{
unsigned short control;
unsigned int mxcsr;
/* Check whether requested rounding direction is supported */
if (round & ~_X87_ROUND_MASK)
return (-1);
/* Store the current x87 control word register */
__asm__ __volatile__ ("fnstcw %0" : "=m" (control));
/* Set the rounding direction */
control &= ~_X87_ROUND_MASK;
control |= round;
/* Load the x87 control word register */
__asm__ __volatile__ ("fldcw %0" : : "m" (control));
/* Same for the SSE environment */
__asm__ __volatile__ ("stmxcsr %0" : "=m" (mxcsr));
mxcsr &= ~(_X87_ROUND_MASK << _SSE_ROUND_SHIFT);
mxcsr |= round << _SSE_ROUND_SHIFT;
__asm__ __volatile__ ("ldmxcsr %0" : : "m" (mxcsr));
return (0);
}
/*
* The fegetenv() function attempts to store the current floating-point
* environment in the object pointed to by envp.
*/
int
fegetenv(fenv_t *envp)
{
/* Store the current x87 floating-point environment */
__asm__ __volatile__ ("fnstenv %0" : "=m" (*envp));
/* Store the MXCSR register state */
__asm__ __volatile__ ("stmxcsr %0" : "=m" (envp->__mxcsr));
__fnstenv(&envp->__x87);
__stmxcsr(&envp->__mxcsr);
/*
* fnstenv masks all exceptions, so we need to restore the
* control word to avoid this side effect.
* When an FNSTENV instruction is executed, all pending exceptions are
* essentially lost (either the x87 FPU status register is cleared or
* all exceptions are masked).
*
* 8.6 X87 FPU EXCEPTION SYNCHRONIZATION -
* Intel(R) 64 and IA-32 Architectures Softare Developer's Manual - Vol1
*/
__fldcw(envp->__x87.__control);
__asm__ __volatile__ ("fldcw %0" : : "m" (envp->__x87.__control));
return (0);
}
/*
* The feholdexcept() function saves the current floating-point environment
* in the object pointed to by envp, clears the floating-point status flags, and
* then installs a non-stop (continue on floating-point exceptions) mode, if
* available, for all floating-point exceptions.
*/
int
feholdexcept(fenv_t *envp)
{
__uint32_t mxcsr;
unsigned int mxcsr;
__stmxcsr(&mxcsr);
__fnstenv(&envp->__x87);
__fnclex();
envp->__mxcsr = mxcsr;
/* Store the current x87 floating-point environment */
__asm__ __volatile__ ("fnstenv %0" : "=m" (*envp));
/* Clear all exception flags in FPU */
__asm__ __volatile__ ("fnclex");
/* Store the MXCSR register state */
__asm__ __volatile__ ("stmxcsr %0" : "=m" (envp->__mxcsr));
/* Clear exception flags in MXCSR */
mxcsr = envp->__mxcsr;
mxcsr &= ~FE_ALL_EXCEPT;
mxcsr |= FE_ALL_EXCEPT << _SSE_EMASK_SHIFT;
__ldmxcsr(mxcsr);
/* Mask all exceptions */
mxcsr |= FE_ALL_EXCEPT << _SSE_MASK_SHIFT;
/* Store the MXCSR register */
__asm__ __volatile__ ("ldmxcsr %0" : : "m" (mxcsr));
return (0);
}
extern inline int fesetenv(const fenv_t *__envp);
/*
* The fesetenv() function attempts to establish the floating-point environment
* represented by the object pointed to by envp. The argument `envp' points
* to an object set by a call to fegetenv() or feholdexcept(), or equal a
* floating-point environment macro. The fesetenv() function does not raise
* floating-point exceptions, but only installs the state of the floating-point
* status flags represented through its argument.
*/
int
fesetenv(const fenv_t *envp)
{
/* Load the x87 floating-point environent */
__asm__ __volatile__ ("fldenv %0" : : "m" (*envp));
/* Store the MXCSR register */
__asm__ __volatile__ ("ldmxcsr %0" : : "m" (envp->__mxcsr));
return (0);
}
/*
* The feupdateenv() function saves the currently raised floating-point
* exceptions in its automatic storage, installs the floating-point environment
* represented by the object pointed to by `envp', and then raises the saved
* floating-point exceptions. The argument `envp' shall point to an object set
* by a call to feholdexcept() or fegetenv(), or equal a floating-point
* environment macro.
*/
int
feupdateenv(const fenv_t *envp)
{
__uint32_t mxcsr;
__uint16_t status;
unsigned short status;
unsigned int mxcsr;
__fnstsw(&status);
__stmxcsr(&mxcsr);
/* Store the x87 status register */
__asm__ __volatile__ ("fnstsw %0" : "=am" (status));
/* Store the MXCSR register */
__asm__ __volatile__ ("stmxcsr %0" : "=m" (mxcsr));
/* Install new floating-point environment */
fesetenv(envp);
feraiseexcept((mxcsr | status) & FE_ALL_EXCEPT);
/* Raise any previously accumulated exceptions */
feraiseexcept(status | mxcsr);
return (0);
}
/*
* The following functions are extentions to the standard
*/
int
__feenableexcept(int mask)
feenableexcept(int mask)
{
__uint32_t mxcsr, omask;
__uint16_t control;
unsigned int mxcsr, omask;
unsigned short control;
mask &= FE_ALL_EXCEPT;
__fnstcw(&control);
__stmxcsr(&mxcsr);
omask = ~(control | mxcsr >> _SSE_EMASK_SHIFT) & FE_ALL_EXCEPT;
__asm__ __volatile__ ("fnstcw %0" : "=m" (control));
__asm__ __volatile__ ("stmxcsr %0" : "=m" (mxcsr));
omask = ~(control | (mxcsr >> _SSE_MASK_SHIFT)) & FE_ALL_EXCEPT;
control &= ~mask;
__fldcw(control);
mxcsr &= ~(mask << _SSE_EMASK_SHIFT);
__ldmxcsr(mxcsr);
__asm__ __volatile__ ("fldcw %0" : : "m" (control));
mxcsr &= ~(mask << _SSE_MASK_SHIFT);
__asm__ __volatile__ ("ldmxcsr %0" : : "m" (mxcsr));
return (omask);
}
int
__fedisableexcept(int mask)
fedisableexcept(int mask)
{
__uint32_t mxcsr, omask;
__uint16_t control;
unsigned int mxcsr, omask;
unsigned short control;
mask &= FE_ALL_EXCEPT;
__fnstcw(&control);
__stmxcsr(&mxcsr);
omask = ~(control | mxcsr >> _SSE_EMASK_SHIFT) & FE_ALL_EXCEPT;
__asm__ __volatile__ ("fnstcw %0" : "=m" (control));
__asm__ __volatile__ ("stmxcsr %0" : "=m" (mxcsr));
omask = ~(control | (mxcsr >> _SSE_MASK_SHIFT)) & FE_ALL_EXCEPT;
control |= mask;
__fldcw(control);
mxcsr |= mask << _SSE_EMASK_SHIFT;
__ldmxcsr(mxcsr);
__asm__ __volatile__ ("fldcw %0" : : "m" (control));
mxcsr |= mask << _SSE_MASK_SHIFT;
__asm__ __volatile__ ("ldmxcsr %0" : : "m" (mxcsr));
return (omask);
}
__weak_reference(__feenableexcept, feenableexcept);
__weak_reference(__fedisableexcept, fedisableexcept);
int
fegetexcept(void)
{
unsigned short control;
/*
* We assume that the masks for the x87 and the SSE unit are
* the same.
*/
__asm__ __volatile__ ("fnstcw %0" : "=m" (control));
return (~control & FE_ALL_EXCEPT);
}

117
libm/include/amd64/fenv.h Normal file
View File

@ -0,0 +1,117 @@
/* $OpenBSD: fenv.h,v 1.4 2011/05/25 21:46:49 martynas Exp $ */
/* $NetBSD: fenv.h,v 1.1 2010/07/31 21:47:54 joerg Exp $ */
/*-
* Copyright (c) 2004-2005 David Schultz <das (at) FreeBSD.ORG>
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
*
* THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
* ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
* SUCH DAMAGE.
*/
#ifndef _AMD64_FENV_H_
#define _AMD64_FENV_H_
#include <sys/types.h>
/*
* Each symbol representing a floating point exception expands to an integer
* constant expression with values, such that bitwise-inclusive ORs of _all
* combinations_ of the constants result in distinct values.
*
* We use such values that allow direct bitwise operations on FPU/SSE registers.
*/
#define FE_INVALID 0x01
#define FE_DENORMAL 0x02
#define FE_DIVBYZERO 0x04
#define FE_OVERFLOW 0x08
#define FE_UNDERFLOW 0x10
#define FE_INEXACT 0x20
/*
* The following symbol is simply the bitwise-inclusive OR of all floating-point
* exception constants defined above.
*/
#define FE_ALL_EXCEPT (FE_INVALID | FE_DENORMAL | FE_DIVBYZERO | \
FE_OVERFLOW | FE_UNDERFLOW | FE_INEXACT)
#define _SSE_MASK_SHIFT 7
/*
* Each symbol representing the rounding direction, expands to an integer
* constant expression whose value is distinct non-negative value.
*
* We use such values that allow direct bitwise operations on FPU/SSE registers.
*/
#define FE_TONEAREST 0x000
#define FE_DOWNWARD 0x400
#define FE_UPWARD 0x800
#define FE_TOWARDZERO 0xc00
/*
* The following symbol is simply the bitwise-inclusive OR of all floating-point
* rounding direction constants defined above.
*/
#define _X87_ROUND_MASK (FE_TONEAREST | FE_DOWNWARD | FE_UPWARD | \
FE_TOWARDZERO)
#define _SSE_ROUND_SHIFT 3
/*
* fenv_t represents the entire floating-point environment.
*/
typedef struct {
struct {
unsigned int __control; /* Control word register */
unsigned int __status; /* Status word register */
unsigned int __tag; /* Tag word register */
unsigned int __others[4]; /* EIP, Pointer Selector, etc */
} __x87;
unsigned int __mxcsr; /* Control, status register */
} fenv_t;
/*
* The following constant represents the default floating-point environment
* (that is, the one installed at program startup) and has type pointer to
* const-qualified fenv_t.
*
* It can be used as an argument to the functions within the <fenv.h> header
* that manage the floating-point environment, namely fesetenv() and
* feupdateenv().
*/
__BEGIN_DECLS
extern fenv_t __fe_dfl_env;
__END_DECLS
#define FE_DFL_ENV ((const fenv_t *)&__fe_dfl_env)
/*
* fexcept_t represents the floating-point status flags collectively, including
* any status the implementation associates with the flags.
*
* A floating-point status flag is a system variable whose value is set (but
* never cleared) when a floating-point exception is raised, which occurs as a
* side effect of exceptional floating-point arithmetic to provide auxiliary
* information.
*
* A floating-point control mode is a system variable whose value may be set by
* the user to affect the subsequent behavior of floating-point arithmetic.
*/
typedef unsigned int fexcept_t;
#endif /* !_AMD64_FENV_H_ */