generic-library/bionic
1
0
Fork 0
Code Issues Pull Requests Releases Wiki Activity

Merge "Remove remaining bionic support for TARGET_CPU_SMP being false."

Browse Source
This commit is contained in:
Elliott Hughes 2014-11-17 18:24:22 +00:00 committed by Gerrit Code Review
commit 35f8910e4c
5 changed files with 0 additions and 26 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

7
libc/Android.mk
View File

@ -548,13 +548,6 @@ ifneq ($(BOARD_MALLOC_ALIGNMENT),)
libc_common_cflags += -DMALLOC_ALIGNMENT=$(BOARD_MALLOC_ALIGNMENT) libc_common_cflags += -DMALLOC_ALIGNMENT=$(BOARD_MALLOC_ALIGNMENT)
endif endif
# Define ANDROID_SMP appropriately.
ifeq ($(TARGET_CPU_SMP),true)
libc_common_cflags += -DANDROID_SMP=1
else
libc_common_cflags += -DANDROID_SMP=0
endif
# Define some common conlyflags # Define some common conlyflags
libc_common_conlyflags := \ libc_common_conlyflags := \
-std=gnu99 -std=gnu99

5
libc/private/bionic_atomic_arm.h
View File

@ -17,12 +17,7 @@
#define BIONIC_ATOMIC_ARM_H #define BIONIC_ATOMIC_ARM_H
__ATOMIC_INLINE__ void __bionic_memory_barrier() { __ATOMIC_INLINE__ void __bionic_memory_barrier() {
#if defined(ANDROID_SMP) && ANDROID_SMP == 1
__asm__ __volatile__ ( "dmb ish" : : : "memory" ); __asm__ __volatile__ ( "dmb ish" : : : "memory" );
#else
/* A simple compiler barrier. */
__asm__ __volatile__ ( "" : : : "memory" );
#endif
} }
/* Compare-and-swap, without any explicit barriers. Note that this function /* Compare-and-swap, without any explicit barriers. Note that this function

4
libc/private/bionic_atomic_inline.h
View File

@ -30,10 +30,6 @@
* on SMP systems emits an appropriate instruction. * on SMP systems emits an appropriate instruction.
*/ */
#if !defined(ANDROID_SMP)
# error "Must define ANDROID_SMP before including atomic-inline.h"
#endif
#ifdef __cplusplus #ifdef __cplusplus
extern "C" { extern "C" {
#endif #endif

5
libc/private/bionic_atomic_mips.h
View File

@ -21,12 +21,7 @@
*/ */
__ATOMIC_INLINE__ void __bionic_memory_barrier() { __ATOMIC_INLINE__ void __bionic_memory_barrier() {
#if defined(ANDROID_SMP) && ANDROID_SMP == 1
__asm__ __volatile__ ( "sync" : : : "memory" ); __asm__ __volatile__ ( "sync" : : : "memory" );
#else
/* A simple compiler barrier. */
__asm__ __volatile__ ( "" : : : "memory" );
#endif
} }
/* Compare-and-swap, without any explicit barriers. Note that this function /* Compare-and-swap, without any explicit barriers. Note that this function

5
libc/private/bionic_atomic_x86.h
View File

@ -20,12 +20,7 @@
* platform for a multi-core device. * platform for a multi-core device.
*/ */
__ATOMIC_INLINE__ void __bionic_memory_barrier() { __ATOMIC_INLINE__ void __bionic_memory_barrier() {
#if defined(ANDROID_SMP) && ANDROID_SMP == 1
__asm__ __volatile__ ( "mfence" : : : "memory" ); __asm__ __volatile__ ( "mfence" : : : "memory" );
#else
/* A simple compiler barrier. */
__asm__ __volatile__ ( "" : : : "memory" );
#endif
} }
/* Compare-and-swap, without any explicit barriers. Note that this function /* Compare-and-swap, without any explicit barriers. Note that this function