diff --git a/libc/Android.mk b/libc/Android.mk index 7d438f48b..3e37ca7ec 100644 --- a/libc/Android.mk +++ b/libc/Android.mk @@ -548,13 +548,6 @@ ifneq ($(BOARD_MALLOC_ALIGNMENT),) libc_common_cflags += -DMALLOC_ALIGNMENT=$(BOARD_MALLOC_ALIGNMENT) endif -# Define ANDROID_SMP appropriately. -ifeq ($(TARGET_CPU_SMP),true) - libc_common_cflags += -DANDROID_SMP=1 -else - libc_common_cflags += -DANDROID_SMP=0 -endif - # Define some common conlyflags libc_common_conlyflags := \ -std=gnu99 diff --git a/libc/private/bionic_atomic_arm.h b/libc/private/bionic_atomic_arm.h index 2156e6a99..0cb832f97 100644 --- a/libc/private/bionic_atomic_arm.h +++ b/libc/private/bionic_atomic_arm.h @@ -17,12 +17,7 @@ #define BIONIC_ATOMIC_ARM_H __ATOMIC_INLINE__ void __bionic_memory_barrier() { -#if defined(ANDROID_SMP) && ANDROID_SMP == 1 __asm__ __volatile__ ( "dmb ish" : : : "memory" ); -#else - /* A simple compiler barrier. */ - __asm__ __volatile__ ( "" : : : "memory" ); -#endif } /* Compare-and-swap, without any explicit barriers. Note that this function diff --git a/libc/private/bionic_atomic_inline.h b/libc/private/bionic_atomic_inline.h index b834a2779..f8032c34a 100644 --- a/libc/private/bionic_atomic_inline.h +++ b/libc/private/bionic_atomic_inline.h @@ -30,10 +30,6 @@ * on SMP systems emits an appropriate instruction. */ -#if !defined(ANDROID_SMP) -# error "Must define ANDROID_SMP before including atomic-inline.h" -#endif - #ifdef __cplusplus extern "C" { #endif diff --git a/libc/private/bionic_atomic_mips.h b/libc/private/bionic_atomic_mips.h index 5e081161d..83f75fe86 100644 --- a/libc/private/bionic_atomic_mips.h +++ b/libc/private/bionic_atomic_mips.h @@ -21,12 +21,7 @@ */ __ATOMIC_INLINE__ void __bionic_memory_barrier() { -#if defined(ANDROID_SMP) && ANDROID_SMP == 1 __asm__ __volatile__ ( "sync" : : : "memory" ); -#else - /* A simple compiler barrier. */ - __asm__ __volatile__ ( "" : : : "memory" ); -#endif } /* Compare-and-swap, without any explicit barriers. Note that this function diff --git a/libc/private/bionic_atomic_x86.h b/libc/private/bionic_atomic_x86.h index 89639c8b2..e63df9384 100644 --- a/libc/private/bionic_atomic_x86.h +++ b/libc/private/bionic_atomic_x86.h @@ -20,12 +20,7 @@ * platform for a multi-core device. */ __ATOMIC_INLINE__ void __bionic_memory_barrier() { -#if defined(ANDROID_SMP) && ANDROID_SMP == 1 __asm__ __volatile__ ( "mfence" : : : "memory" ); -#else - /* A simple compiler barrier. */ - __asm__ __volatile__ ( "" : : : "memory" ); -#endif } /* Compare-and-swap, without any explicit barriers. Note that this function